TWI854755B - System for testing semiconductor device - Google Patents

Abstract

A system, for testing a plurality of semiconductor devices, includes a pressing apparatus, a carrying apparatus and an abutting apparatus. The pressing apparatus includes a cover and a seat. The cover and the seat constitute a test chamber and a sealed auxiliary chamber. The carrying apparatus is placed in the test chamber. Each semiconductor device is carried by one of a plurality of test sockets of the carrying apparatus. The abutting apparatus is placed between the cover and the test sockets of the carrying apparatus. The auxiliary chamber is pumped through at least one extraction hole, such that the pressure in the auxiliary chamber is lowered to drive the cover to move towards the seat to apply force to the abutting apparatus. The abutting apparatus with applied force presses against the plurality of test sockets and the plurality of semiconductor devices, such that each test socket is in electrical contact with the semiconductor device carried by said one test socket.

Description

Test system for testing semiconductor components

The present invention relates to a testing system for testing semiconductor components, and in particular to a testing system for testing semiconductor components capable of applying force to the semiconductor components and a test socket so that the semiconductor components and the test socket can achieve good electrical contact.

Currently, semiconductor component testing is performed using a test system. The prior art test system for testing semiconductor components includes a plurality of test sockets electrically coupled to a circuit board. Each semiconductor component in each batch of multiple semiconductor components is carried by a test socket. The prior art test system also includes a pressure device, and a huge mechanical power system is used to apply force to the pressure device so that the pressure device can be pressed down on the multiple semiconductor components and the multiple test sockets, so that the multiple semiconductor components and the multiple test sockets can achieve electrical contact, which will avoid the problem of incorrect testing.

Regarding the prior art of the test system using a mechanical power system for testing semiconductor components, many solutions are dedicated to improving the height, pressure and flatness of the contact between the pressure device and the semiconductor component. Some prior arts use springs of specific strength to cooperate. For example, the Republic of China Patent Publication No. 201042725 discloses the use of horizontal holes to limit the compression force of the pressure device for positioning. However, the horizontal hole taught in the Republic of China Patent Publication No. 201042725 also limits the flatness and pressure buffer. In addition, U.S. Patent Publication No. 7963924 discloses the use of pins with different lengths in the pressure device to adjust or limit the compression force of the pressure device for positioning. However, the structure of the pressing device taught in U.S. Patent Publication No. 7963924 is quite complicated, and it is difficult to replace the latch.

In addition, some prior arts use springs instead of mechanical structures to apply pressure. For example, the Republic of China Patent Publication No. I624675 uses a double valve plus a screw to change the stroke of the pressure device. However, each pressure device taught in the Republic of China Patent Publication No. I624675 cannot be adjusted individually, and there is no buffer design. Another Republic of China Patent Publication No. I582430 discloses an operating rod with multiple diameter ratchets to enable the pressure device to adjust its stroke. However, the pressure device taught in the Republic of China Patent Publication No. I582430 has limited stroke adjustment and no buffer design. Furthermore, it should be emphasized that the above-mentioned prior art test systems using mechanical power systems for testing semiconductor components all require a huge motor or other gravity component to be placed above the test chamber to achieve downward pressure by gravity acting on the pressure device. Obviously, the mechanical power system used in the above-mentioned prior art occupies a large space, is costly, and consumes more energy.

Prior art of test systems for testing semiconductor components utilizes vacuum technology to apply pressure to a pressure-receiving device to replace a large mechanical power system. For example, the Republic of China Patent Publication No. I701438 discloses placing a carrier including a plurality of test sockets, a plurality of semiconductor components, and a pressure-receiving device in a sealed test chamber, and evacuating the test chamber to a negative pressure so that a cover constituting the test chamber moves and applies force to the pressure-receiving device, so that the plurality of semiconductor components and the plurality of test sockets are in electrical contact. However, the cover and circuit board disclosed in the Republic of China Invention Patent Announcement No. I701438 must be equipped with screws, connectors, plug-in components, pipes and other components and components to allow the components and devices in the test chamber to be electrically connected and communicated with the outside of the test chamber. After the test system of the prior art has been used for a long time, the components and components installed on the cover and circuit board may become loose or deformed, causing vacuum leakage when the test chamber is evacuated. In addition, the pressure-receiving device of the prior art is the same as the pressure-receiving device of a general test system, and has a pipe inside for the flow of fluid for heat exchange with the semiconductor element. As the prior art test system performs high and low temperature tests on semiconductor components for multiple times, the sealing components that seal the test chamber may deteriorate and deform, causing vacuum leakage when the test chamber is evacuated.

Therefore, one technical problem to be solved by the present invention is to provide a test system for testing semiconductor components. The test system for testing semiconductor components according to the present invention does not use a mechanical power system, and can apply force to the semiconductor components and the test socket so that the semiconductor components and the test socket can achieve good electrical contact.

According to the first preferred specific embodiment of the present invention, a test system for testing multiple semiconductor components includes a pressurizing device, a supporting device and a pressure-receiving device. The pressurizing device includes a cover body, a base, a first sealing element and a second sealing element. The cover body includes a substrate, a closed outer rib wall and a closed inner rib wall. The substrate has a bottom surface. The outer rib wall and the inner rib wall are formed on the bottom surface of the substrate. The base has an upper surface and a lower surface, and includes a closed outer sealing groove and a closed inner sealing groove. The outer sealing groove and the inner sealing groove are formed on the upper surface of the base. The structure of the outer sealing groove is inserted in cooperation with the first end of the outer rib wall. The structure of the inner sealing groove is inserted in cooperation with the second end of the inner rib wall. The first sealing element is fixed on the outer rib wall near the first end. The second sealing element is fixed on the inner rib wall near the second end. When the first end of the outer rib wall is inserted into the outer sealing groove and the second end of the inner rib wall is inserted into the inner sealing groove, the substrate, the inner rib wall and the base constitute a test cavity. The test cavity has at least one vent hole. The test cavity is connected to the outside of the test system according to the first preferred specific embodiment of the present invention through at least one vent hole. The first sealing element is pressed between the outer rib wall and the outer sealing groove. The substrate, the outer rib wall, the inner rib wall and the base constitute a sealed auxiliary cavity. The auxiliary cavity has at least one exhaust hole. The second sealing element is pressed between the inner rib wall and the inner sealing groove. The supporting device is placed in the test cavity. The supporting device includes at least one circuit board and a plurality of test sockets. At least one circuit board is placed on the upper surface of the base. Each test socket corresponds to a circuit board and is electrically connected to its corresponding circuit board. Each semiconductor component is carried by a test seat. The pressure-receiving device is placed between the bottom surface of the cover and the plurality of test seats. The auxiliary cavity is evacuated through at least one exhaust hole, so that the pressure in the auxiliary cavity is reduced to drive the cover to move toward the base and exert force on the pressure-receiving device, so that the pressure-receiving device presses the plurality of test seats and the plurality of semiconductor components, so that each test seat is in electrical contact with the semiconductor component it carries.

Furthermore, the carrier device further includes at least one electrical connection unit. Each electrical connection unit corresponds to a circuit board and is electrically connected to the corresponding circuit board. Each electrical connection unit passes through the base.

Furthermore, the cover body also includes a plurality of sub-rib walls. The plurality of sub-rib walls are formed on the bottom surface of the substrate and are connected to the outer rib wall and the inner rib wall. The base also includes a plurality of sub-sealing grooves. The plurality of sub-sealing grooves are formed on the upper surface of the base. Each sub-sealing groove corresponds to a sub-rib wall, and its structure is inserted in conjunction with the respective third ends of the corresponding sub-rib wall. The pressurizing device also includes a plurality of third sealing elements. Each third sealing element corresponds to a sub-rib wall, and is fixed to the corresponding sub-rib wall near the third end. The sealed auxiliary cavity is divided into a plurality of sealed auxiliary sub-cavities by a plurality of sub-rib walls. The plurality of auxiliary sub-cavities are evacuated respectively through at least one exhaust hole.

Furthermore, the pressurizing device further comprises a fourth sealing element and a fifth sealing element. The fourth sealing element is fixed on the first end of the outer rib wall. The fifth sealing element is fixed on the second end of the inner rib wall.

In a specific embodiment, the outer sealing groove and the inner sealing groove are extended upward from the upper surface of the base.

In another specific embodiment, the outer sealing groove and the inner sealing groove are recessed downward from the upper surface of the base.

According to the second preferred specific embodiment of the present invention, a testing system for testing multiple semiconductor components includes a pressurizing device, a supporting device and a pressure-receiving device. The pressurizing device includes a cover body, a base, a first sealing element and a second sealing element. The cover body includes a substrate, a closed outer rib wall and a closed inner rib wall. The substrate has a bottom surface. The outer rib wall and the inner rib wall are formed on the bottom surface of the substrate. The base has an upper surface and a lower surface, and includes a closed outer sealing groove and a closed inner sealing groove. The outer sealing groove and the inner sealing groove are formed on the upper surface of the base. The structure of the outer sealing groove is inserted in cooperation with the first end of the outer rib wall. The structure of the inner sealing groove is inserted in cooperation with the second end of the inner rib wall. The first sealing element is fixed on the outer rib wall near the first end. The second sealing element is fixed on the inner rib wall near the second end. When the first end of the outer rib wall is inserted into the outer sealing groove and the second end of the inner rib wall is inserted into the inner sealing groove, the substrate, the inner rib wall and the base constitute a sealed auxiliary cavity. The auxiliary cavity has at least one exhaust hole. The first sealing element is pressed between the outer rib wall and the outer sealing groove. The substrate, the outer rib wall, the inner rib wall and the base constitute a test cavity. The test cavity has at least one vent. The test cavity is connected to the outside of the test system according to the second preferred specific embodiment of the present invention through at least one vent. The second sealing element is pressed between the inner rib wall and the inner sealing groove. The supporting device is placed in the test cavity. The supporting device includes at least one circuit board and a plurality of test sockets. At least one circuit board is placed on the upper surface of the base. Each test socket corresponds to a circuit board and is electrically connected to its corresponding circuit board. Each semiconductor component is carried by a test seat. The pressure-receiving device is placed between the bottom surface of the cover and the plurality of test seats. The auxiliary cavity is evacuated through at least one evacuation hole, so that the pressure in the auxiliary cavity is reduced to drive the cover to move toward the base and apply force to the pressure-receiving device, so that the pressure-receiving device presses the plurality of test seats and the plurality of semiconductor components, so that each test seat is in electrical contact with the semiconductor component it carries.

Unlike the prior art, the test system for testing semiconductor components according to the present invention does not use a mechanical power system. The test chamber of the test system according to the present invention is not sealed, and the test chamber is not evacuated. The test system according to the present invention has a sealed auxiliary chamber, and the auxiliary chamber is evacuated to apply pressure to the pressure device.

The advantages and spirit of the present invention can be further understood through the following detailed description of the invention and the attached drawings.

Please refer to Figures 1, 2, 3 and 4, which schematically depict the test system 1 according to the first preferred embodiment of the present invention. Figure 1 schematically shows the test system 1 according to the first preferred embodiment of the present invention in an exterior view. Figure 2 is a cross-sectional view of the test system 1 along the A-A line in Figure 1. Figure 3 is an exterior view of the necessary elements, component-cover 100, and pressure device 14 of the test system 1 according to the first preferred embodiment of the present invention from another viewing angle. Figure 4 is an exterior view of the necessary elements, component-base 101, and supporting device 12 of the test system 1 according to the first preferred embodiment of the present invention.

As shown in FIG. 1 , FIG. 2 , FIG. 3 and FIG. 4 , a testing system 1 according to a first preferred embodiment of the present invention is used to test a plurality of semiconductor components 2 and includes a pressurizing device 10, a supporting device 12 and a pressing device 14.

The pressurizing device 10 includes a housing 100, a base 101, a first sealing element 102, and a second sealing element 103. The housing 100 includes a substrate 1002, a closed outer rib wall 1004, and a closed inner rib wall 1006. The substrate 1002 has a bottom surface 1003. The outer rib wall 1004 and the inner rib wall 1006 are formed on the bottom surface 1003 of the substrate 1002. The base 101 has an upper surface 1012 and a lower surface 1014, and includes a closed outer sealing groove 1016 and a closed inner sealing groove 1018. The outer sealing groove 1016 and the inner sealing groove 1018 are formed on the upper surface 1012 of the base 101. The outer sealing groove 1016 has a structure that the first end 1005 of the outer rib wall 1004 is inserted. The structure of the inner sealing groove 1018 is to be inserted into the second end 1007 of the inner rib wall 1006. The first sealing element 102 is fixed to the outer rib wall 1004 near the first end 1005. The second sealing element 103 is fixed to the inner rib wall 1006 near the second end 1007.

When the first end 1005 of the outer rib wall 1004 is inserted into the outer sealing groove 1016 and the second end 1007 of the inner rib wall 1006 is inserted into the inner sealing groove 1018, the substrate 1002, the inner rib wall 1006 and the base 101 constitute a test chamber 104. The test chamber 104 has at least one vent hole 1042. In the example shown in FIG. 2 , the vent hole 1042 is formed on the base 101. The vent hole 1042 can also be formed on the substrate 1002, or formed on other places of the test chamber 104. The test chamber 104 is connected to the outside of the test system 1 according to the first preferred embodiment of the present invention through at least one vent hole 1042. The first sealing element 102 is pressed between the outer rib wall 1004 and the outer sealing groove 1016. The substrate 1002, the outer rib wall 1004, the inner rib wall 1006 and the base 101 form a sealed auxiliary chamber 105. The auxiliary chamber 105 has at least one exhaust hole 1052. The second sealing element 103 is pressed between the inner rib wall 1006 and the inner sealing groove 1018. In the example shown in FIG. 2, the exhaust hole 1052 is formed on the base 101. The exhaust hole 1052 can also be formed on the substrate 1002, or formed on other places of the auxiliary chamber 105.

The supporting device 12 is placed in the test chamber 104. The supporting device 12 includes at least one circuit board 120 and a plurality of test sockets 122. At least one circuit board 120 is placed on the upper surface 1012 of the base 101. Each test socket 122 corresponds to a circuit board 120 and is electrically connected to the corresponding circuit board 120. Each semiconductor component 2 is supported by a test socket 122. The pressure device 14 is placed between the bottom surface 1003 of the cover 100 and the plurality of test sockets 122. In a specific embodiment, each test socket 122 is equipped with a plurality of micro-spring probes, cantilever probes, snake probes, linear probes, contact probes or other types of probes, but the present case is not limited to this.

The auxiliary chamber 105 is evacuated through at least one evacuation hole 1052, causing the pressure in the auxiliary chamber 105 to drop, thereby driving the cover 100 to move toward the base 101 and exerting force on the pressing device 14, so that the pressing device 14 presses the plurality of test sockets 122 and the plurality of semiconductor components 2, so that each test socket 122 is in electrical contact with the semiconductor component 2 it carries.

Furthermore, as shown in FIG. 2 , the carrier device 12 further includes at least one electrical connection unit 124. Each electrical connection unit 124 corresponds to a circuit board 120 and is electrically connected to the corresponding circuit board 120. Each electrical connection unit 124 passes through the base 101. An external test instrument (not shown in the figure) is electrically connected to the test system 1 according to the first preferred embodiment of the present invention via at least one electrical connection unit 124.

Please refer to Figures 5 and 6, which schematically depict a variation of the test system 1 according to the first preferred embodiment of the present invention. Figure 5 is an external view of another angle of the necessary elements, component-cover 100, and pressure device 14 of the variation of the test system 1 according to the first preferred embodiment of the present invention. Figure 6 is an external view of the necessary elements, component-base 101, and support device 12 of the variation of the test system 1 according to the first preferred embodiment of the present invention.

According to a variation of the test system 1 of the first preferred embodiment of the present invention, as shown in Figures 5 and 6, the cover body 100 further includes a plurality of sub-rib walls 1008. The plurality of sub-rib walls 1008 are formed on the bottom surface 1003 of the substrate 1002 and connect the outer rib wall 1004 and the inner rib wall 1006. The base 101 also includes a plurality of sub-sealing grooves 1019. The plurality of sub-sealing grooves 1019 are formed on the upper surface 1012 of the base 101. Each sub-sealing groove 1019 corresponds to a sub-rib wall 1008, and its structure is to be inserted into the respective third end 1009 of the corresponding sub-rib wall 1008. The pressurizing device 10 also includes a plurality of third sealing elements 106. Each third sealing element 106 corresponds to a sub-rib wall 1008 and is fixed on the corresponding sub-rib wall 1008 near the third end 1009. The sealed auxiliary chamber 105 shown in FIG2 is divided into a plurality of sealed auxiliary sub-cavities (not shown in FIG5 and FIG6) by a plurality of sub-rib walls 1008. The plurality of auxiliary sub-cavities are evacuated through at least one exhaust hole 1052. Thereby, after the pressure device 14 is used for a period of time, if a drop occurs when different parts of the pressure device 14 press against a plurality of test sockets 122 and a plurality of semiconductor components 2, causing uneven force between the plurality of semiconductor components 2 and the plurality of test sockets 122, the problem can be solved by allowing the individual auxiliary sub-cavities to be evacuated to different degrees.

Furthermore, as also shown in FIG2 , the pressurizing device 10 further includes a fourth sealing element 107 and a fifth sealing element 108. The fourth sealing element 107 is fixed to the first end 1005 of the outer rib wall 1004. The fifth sealing element 108 is fixed to the second end 1007 of the inner rib wall 1006.

In a specific embodiment, the outer sealing groove 1016 and the inner sealing groove 1018 are extended upward from the upper surface 1012 of the base 101 , as shown in FIG. 2 and FIG. 4 .

In another specific embodiment, the outer sealing groove 1016 and the inner sealing groove 1018 are recessed downward from the upper surface 1012 of the base 101 .

Please refer to Figures 7, 8 and 9, which schematically depict the test system 3 according to the second preferred embodiment of the present invention. Figure 7 schematically depicts the test system 3 according to the second preferred embodiment of the present invention in a cross-sectional view. Figure 8 is an external view of the necessary elements, component-cover 300, and pressure device 34 of the test system 3 according to the second preferred embodiment of the present invention from another viewing angle. Figure 9 is an external view of the necessary elements, component-base 301, and support device 32 of the test system 3 according to the second preferred embodiment of the present invention.

As shown in FIG. 7 , FIG. 8 and FIG. 9 , the testing system 3 according to the second preferred embodiment of the present invention is used to test a plurality of semiconductor components 4 and includes a pressurizing device 30, a supporting device 32 and a pressing device 34.

The pressurizing device 30 includes a housing 300, a base 301, a first sealing element 302, and a second sealing element 303. The housing 300 includes a substrate 3002, a closed outer rib wall 3004, and a closed inner rib wall 3006. The substrate 3002 has a bottom surface 3003. The outer rib wall 3004 and the inner rib wall 3006 are formed on the bottom surface 3003 of the substrate 3002. The base 301 has an upper surface 3012 and a lower surface 3014, and includes a closed outer sealing groove 3016 and a closed inner sealing groove 3018. The outer sealing groove 3016 and the inner sealing groove 3018 are formed on the upper surface 3012 of the base 301. The outer sealing groove 3016 has a structure that the first end 3005 of the outer rib wall 3004 is inserted. The structure of the inner sealing groove 3018 is to be inserted into the second end 3007 of the inner rib wall 3006. The first sealing element 302 is fixed on the outer rib wall 3004 near the first end 3005. The second sealing element 303 is fixed on the inner rib wall 3006 near the second end 3007.

When the first end 3005 of the outer rib wall 3004 is inserted into the outer sealing groove 3016 and the second end 3007 of the inner rib wall 3006 is inserted into the inner sealing groove 3018, the substrate 3002, the inner rib wall 3006 and the base 301 form a sealed auxiliary chamber 304. The auxiliary chamber 304 has at least one exhaust hole 3042. In the example shown in FIG. 7 , the exhaust hole 3042 is formed on the base 301. The exhaust hole 3042 can also be formed on the substrate 3002 or formed on other places of the auxiliary chamber 304. The first sealing element 302 is pressed between the outer rib wall 3004 and the outer sealing groove 3016. The substrate 3002, the outer rib wall 3004, the inner rib wall 3006 and the base 301 form a test chamber 306. The test chamber 306 has at least one vent hole 3062. In the example shown in FIG. 7 , the vent hole 3062 is formed on the base 301. The vent hole 3062 may also be formed on the substrate 3002. The test chamber 306 is connected to the outside of the test system 3 according to the second preferred embodiment of the present invention through the at least one vent hole 3062. The second sealing element 303 is pressed between the inner rib wall 3006 and the inner sealing groove 3018.

The supporting device 32 is placed in the test chamber 306. The supporting device 32 includes at least one circuit board 320 and a plurality of test sockets 322. At least one circuit board 320 is placed on the upper surface 3012 of the base 301. Each test socket 322 corresponds to a circuit board 320 and is electrically connected to the corresponding circuit board 320. Each semiconductor component 4 is supported by a test socket 322. The pressing device 34 is placed between the bottom surface 3003 of the cover 300 and the plurality of test sockets 322.

The auxiliary chamber 304 is evacuated through at least one evacuation hole 3042, causing the pressure in the auxiliary chamber 304 to drop, thereby driving the cover 300 to move toward the base 301 and exerting force on the pressing device 34, so that the pressing device 34 presses against a plurality of test sockets 322 and a plurality of semiconductor components 4, allowing each test socket 322 to be in electrical contact with the semiconductor component 4 it carries.

Furthermore, as also shown in FIG. 7 , the carrier device 32 further includes at least one electrical connection unit 324 . Each electrical connection unit 324 corresponds to a circuit board 320 , and is electrically connected to the corresponding circuit board 320 . Each electrical connection unit 324 passes through the base 301 .

Furthermore, as also shown in FIG7 , the pressurizing device 30 further includes a third sealing element 307 and a fourth sealing element 308. The third sealing element 307 is fixed to the first end 3005 of the outer rib wall 3004. The fourth sealing element 308 is fixed to the second end 3007 of the inner rib wall 3006.

In a specific embodiment, the outer sealing groove 3016 and the inner sealing groove 3018 are extended upward from the upper surface 3012 of the base 301, as shown in FIG. 7 and FIG. 9.

In another specific embodiment, the outer sealing groove 3016 and the inner sealing groove 3018 are recessed downward from the upper surface 3012 of the base 301 .

From the above detailed description of the present invention, it can be clearly understood that the test system for testing semiconductor components according to the present invention does not use a mechanical power system. The test chamber of the test system according to the present invention is not sealed, and the test chamber is not evacuated. The test system according to the present invention has a sealed auxiliary chamber, and the auxiliary chamber is evacuated to apply pressure to the pressure device.

The above detailed description of the preferred specific embodiments is intended to more clearly describe the features and spirit of the present invention, but is not intended to limit the scope of the present invention to the preferred specific embodiments disclosed above. On the contrary, the purpose is to cover various changes and arrangements with equivalents within the scope of the patent that the present invention intends to apply for. Therefore, the scope of the patent that the present invention applies for should be interpreted in the broadest sense based on the above description, so that it covers all possible changes and arrangements with equivalents.

1: Test system 10: Pressurizing device 100: Cover 1002: Substrate 1003: Bottom surface 1004: Outer rib wall 1005: First end 1006: Inner rib wall 1007: Second end 1008: Sub-rib wall 1009: Third end 101: Base 1012: Upper surface 1014: Lower surface 1016: Outer sealing groove 1018: Inner sealing groove 1019: Sub-sealing groove 102: First sealing element 103: Second sealing element 104: Test chamber 1042: Ventilation hole 105: Auxiliary chamber 1052: Exhaust hole 106: Third sealing element 107: Fourth sealing element 108: Fifth sealing element 12: Carrier 120: Circuit board 122: Test seat 124: Electrical connection unit 14: Pressure device 2: Semiconductor element 3: Test system 30: Pressurizing device 300: Cover 3002: Substrate 3003: Bottom surface 3004: Outer rib wall 3005: First end 3006: Inner rib wall 3007: Second end 301: Base 3012: Upper surface 3014: Lower surface 3016: Outer sealing groove 3018: Inner sealing groove 302: First sealing element 303: Second sealing element 304: Auxiliary cavity 3042: Exhaust hole 306: Test cavity 3062: Vent hole 307: Third sealing element 308: Fourth sealing element 32: Carrier device 320: Circuit board 322: Test socket 324: Electrical connection unit 34: Pressure-receiving device 4: Semiconductor element

FIG. 1 is an external view of a test system according to the first preferred embodiment of the present invention. FIG. 2 is a cross-sectional view of the test system along line A-A in FIG. 1. FIG. 3 is an external view of another perspective of the necessary components, component-cover, and pressure-bearing device of the test system according to the first preferred embodiment of the present invention. FIG. 4 is an external view of another perspective of the necessary components, component-base, and supporting device of the test system according to the first preferred embodiment of the present invention. FIG. 5 is an external view of another perspective of a modified necessary component, component-cover, and pressure-bearing device of the test system according to the first preferred embodiment of the present invention. FIG. 6 is an external view of another perspective of a modified necessary component, component-base, and supporting device of the test system according to the first preferred embodiment of the present invention. FIG. 7 schematically illustrates a test system according to the second preferred embodiment of the present invention in a cross-sectional view. FIG. 8 is an external view of the necessary components, component-cover, and pressure-receiving device of the test system according to the second preferred embodiment of the present invention from another perspective. FIG. 9 is an external view of the necessary components, component-base, and supporting device of the test system according to the second preferred embodiment of the present invention.

1:Test system

10: Pressurizing device

100: mask body

1002: Substrate

1003: Bottom surface

1004: External rib wall

1005: First end

1006: Inner rib wall

1007: Second end

101: Base

1012: Upper surface

1014: Lower surface

1016: External sealing groove

1018: Inner sealing groove

102: First sealing element

103: Second sealing element

104: Test chamber

1042: Ventilation hole

105: Auxiliary cavity

1052: Exhaust hole

107: Fourth sealing element

108: Fifth sealing element

12: Carrier device

120: Circuit board

122: Test seat

124: Electrical connection unit

14: Pressure relief device

2: Semiconductor components

Claims (8)

A test system for testing a plurality of semiconductor components, comprising: a pressurizing device, comprising: a cover body, comprising a substrate, a closed outer rib wall and a closed inner rib wall, the substrate having a bottom surface, the outer rib wall and the inner rib wall being formed on the bottom surface of the substrate; a base having an upper surface and comprising a closed outer sealing groove and a closed inner sealing groove, the outer sealing groove and the inner sealing groove being formed on the upper surface of the base, the outer sealing groove having a structure that is inserted into a first end of the outer rib wall, and the inner sealing groove having a structure that is inserted into a first end of the outer rib wall The structure is inserted into a second end of the inner rib wall; a first sealing element is fixed on the outer rib wall near the first end; and a second sealing element is fixed on the inner rib wall near the second end. When the first end of the outer rib wall is inserted into the outer sealing groove and the second end of the inner rib wall is inserted into the inner sealing groove, the substrate, the inner rib wall and the base constitute a test cavity. The test cavity has at least one vent hole. The test cavity is connected to an outside of the test system through the at least one vent hole. The first sealing element is pressed against Between the outer rib wall and the outer sealing groove, the substrate, the outer rib wall, the inner rib wall and the base form a sealed auxiliary cavity, the auxiliary cavity has at least one exhaust hole, the second sealing element is pressed between the inner rib wall and the inner sealing groove; a carrier is placed in the test cavity, the carrier includes: at least one circuit board, which is placed on the upper surface of the base; a plurality of test seats, each test seat corresponds to a circuit board and is electrically connected to its corresponding circuit board, each semiconductor element is carried by a test seat; and at least one electrical A connection unit, each electrical connection unit corresponds to a circuit board and is electrically connected to the corresponding circuit board, and each electrical connection unit passes through the base; and a pressing device is placed between the bottom surface of the cover and a plurality of test sockets, wherein the auxiliary cavity is evacuated through the at least one exhaust hole, so that a pressure in the auxiliary cavity is reduced to drive the cover to move toward the base and apply force to the pressing device, so that the pressing device presses the plurality of test sockets and the plurality of semiconductor components, so that each test socket is in electrical contact with the semiconductor component it carries. The test system as described in claim 1, wherein the cover body further comprises a plurality of sub-rib walls, the plurality of sub-rib walls are formed on the bottom surface of the substrate and connected to the outer rib wall and the inner rib wall, the base further comprises a plurality of sub-sealing grooves, the plurality of sub-sealing grooves are formed on the upper surface of the base, each sub-sealing groove corresponds to a sub-rib wall and its structure is to be inserted into the third end of each of the corresponding sub-rib walls, the pressurizing device further comprises a plurality of third sealing elements, each third sealing element corresponds to a sub-rib wall and is fixed to the corresponding sub-rib wall near the third end, the sealed auxiliary cavity is divided into a plurality of sealed auxiliary sub-cavities by the plurality of sub-rib walls, and the plurality of auxiliary sub-cavities are evacuated through the at least one evacuation hole. The test system as described in claim 1, wherein the pressurizing device further comprises: a fourth sealing element fixed to the first end of the outer rib wall; and a fifth sealing element fixed to the second end of the inner rib wall. A test system as described in claim 1, wherein the outer sealing groove and the inner sealing groove extend upward from the upper surface of the base. The test system as described in claim 1, wherein the outer sealing groove and the inner sealing groove are recessed downward from the upper surface of the base. A test system for testing a plurality of semiconductor components, comprising: a pressurizing device, comprising: a cover body, comprising a substrate, a closed outer rib wall and a closed inner rib wall, the substrate having a bottom surface, the outer rib wall and the inner rib wall being formed on the bottom surface of the substrate; a base having an upper surface and comprising a closed outer sealing groove and a closed inner sealing groove, the outer sealing groove and the inner sealing groove being formed on the upper surface of the base, the outer sealing groove having a structure that is inserted into a first end of the outer rib wall, and the inner sealing groove having a structure that is inserted into a second end of the inner rib wall Two ends are inserted; a first sealing element is fixed on the outer rib wall near the first end; a second sealing element is fixed on the inner rib wall near the second end. When the first end of the outer rib wall is inserted into the outer sealing groove and the second end of the inner rib wall is inserted into the inner sealing groove, the substrate, the inner rib wall and the base form a sealed auxiliary cavity, and the auxiliary cavity has at least one exhaust hole. The first sealing element is pressed between the outer rib wall and the outer sealing groove. The substrate, the outer rib wall, the inner rib wall and the base form a test cavity, and the test cavity has at least one exhaust hole. The test chamber is connected to an exterior of the test system through the at least one vent hole, the second sealing element is pressed between the inner rib wall and the inner sealing groove; a third sealing element is fixed to the first end of the outer rib wall; and a fourth sealing element is fixed to the second end of the inner rib wall; a carrier is placed in the test chamber, the carrier includes: at least one circuit board is placed on the upper surface of the base; a plurality of test seats, each test seat corresponds to a circuit board and is electrically connected to its corresponding circuit board, each semiconductor element is connected by a test The test socket is supported; and at least one electrical connection unit, each electrical connection unit corresponds to a circuit board and is electrically connected to the corresponding circuit board, and each electrical connection unit passes through the base; and a pressing device is placed between the bottom surface of the cover and the plurality of test sockets, wherein the auxiliary cavity is evacuated through the at least one exhaust hole, so that a pressure in the auxiliary cavity is reduced to drive the cover to move toward the base and apply force to the pressing device, so that the pressing device presses the plurality of test sockets and the plurality of semiconductor components, so that each test socket is in electrical contact with the semiconductor component it carries. A test system as described in claim 6, wherein the outer sealing groove and the inner sealing groove extend upward from the upper surface of the base. The test system as described in claim 6, wherein the outer sealing groove and the inner sealing groove are recessed downward from the upper surface of the base.

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