TWI852665B - Electronic package module and method for fabricating the same - Google Patents

Abstract

An electronic package module and a method for fabricating the same are provided. The electronic package module includes an embedded circuit substrate, a plurality of trenches on the embedded circuit substrate and a plurality of soldering materials. The embedded circuit substrate includes at least one electrical component, a plurality of pads on the electrical component and a molding material encapsulating the electrical component. The pads are electrically connected to the electrical component while the pads are exposed on the molding material. Each pad is exposed on the bottom surface of each trench. Each soldering material on the bottom surface of each trench directly touches the pads respectively. The interface of the soldering material far away from the pads does not protrude the surface of the embedded circuit substrate.　Accordingly, the accuracy of alignment during the soldering process is improved since the soldering material is restricted separately in each trench.

Description

Electronic packaging module and manufacturing method thereof

The present invention relates to an electronic packaging module, in particular to an electronic packaging module with embedded electronic components and a manufacturing method thereof.

In the electronic component packaging process, when the pitch of the pads used for soldering on the surface of the component is less than 150µm, the ball grid array (BGA) packaging technology is mostly used. However, in the process of placing solder balls on the pads, the uneven surface of the components to be soldered and the circuit board can easily cause the height of each solder ball to be uneven. The uneven height of the solder balls will increase the proportion of empty soldering or weak soldering during the soldering process, thereby reducing the soldering yield.

On the other hand, when the pad pitch is less than 70µm, the distance between adjacent solder balls is too close, and after the soldering process, bridges are likely to occur between the solder balls, causing a short circuit.

Therefore, the present invention provides an electronic packaging module and a manufacturing method thereof, so as to improve the poor contact and short circuit conditions during the welding process.

An electronic package module provided by an embodiment of the present invention includes an embedded component circuit substrate, and the embedded component circuit substrate includes at least one electronic component; a plurality of first pads located on the electronic component and electrically connected to the electronic component; and a sealing material covering the electronic component, and the sealing material exposes the first pad. The embedded component circuit substrate includes a plurality of grooves located on a first surface of the embedded component circuit substrate, and each of the grooves has a bottom surface, wherein the bottom surface respectively exposes the first pad; and a plurality of welding materials, respectively located on the bottom surface, and directly contacting the first pad, wherein the welding material includes an interface away from the first pad, and the interface does not protrude from the first surface of the embedded component circuit substrate.

In at least one embodiment of the present invention, the electronic package module further includes a circuit substrate disposed on the soldering material, wherein the soldering material is located between the embedded component circuit substrate and the circuit substrate, and electrically connects the embedded component circuit substrate and the circuit substrate.

In at least one embodiment of the present invention, the circuit substrate further includes a plurality of second pads located on a second surface of the circuit substrate and respectively disposed on the soldering material, wherein the soldering material is located between the first pad and the second pad and electrically connects the first pad and the second pad.

In at least one embodiment of the present invention, the embedded component circuit substrate further includes a dielectric layer located between the first surface of the embedded component circuit substrate and the sealing material, wherein the groove extends from the first surface through the dielectric layer to the first pad.

In at least one embodiment of the present invention, the interface of the solder material is flush with the first surface of the embedded component circuit substrate.

The present invention also provides a method for manufacturing an electronic package module, including providing an initial circuit substrate; in the initial circuit substrate, an embedded structure is arranged to form an embedded component circuit substrate, wherein the embedded structure includes at least one electronic component and a plurality of pads arranged on the electronic component, wherein the pads are exposed to a first surface of the embedded structure; a portion of the embedded component circuit substrate is removed to form a plurality of grooves, and the pads are respectively exposed to a first bottom surface of the grooves; and after the grooves are formed, a welding material is deposited on each of the first bottom surfaces, and the welding material directly contacts the pads. An interface of the welding material is far away from the pad, and the interface does not protrude from a second surface of the embedded component circuit substrate.

In at least one embodiment of the present invention, an embedded structure is provided in an initial circuit substrate, including removing a portion of the initial circuit substrate to form an opening, wherein the opening connects two opposite sides of the initial circuit substrate; after the opening is formed, a covering film is provided on the initial circuit substrate, and the covering film completely covers one end of the opening; an electronic component is provided on the covering film, wherein a pad provided on the electronic component is located between the covering film and the electronic component, and the pad directly contacts the covering film; after the electronic component is provided, a sealing material is provided in the opening, wherein the sealing material covers the electronic component; and after the sealing material is filled, the covering film is removed.

In at least one embodiment of the present invention, the method further comprises depositing a conductive layer on the first bottom surface of the groove before depositing the solder material, wherein the conductive layer directly contacts the pad.

In at least one embodiment of the present invention, forming the embedded component circuit substrate further includes disposing a dielectric layer on the first surface of the embedded structure; and disposing a metal layer on the dielectric layer, wherein the dielectric layer is located between the metal layer and the embedded structure.

In at least one embodiment of the present invention, the method further includes removing multiple first portions of the metal layer after forming the embedded component circuit substrate to form multiple initial grooves, wherein the first portions overlap with the pads respectively, and the second bottom surface of each of the initial grooves exposes the dielectric layer; and after forming the initial grooves, removing multiple second portions of the dielectric layer, wherein the second portions overlap with the first portions respectively.

In at least one embodiment of the present invention, the method further includes removing the metal layer after depositing the solder material.

In at least one embodiment of the present invention, the method further comprises, after depositing the soldering material, disposing a circuit substrate on the embedded component circuit substrate by means of the soldering material, and the soldering material electrically connects the embedded component circuit substrate and the circuit substrate.

Based on the above, by placing the welding material in the groove and making the welding material not protrude from the groove, the accuracy of welding alignment can be improved. In addition, these grooves can also block adjacent welding materials to prevent the welding materials from contacting each other and causing short circuits, thereby improving the yield of electronic packaging modules.

The present invention will be described in detail with the following embodiments. It should be noted that the following description of the embodiments of the present invention is only used for illustration and is not intended to disclose all embodiments in detail or to limit the specific embodiments of the present invention. For example, the description of "a first feature formed on a second feature" includes a variety of implementations, including the first feature and the second feature directly contacting each other, and also including additional features formed between the first feature and the second feature so that the two do not directly contact each other. In addition, the same component symbols used in the drawings and the specification will represent the same or similar components as much as possible.

Spatially relative terms such as "inferior," "lower than," "below," "above," and related terms are used herein to simply describe the relationship of an element or feature as shown in the figure to another element or feature. These spatially relative terms cover different orientations when the device is in use or operating in addition to the orientation depicted in the figure. In addition, when the element is rotatable (rotated 90 degrees or other angles), the spatially relative descriptors used herein can also be interpreted accordingly.

In the following text, in order to clearly present the technical features of the present invention, the dimensions (e.g., length, width, thickness, and depth) of the components (e.g., layers, films, substrates, and regions, etc.) in the drawings will be enlarged in unequal proportions. Therefore, the description and explanation of the embodiments below are not limited to the dimensions and shapes presented by the components in the drawings, but should cover the dimensions, shapes, and deviations therefrom caused by actual processes and/or tolerances. For example, the flat surface shown in the drawings may have rough and/or nonlinear features, and the sharp corners shown in the drawings may be replaced with blunt corners. Therefore, the components presented in the drawings of the present invention are mainly for illustration, and are not intended to accurately depict the actual shapes of the components, nor are they intended to limit the scope of the patent application of the present invention.

Furthermore, the words "approximately", "approximately" or "substantially" used in the present case not only cover the numerical values and numerical ranges clearly recorded, but also cover the permissible deviation ranges that can be understood by a person of ordinary skill in the art to which the invention belongs, wherein the deviation range can be determined by the error generated during measurement, and the error is caused by, for example, the limitation of the measurement system or the process conditions. In addition, "approximately" can mean within one or more standard deviations of the above numerical values, such as ±30%, ±20%, ±10% or ±5%. The words "approximately", "approximately" or "substantially" used in this text may select an acceptable range of deviation or standard deviation according to the optical, etching, mechanical or other properties, and do not apply a single standard deviation to all the above optical, etching, mechanical and other properties.

The present invention discloses a method for manufacturing an electronic package module, and the manufacturing method may include several steps as shown in FIG. 1A to FIG. 1G. Referring to FIG. 1A, in the present embodiment, an initial circuit substrate 110 is first provided. In various embodiments of the present invention, the initial circuit substrate 110 may be a general copper clad laminate (CCL). In the present embodiment, the initial circuit substrate 110 is a double-layer copper clad laminate including two metal layers (metal layer 104a and metal layer 104b), wherein the metal layer 104a and the metal layer 104b are respectively located on opposite sides of the insulating layer 102.

Referring to FIG. 1B , an embedded structure 120 is disposed in the initial circuit substrate 110. The embedded structure 120 includes at least one electronic component 122 and a plurality of pads 124 disposed on the electronic component 122, wherein the pads 124 are exposed on the surface 120s of the embedded structure 120. In this embodiment, the method for disposing the embedded structure 120 is referred to the steps of FIG. 2A to FIG. 2C . As shown in FIG. 2A , a portion of the initial circuit substrate 110 is removed to form an opening 103, and the opening 103 connects two opposite sides of the initial circuit substrate 110.

Referring to FIG. 2B , after the opening 103 is formed, a cover film 105 is disposed on the initial circuit substrate 110 (e.g., on the surface 110s of the initial circuit substrate 110), and the cover film 105 completely covers one end surface 103e of the opening 103 (and may even exceed the end surface 103e of the opening 103). Then, an electronic component 122 is disposed on the cover film 105. The pad 124 disposed on the electronic component 122 is located between the cover film 105 and the electronic component 122, and the pad 124 directly contacts the cover film 105. The cover film 105 may be a film containing a polymer material (e.g., a polyimide tape).

After the electronic element 122 is disposed, a sealing material 126 is disposed in the opening 103. As shown in FIG. 2C , the sealing material 126 covers the electronic element 122. In this embodiment, the sealing material 126 may completely cover the electronic element 122 except for the area where the electronic element 122 contacts the pad 124. The sealing material 126 may include an insulating material such as an organic resin (such as an epoxy resin) or the like, and the sealing material 126 may be hardened and formed by, for example, baking, drying, or UV irradiation. In addition, after the sealing material 126 is disposed, the cover film 105 is removed.

Please return to FIG. 1B. In this embodiment, the metal layer 104a and the metal layer 104b may be patterned to form the circuit layer 106a and the circuit layer 106b. In other embodiments of the present invention, it is not limited to forming the circuit layer 106a and the circuit layer 106b, that is, the patterning step may be omitted. In addition, the step of forming the circuit layer 106a and the circuit layer 106b is not limited to after the embedded structure 120 is provided, but may be before the embedded structure 120 is provided. The embedded component circuit substrate 130 may also include a plurality of conductive vias (not shown), which may electrically connect the circuit layer 106a and the circuit layer 106b. At this point, in some embodiments of the present invention, it is sufficient to form an embedded device circuit substrate 130.

However, the present invention is not limited thereto. Referring to FIG. 1C , in the present embodiment, the step of forming the embedded component circuit substrate 130 further includes: a dielectric layer 132a is disposed on the surface 120f of the embedded structure 120, and a metal layer 134a is disposed on the dielectric layer 132a, and the dielectric layer 132a is located between the metal layer 134a and the embedded structure 120. On the other hand, a dielectric layer 132b is disposed on the surface 120s of the embedded structure 120, and a metal layer 134b is disposed on the dielectric layer 132b, and the dielectric layer 132b is located between the metal layer 134b and the embedded structure 120. The material of the dielectric layer 132a and the dielectric layer 132b may be a composite material including glass fiber and resin, such as prepreg, or other similar insulating materials.

1D and 1E , a portion of the embedded component circuit substrate 130 is removed to form a plurality of grooves 140. Each of the pads 124 is exposed at the bottom surface 140d of the groove 140. In other words, the bottom surface 140d of a groove 140 exposes a pad 124. In this embodiment, the step of forming the groove 140 includes: as shown in FIG1D , a plurality of portions 134p of the metal layer 134b can be removed by lithography and etching to form a plurality of initial grooves 140'. Since these removed portions 134p overlap with the pads 124, the initial grooves 140' overlap with the pads 124, and the bottom surface (not shown) of each initial groove 140' exposes the dielectric layer 132b.

Then, multiple portions 132p of the dielectric layer 132b are removed by laser drilling or routing to form multiple grooves 140. Referring to FIG. 1E , these removed portions 132p overlap with portions 134p respectively, and the portion 132p of the dielectric layer 132b substantially completely overlaps the portion 134p of the metal layer 134b. It is worth mentioning that, although in this embodiment, the bottom surface 140d of the groove 140 completely exposes the pad 124, the present invention is not limited thereto. In other embodiments of the present invention, the bottom surface 140d of the groove 140 may also only expose a portion of the pad 124.

Please refer to FIG. 1F . After the grooves 140 are formed, a soldering material 160 is deposited on the bottom surface 140d of each groove 140 by, for example, electroplating. The soldering material 160 directly contacts the pad 124 so that the soldering material 160 can be electrically connected to the electronic component 122. The soldering material 160 can include materials used for soldering, such as solder paste, copper paste, or silver paste. In particular, the interface 160i of the soldering material 160 is far away from the pad 124, and the interface 160i does not protrude from the surface 130s of the embedded component circuit substrate 130 (the surface 130s at this time is equivalent to the surface of the metal layer 134b). In other words, the thickness T of the soldering material 160 does not exceed the depth D of the groove 140.

In this embodiment, after depositing the solder material 160, the metal layer 134b can be removed by, for example, chemical-mechanical polishing (CMP). It should be noted that removing the metal layer 134b will change the depth D of the groove 140, so that the depth D of the groove 140 is reduced. Even so, the interface 160i of the solder material 160 still does not protrude from the surface 130s of the embedded component circuit substrate 130 (the surface 130s at this time is equivalent to the surface of the dielectric layer 132b).

3A to 3B , in another embodiment of the present invention, before depositing the solder material 160, a conductive layer 180 may be deposited on the bottom surface 140 d of the groove 140, and the conductive layer 180 directly contacts the pad 124. The material of the conductive layer 180 may include, for example, copper or a similar alloy material, and the material of the conductive layer 180 may be the same as that of the pad 124.

3A to 3B show the steps of depositing the conductive layer 180. Referring to FIG. 3A, in this embodiment, an initial conductive layer 180' is deposited on the bottom surface 140d of the groove 140, the sidewall 140w of the groove 140, and the surface (not shown) of the metal layer 134b by electroplating. Then, as shown in FIG. 3B, a photoresist material 190 such as a dry film photoresist is disposed on the initial conductive layer 180', and the photoresist material 190 is patterned by, for example, lithography and etching. After patterning the photoresist material 190, the portion of the initial conductive layer 180' located on the bottom surface 140d of the groove 140 (i.e., the portion of the initial conductive layer 180' located on the pad 124) is thickened by electroplating to form a conductive layer 180.

3C , in this embodiment, after the conductive layer 180 is formed, the photoresist material 190 is removed, and a plurality of soldering materials 160 are deposited on the conductive layer 180, and the soldering materials 160 are respectively located in the grooves 140. Since the conductive layer 180 is electrically connected to the pad 124, the conductive layer 180 located in the groove 140 can be substantially regarded as an extension of the pad 124. Furthermore, the provision of the conductive layer 180 can substantially increase the thickness of the pad 124, so that the pad 124 extends and protrudes from the surface 120s of the buried structure 120.

Returning to the embodiment of FIG. 1G , after the solder material 160 is deposited, the circuit substrate 150 is disposed on the embedded component circuit substrate 130 through the solder material 160 . The solder material 160 is located between the embedded component circuit substrate 130 and the circuit substrate 150 , and electrically connects the embedded component circuit substrate 130 and the circuit substrate 150 .

It is worth mentioning that the circuit substrate 150 includes a plurality of pads 154. When the circuit substrate 150 is disposed on the embedded component circuit substrate 130, each pad 154 is disposed corresponding to each groove 140. For example, one pad 154 is disposed in one groove 140 and directly contacts the soldering material 160 in the groove 140. The soldering material 160 is located between the pad 124 and the pad 154, and electrically connects the embedded component circuit substrate 130 and the circuit substrate 150 through the pad 124 and the pad 154, respectively.

Through the steps of FIG. 1A to FIG. 1G , an electronic package module 40 as shown in FIG. 4 can be formed. The electronic package module 40 includes an embedded component circuit substrate 130 , a plurality of grooves 140 located on a surface 130s of the embedded component circuit substrate 130 , and a plurality of solder materials 160 .

4, the embedded component circuit substrate 130 includes at least one electronic component 122, a plurality of pads 124, and a sealing material 126. The pads 124 are located on the electronic component 122 and are electrically connected to the electronic component 122. The electronic component 122 of the present invention may be a packaged chip or an unpackaged die, and the pads 124 may include metal materials, such as copper, nickel, etc.

The sealing material 126 covers the electronic component 122 and exposes the pad 124. In other words, the pad 124 is not completely covered by the sealing material 126. In this embodiment, the embedded component circuit substrate 130 further includes a dielectric layer 132a and a dielectric layer 132b, wherein the dielectric layer 132b is located between the surface 130s of the embedded component circuit substrate 130 and the sealing material 126. In this embodiment, the distance between two adjacent pads 124 is less than 70μm, but the present invention is not limited thereto, and the distance between two adjacent pads 124 may also be greater than or equal to 70μm.

Each groove 140 of the electronic package module 40 has a bottom surface 140d, and these bottom surfaces 140d expose the pads 124 respectively. Specifically, the groove 140 extends from the surface 130s of the embedded component circuit substrate 130 through the dielectric layer 132b to the pad 124, and exposes a surface (not marked) of the pad 124. It is worth mentioning that although from the cross-sectional view of Figure 4, the welding material 160 is completely and directly in contact with the side wall 140w of the groove 140, in fact, the present invention is not limited to this. Please refer to Figure 5. In the cross-sectional view cut along the line segment A-A of Figure 4, the welding material 160 does not completely cover the pad 124, and the overlapping range and position of each welding material 160 and the pad 124 may be different.

The soldering material 160 of the electronic package module 40 is respectively located on the bottom surface 140d and directly contacts the pad 124. The soldering material 160 includes an interface 160i away from the pad 124, and the interface 160i does not protrude from the surface 130s of the embedded component circuit substrate 130. For example, in this embodiment, the interface 160i of the soldering material 160 is located in the groove 140 and is recessed in the surface 130s of the embedded component circuit substrate 130, but the present invention is not limited thereto. In other embodiments of the present invention, the interface 160i of the soldering material 160 is flush with the surface 130s of the embedded component circuit substrate 130.

The electronic package module 40 further includes a circuit substrate 150, which is disposed on a soldering material 160. As shown in FIG. 4 , the soldering material 160 is located between the embedded component circuit substrate 130 and the circuit substrate 150, and electrically connects the embedded component circuit substrate 130 and the circuit substrate 150. The circuit substrate 150 further includes a plurality of pads 154, which are located on a surface 150s of the circuit substrate 150 and protrude from the surface 150s of the circuit substrate 150. The pads 154 are respectively disposed on the soldering material 160. For example, one soldering material 160 is located between one pad 124 and one pad 154, and electrically connects the pad 124 and the pad 154.

Although not shown in FIG. 4 , in other embodiments of the present invention, the circuit substrate 150 may further include a solder mask (not shown). For example, the solder mask may partially cover the surface 150s of the circuit substrate 150 and expose the pad 154. On the other hand, the circuit substrate 150 further includes a plurality of conductive vias (not shown), and these conductive vias are located between each circuit layer (not shown) of the circuit substrate 150 and electrically connect these circuit layers.

In addition, although in FIG. 4 , the embedded component circuit substrate 130 includes two circuit layers (circuit layer 106a and circuit layer 106b) and two metal layers (metal layer 134a and metal layer 134b), the number of circuit layers and metal layers in the present invention is not limited thereto. In other words, the number of circuit layers and metal layers of the embedded component circuit substrate 130 can be any number of more than one layer, for example, four layers.

In summary, when the soldering material is heated and melted during the soldering process, the grooves above each pad will limit the flow of the soldering material to prevent each soldering material from contacting each other and causing a short circuit. In addition, since the soldering material is placed in the groove and does not protrude from the groove, the alignment accuracy between the pad on the circuit substrate and the soldering material can be improved to avoid poor contact between the soldering material and the pad, thereby improving the yield of the electronic packaging module.

Although the embodiments of the present invention have been disclosed above, they are not intended to limit the embodiments of the present invention. Any person with ordinary knowledge in the relevant technical field may make some changes and modifications without departing from the spirit and scope of the embodiments of the present invention. Therefore, the protection scope of the embodiments of the present invention shall be defined by the scope of the attached patent application.

102: insulating layer 103: opening 103e: end face 104a, 104b, 134a, 134b: metal layer 105: cover film 106a, 106b: circuit layer 110: initial circuit substrate 120: embedded structure 110s, 120s, 120f, 130s, 150s: surface 122: electronic component 124, 154: pad 126: sealing material 130: embedded component circuit substrate 132a, 132b: dielectric layer 132p, 134p: part 140: groove 140': initial groove 140d: bottom surface 140w: side wall 150: circuit substrate 160: welding material 160i: interface 180: conductive layer 180’: initial conductive layer 190: photoresist material 40: electronic packaging module A-A: line segment T: thickness D: depth

The present invention can be understood from the following detailed description and the accompanying drawings. It should be noted that various features are not drawn in proportion to industry practice standards. In fact, the sizes of various features can be arbitrarily increased or decreased for the sake of clarity of discussion. Figures 1A to 1G show cross-sectional views of a method for manufacturing an electronic package module according to an embodiment of the present invention. Figures 2A to 2C show cross-sectional views of a method for manufacturing an electronic package module according to an embodiment of the present invention. Figures 3A to 3C show cross-sectional views of a method for manufacturing an electronic package module according to another embodiment of the present invention. Figure 4 shows a cross-sectional view of an electronic package module according to an embodiment of the present invention. Figure 5 shows a cross-sectional view of an electronic package module according to an embodiment of the present invention along line segment A-A of Figure 4.

Domestic storage information (please note in the order of storage institution, date, and number) None Foreign storage information (please note in the order of storage country, institution, date, and number) None

106a,106b: Circuit layer

130s,150s:Surface

122: Electronic components

124,154:Pad

126: Sealing material

130: Embedded component circuit substrate

132a, 132b: dielectric layer

134a:Metal layer

140: Groove

140d: bottom surface

150: Circuit board

160: Welding materials

160i: Interface

40: Electronic packaging module

A-A: Line segment

Claims (11)

An electronic packaging module comprises: an embedded component circuit substrate, comprising: at least one electronic component; a plurality of first pads located on the electronic component and electrically connected to the electronic component; and a sealing material covering the electronic component, wherein the sealing material exposes the first pad; a plurality of grooves located on a first surface of the embedded component circuit substrate, wherein each of the grooves has a bottom surface, wherein the bottom surface respectively exposes the first pad; a plurality of welding materials located on the bottom surface respectively and directly contacting the first pad, wherein the welding material comprises an interface away from the first pad, and the interface does not protrude from the first surface of the embedded component circuit substrate; and a circuit substrate disposed on the welding material, wherein the welding material is located between the embedded component circuit substrate and the circuit substrate, and electrically connects the embedded component circuit substrate and the circuit substrate. The electronic package module as described in claim 1, wherein the circuit substrate further comprises: a plurality of second pads located on a second surface of the circuit substrate and respectively disposed on the soldering material, wherein the soldering material is located between the first pad and the second pad and electrically connects the first pad and the second pad. The electronic package module as described in claim 1, wherein the embedded component circuit substrate further comprises: a dielectric layer located between the first surface of the embedded component circuit substrate and the sealing material, wherein the groove extends from the first surface through the dielectric layer to the first pad. An electronic package module as described in claim 1, wherein the interface of the solder material is flush with the first surface of the embedded component circuit substrate. A method for manufacturing an electronic package module comprises: providing an initial circuit substrate; setting an embedded structure in the initial circuit substrate to form an embedded component circuit substrate, wherein the embedded structure comprises at least one electronic component and a plurality of pads arranged on the electronic component, wherein the pads are exposed to a first surface of the embedded structure; removing a portion of the embedded component circuit substrate to form a plurality of grooves, and the pads are respectively exposed to a first bottom surface of the grooves; and after forming the grooves, depositing a soldering material on each of the first bottom surfaces, and the soldering material directly contacts the pads, wherein an interface of the soldering material is far away from the pads, and the interface does not protrude from a second surface of the embedded component circuit substrate. The method of claim 5, wherein the embedded structure is arranged in the initial circuit substrate, comprising: removing part of the initial circuit substrate to form an opening, wherein the opening connects two opposite sides of the initial circuit substrate; after forming the opening, a covering film is arranged on the initial circuit substrate, and the covering film completely covers one end of the opening; the electronic component is arranged on the covering film, wherein the pad arranged on the electronic component is located between the covering film and the electronic component, and the pad directly contacts the covering film; after the electronic component is arranged, a sealing material is arranged in the opening, wherein the sealing material covers the electronic component; and after filling the sealing material, the covering film is removed. The method as described in claim 5 further comprises: before depositing the welding material, depositing a conductive layer on the first bottom surface of the groove, wherein the conductive layer directly contacts the pad. As described in claim 5, forming the embedded component circuit substrate further comprises: disposing a dielectric layer on the first surface of the embedded structure; and disposing a metal layer on the dielectric layer, wherein the dielectric layer is located between the metal layer and the embedded structure. The method of claim 8 further comprises: after forming the embedded component circuit substrate, removing multiple first portions of the metal layer to form multiple initial grooves, wherein the first portions overlap with the pads respectively, and a second bottom surface of each of the initial grooves exposes the dielectric layer; and after forming the initial grooves, removing multiple second portions of the dielectric layer, wherein the second portions overlap with the first portions respectively. The method described in claim 9 further comprises: removing the metal layer after depositing the welding material. The method as described in claim 5 further comprises: after depositing the soldering material, a circuit substrate is arranged on the embedded component circuit substrate through the soldering material, wherein the soldering material electrically connects the embedded component circuit substrate and the circuit substrate.