TWI848435B - Depletion type gallium nitride transistor synchronous rectifier and power converter having the synchronous rectifier - Google Patents

Abstract

The depletion-type gallium nitride transistor synchronous rectifier of the present invention mainly includes a switching power module, a peak detection module and a gate drive module. The peak detection module stores electric energy when the negative end of the secondary coil of the power converter is at a high voltage, and provides the electric energy to the module gate of the switching power module through the gate drive module, so that the first switch is kept turned on. The switching power module includes a first switch and a D-mode GaN The second switch of the HEMT, the gate driving module, turns on the module gate of the switch power module and the module source connected to the positive end when the positive end of the secondary coil is at a negative voltage, so that the clamping circuit pulls the gate-source voltage of the second switch below the conduction threshold value, and the second switch is turned off. The synchronous rectifier of the present invention replaces the rectifying diode and has lower conduction loss and ringing response.

Description

Depletion type gallium nitride transistor synchronous rectifier and power converter having the synchronous rectifier

A synchronous rectifier and a power converter having the synchronous rectifier, in particular, a depletion gallium nitride transistor synchronous rectifier and a power converter having the synchronous rectifier.

In AC (Alternative Current)/DC (Direct Current) transformer power converters, such as a flyback converter, a diode is often used for output rectification. However, the diode will maintain a forward voltage (VTH, DS) during the forward bias period, resulting in power loss during the conduction period. In addition, the junction capacitance of the diode is prone to high-frequency oscillation during the reverse voltage charging period and the reverse recovery current during conduction, which becomes a burden on the primary electromagnetic filter of the power converter. In some high-frequency and high-voltage applications, such as the rectifier transformer at the receiving end of wireless charging, the AC frequency is as high as millions of MHz, and the loss problem of the rectifier diode will be more obvious. For example, the operating frequency of wireless charging is 6MHz and 13MHz respectively. When the received power is converted from AC to DC, it must be rectified; and the receiving voltage on the secondary side is very high. If traditional diodes on the market are used, forward bias will be generated during rectification, resulting in excessive loss and reducing the efficiency of the power converter.

In order to provide low-loss, low-vibration switching components, using active switches to replace diodes is a common option. Among them, the depletion gallium nitride components developed in recent years have excellent material properties and can achieve low gate charge, small output capacitance, zero reverse recovery current and other characteristics. However, there are several challenges in using depletion gallium nitride components as rectifier switches in secondary-side rectifier switch modules. First, the depletion gallium nitride element is a normally open element, while general power converters usually use normally closed elements to ensure safety and avoid accidental short circuits. Therefore, when using it, a negative gate voltage must be applied to the depletion gallium nitride element to keep it in a normally closed state, and the drive circuit design is relatively complex; secondly, when the output end is in a low voltage or zero voltage state, the switch module must still be able to maintain its own operating voltage to ensure the operation of the rectifier switch; finally, if it is in reverse bias, the switch module must be able to close itself to avoid current backflow. The above points are all additional considerations that must be made when using depletion gallium nitride elements as rectifier switches, forming a challenge for circuit design.

In summary, it is imperative to propose more favorable technical solutions for effectively applying depletion gallium nitride components to synchronous rectification power converters.

In order to solve the problems of the secondary-side rectifier switch of the existing power converter having high loss, high switching vibration and disadvantageous high-frequency operation, the present invention provides a depletion gallium nitride transistor synchronous rectifier (hereinafter referred to as synchronous rectifier), comprising: a switch power module, having a module gate, a module drain and a module source, the module source is connected to a coil positive connection end, the module drain is connected to a load connection end, and comprises: a first switch A first switch and a second switch are connected in series between the module source and the module drain; a clamping capacitor is connected between the module gate and a gate of the second switch; a clamping diode is connected between the gate of the second switch and the module source; and a first diode is connected between the module gate and a gate of the first switch; wherein the second switch is a depletion mode gallium nitride high electron mobility transistor (D-mode GaN HEMT); a peak detection module, including a power supply diode and a power supply capacitor, which are connected in series between the module drain of the switching power module and a negative connection terminal of a coil, and there is a connection point between the power supply diode and the power supply capacitor; and a gate drive module, having a drive control terminal, a reference terminal, a power supply terminal, a first drive terminal and a second drive terminal, the drive control terminal is electrically connected to the negative connection terminal of the coil, and the reference terminal is electrically connected to the positive connection terminal of the coil. The power supply end is electrically connected to the connection point of the power supply diode and the power supply capacitor, the second drive end is electrically connected to the module gate through a first resistor, and the first drive end is electrically connected to the module gate through a second resistor; when the voltage of the drive control end exceeds the voltage of the reference end, the reference end and the first drive end are connected; when the voltage of the drive control end is lower than the voltage of the power supply end, the power supply end and the second drive end are connected.

In addition, the present invention also provides a power converter with a depletion gallium nitride transistor synchronous rectifier, comprising: an isolation transformer having a primary coil and a secondary coil; an isolation transformer having a primary coil and a secondary coil; a primary circuit electrically connected to the primary coil, comprising a power switch, the power switch being connected between a negative end of the primary coil and a ground end; a secondary circuit comprising the depletion gallium nitride transistor synchronous rectifier as described above, the coil positive connection end being connected to a positive end of the secondary coil, and the coil negative connection end being connected to a negative end of the secondary coil.

The synchronous rectifier of the present invention is used to replace the rectifying diode on the secondary side of a flyback power converter (hereinafter referred to as the power converter). When the power converter has not started working, that is, the clamp capacitor and the power supply capacitor have not been charged, the first switch is in a non-conducting state, so the switch power module is first in a normally closed state; in the initial stage, when the input power is first input to the positive end of the primary coil of the power converter transformer, the positive end of the secondary coil is low voltage and the negative end is high voltage, and the power supply capacitor of the peak detection module is charged by the negative connection end of the coil; when the power supply capacitor is fully charged and the positive end of the secondary coil is converted to high voltage, the electric energy stored in the peak detection module is transmitted through the power supply end of the gate drive module. The second drive end provides a high voltage to the module gate of the switch power module, and the high voltage of the module gate is provided to the gate of the first switch through the first diode, so that the first switch is formed and maintained to be turned on; when the positive end of the secondary coil turns to a low voltage again, the clamping capacitor discharges through the first drive end and the reference end of the gate drive module, and the clamping circuit formed by the clamping capacitor and the clamping diode pulls the gate voltage of the second switch relative to the source to below the conduction voltage of the second switch, and the second switch is closed, completing the function of being cut off when the positive end of the secondary coil is a low voltage.

In summary, the synchronous rectifier of the present invention utilizes the peak detection module to store electric energy in the initial stage of the power converter, so as to supply the gate drive module with power to the module gate of the switch power module, and maintain the first switch in a normally open state. The subsequent switching operation is performed by the gate drive module according to the voltage of the positive connection end of the coil connected to the reference end, and no additional drive control module and drive power supply are required throughout the process, thereby solving the problem that the depletion gallium nitride field effect transistor requires a negative voltage to be turned off. As for the depletion gallium nitride high electron mobility transistor, it has the characteristics of no forward bias, low gate threshold voltage, extremely low output capacitance, zero reverse recovery current, etc. The second switch has low driving energy consumption, lower conduction loss than the diode rectifier, and lower cutoff ringing amplitude than the diode rectifier. The depletion gallium nitride transistor synchronous rectifier of the present invention can realize fast, high-frequency switching and extremely low conduction loss, and improve the performance of the power converter using the synchronous rectifier when operating at high current and high frequency.

1: Power converter

T: Isolation transformer

L _P : Primary coil

L _S : Secondary coil

1A: Primary line

1B: Secondary side line

10: Depletion gallium nitride transistor synchronous rectifier

n _LD : Load connection terminal

n _A+ : Coil positive connection terminal

n _A- : Negative connection end of coil

11: Switching power module

G: Module gate

S: Module source

D: Module drain

S1: First switch

S2: Second switch

C _gs : gate-source parasitic capacitance

C _P : Clamping Capacitance

D _P : Clamping diode

D _M :First diode

12: Peak detection module

C _PD : Power supply capacitor

D _B : Body diode

D _PD : Power Diode

R _PD : Buffer resistance

13: Gate drive module

IN: drive control terminal

VSS: Reference terminal

VDD: power supply terminal

N _OUT : First drive terminal

P _OUT : Second drive terminal

S3: The third switch

S4: The fourth switch

R _Gn : First resistor

R _Gp : Second resistor

BAT: Load

R _BAT : Load resistance

C _BAT : Load capacitance

vs _: Secondary coil voltage

v _PD : Voltage on the power supply capacitor

v _CP : Voltage on the clamping capacitor

v _gs,GaN : Gate-source voltage of the second switch

vgs _,MOS : Gate-source voltage of the first switch

t0~t4: time point

Io: output current

Figure 1 is a circuit diagram of the depletion gallium nitride transistor synchronous rectifier of the present invention.

FIG2 is a schematic circuit block diagram of a power converter having a depletion-type gallium nitride transistor synchronous rectifier according to the present invention.

Figure 3 is a schematic diagram of the operating state simulation waveform of the power converter with a depletion gallium nitride transistor synchronous rectifier of the present invention.

Figure 4 is an experimental waveform diagram of the working state of the power converter with a depletion gallium nitride transistor synchronous rectifier of the present invention.

FIG5A is another experimental waveform diagram of the working state of the power converter with a depletion-type gallium nitride transistor synchronous rectifier of the present invention.

Figure 5B is an experimental waveform diagram of the working state of a conventional power converter using a rectifying diode for rectification.

FIG6 is a graph showing the efficiency of the power converter of the present invention and the power converter using a rectifying diode for rectification versus load.

Please refer to FIG. 1 and FIG. 2 , the depletion type gallium nitride transistor synchronous rectifier 10 (hereinafter referred to as synchronous rectifier 10) of the present invention has three terminals, namely, a load connection terminal n _LD , a coil positive connection terminal n _A+ and a coil negative connection terminal n _A- . As the synchronous rectifier 10 on the secondary side of the power converter 1, the synchronous rectifier 10 is connected between the secondary side coil _LS of the power converter 1 and a load BAT. The secondary side coil _LS has a positive terminal (+) and a negative terminal (-), the coil positive connection terminal n _A+ of the synchronous rectifier 10 is connected to the positive terminal of the secondary side coil _LS , and the coil negative connection terminal n _A- is connected to the negative terminal of the secondary side coil _LS .

The synchronous rectifier 10 mainly includes a switch power module 11, a peak detection module 12 and a gate drive module 13. They are described in detail below.

The switch power module 11 has a module gate G, a module drain D and a module source S, the module source S is connected to the coil positive connection terminal nA ₊ , the module drain D is connected to the load connection terminal _nLD , and the switch power module 11 includes a first switch S1 and a second switch S2, a clamping capacitor C _P , a clamping diode D _P and a first diode _DM . Preferably, the first switch S1 is a voltage-controlled switch, such as an N-channel metal-oxide-semiconductor field-effect transistor (NMOS). The second switch S2 is a depletion-mode GaN High Electron Mobility Transistor (D-mode GaN HEMT), and the first switch S1 and the second switch S2 have a gate, a source, and a drain, respectively. The positions of the gate, source, and drain in the first switch S1 and the second switch S2 are well known to those skilled in the art, so the marking in the figure is omitted here. The first switch S1 and the second switch S2 are connected in series between the module source S and the module drain D. Specifically, the source of the first switch S1 is electrically connected to the module source S, the drain of the first switch S1 is connected to the source of the second switch S2, and the drain of the second switch S2 is connected to the module drain D. The clamping capacitor _CP is electrically connected between the module gate G and the gate of the second switch S2, the clamping diode _DP is electrically connected between the gate of the second switch S2 and the module source S, and the anode of the clamping diode _DP is connected to the gate of the second switch S2, and the cathode thereof is connected to the module source S. The clamping capacitor _CP and the clamping diode _DP form a clamping circuit between the module gate G and the gate of the second switch S2. The first diode _DM is connected between the module gate G and the gate of the first switch S1. This embodiment takes the first switch S1 as an NMOS as an example. Those skilled in the art can replace the NMOS with a switch element having similar operation and function, such as an insulated gate bipolar transistor (IGBT), a MOS-controlled transistor (MCT), etc., but the present invention is not limited thereto.

The peak detection module 12 includes a power supply diode D _PD and a power supply capacitor C _PD , which are connected in series between the module drain D of the switching power module 11 and the negative connection terminal n _A- of the coil, and there is a connection point between the power supply diode D _PD and the power supply capacitor C _PD . In more detail, an anode of the power supply diode D _PD is connected to the negative connection terminal n _A- of the coil, a cathode is connected to one end of the power supply capacitor C _PD , and the other end of the power supply capacitor C _PD is connected to the module source S. Preferably, the peak detection module 12 further includes a buffer resistor R _PD , which is electrically connected between the connection point and the power supply diode D _PD .

The gate drive module 13 has a drive control terminal IN, a reference terminal VSS, a power supply terminal VDD, a first drive terminal N _OUT and a second drive terminal P _OUT . The drive control terminal IN is electrically connected to the coil negative connection terminal n _A- , the reference terminal VSS is electrically connected to the coil positive connection terminal n _A+ , the power supply terminal VDD is electrically connected to the connection point of the power supply diode D _PD and the power supply capacitor C _PD , the first drive terminal N _OUT is electrically connected to the module gate G through the first resistor RG _,n, and the second drive terminal P _OUT is electrically connected to the module gate G through the second resistor RG _,p. Preferably, the resistance value of the first resistor _RG,n is less than or equal to the resistance value of the second resistor _RG,p . When the voltage of the drive control terminal IN exceeds the voltage of the reference terminal VSS, the reference terminal VSS and the first drive terminal _NOUT are connected; when the voltage of the drive control terminal IN is lower than the voltage of the power supply terminal VDD, the power supply terminal VDD and the second drive terminal _POUT are connected. In more detail, the gate drive module 13 includes a third switch S3 and a fourth switch S4. The third switch S3 is an NMOS, and the fourth switch S4 is a PMOS (P-channel metal-oxide-semiconductor field-effect transistor, PMOS), each having a gate, a source, and a drain. The source of the third switch S3 is connected to the reference terminal VSS, and the drain is connected to the first drive terminal N _OUT . The source of the fourth switch S4 is connected to the power supply terminal VDD, and the drain is connected to the second drive terminal P _OUT . The gates of the third switch S3 and the fourth switch S4 are both connected to the drive control terminal IN. When the voltage of the drive control terminal IN exceeds the voltage of the reference terminal VSS and the threshold voltage of the third switch S3, the third switch S3 is turned on, so that the drive input terminal and the reference terminal VSS are connected; when the voltage of the drive control terminal IN is lower than the voltage of the power supply terminal VDD and the threshold voltage of the fourth switch S4, the fourth switch S4 is turned on, so that the power supply terminal VDD and the second drive terminal P _OUT are connected.

As shown in FIG. 2 , the power converter 1 having the synchronous rectifier 10 includes an isolation transformer T, a primary circuit 1A and a secondary circuit 1B. The isolation transformer T has a primary coil _LP and a secondary coil _LS . The primary circuit 1A is electrically connected to the primary coil _LP and mainly includes a power switch Q1. The power switch Q1 is electrically connected between a negative end of the primary coil _LP and a ground end to control the power input from an input power source VIN to the primary coil _LP . The primary circuit 1B mainly includes the synchronous rectifier 10, the coil positive connection terminal n _A+ is connected to the positive terminal (+) of the secondary coil _LS , and the coil negative connection terminal n _A- is connected to a negative terminal (-) of the secondary coil _LS . The load connection terminal n _LD of the synchronous rectifier 10 is used to connect a load BAT, and the load BAT is, for example, a battery, which has a load resistor _RBAT and a load capacitor C _BAT . Generally speaking, the resistance of the load resistor _RBAT is very small and can be ignored. More specifically, the power converter 1 is a flyback power converter 1 (Flyback Converter).

Please refer to the circuit _{waveform diagram in Figure 3, which shows the secondary coil LS voltage vs ,} the voltage on the power supply capacitor _CPD vPD , the voltage on the clamping capacitor _{Cp vCP ,} the gate-source voltage of the first switch S1 vgs _,MOS , and the gate-source voltage of the second switch S2 vgs _{,GaN from top} to bottom. vs _,high is the highest voltage that can be generated on the secondary coil _LS when the power switch Q1 is turned on, and vGaN _,On is the threshold voltage of the second switch S2. In addition, the polarity of the secondary winding _LS voltage vs is determined by the direction of the current _passing through the synchronous rectifier 10. The polarities _{of vs} , vPD _, and vCP are all indicated in FIG1. Next, the operation of the synchronous rectifier 10 in the power converter 1 will be described by the voltage changes at each _point between time points t0 and t4.

Before time point t0: the power converter 1 has not yet started, the voltage on the primary coil _LP and the voltage v _s on the secondary coil _LS are 0, and the potential difference has not yet been established on the clamping capacitor _CP of the switching power module 11, the gate-source voltage vgs _,GaN of the second switch S2 is 0, the second switch S2 is turned on, the gate-source voltage vgs _,MOS of the first switch S1 is also 0, and the first switch S1 is not turned on. Since the first switch S1 and the second switch S2 are connected in series, there is no conduction between the module source S and the module drain D at this time, that is, the synchronous rectifier 10 is in a non-conducting state before it is started, realizing the requirements of a normally-off device.

Time point t0~t1: The power switch Q1 of the primary line 1A is turned on for the first time at time point t0, and the secondary coil _LS voltage vs _is negative ( vs _< 0), that is, the positive connection terminal nA ₊ of the synchronous rectifier 10 is low voltage, and the negative connection terminal _nA- of the coil is high voltage. The power supply capacitor _CPD is charged from the negative connection terminal _nA- of the coil through the power supply diode _DPD , and its charging direction is as shown in Figure 1, and the connection point is a positive voltage end. Preferably, the buffer resistor _RPD reduces the charging speed of the power supply capacitor _CPD to avoid large voltage fluctuations. In addition, since the voltage at the positive connection terminal nA _{+ of} the coil is negative at this time, the clamping capacitor _CP has not been charged yet, the gate-source voltage vgs _,MOS of the first switch S1 is 0, which is less than its threshold voltage, and the first switch S1 remains non-conductive. The gate-source voltage vgs _{,GaN of} the second switch S2 is still 0, and the second switch S2 is in the conductive state. According to the connection direction of the first switch S1, when the first switch S1 is non-conductive, the body diode _DB (Body Diode) of the first switch S1 can block the current backflow from the load connection terminal _nLD .

Time point t1~t2: The power switch Q1 of the primary line 1A is switched to non-conducting state ((1-δ)T) at time point t1, and the secondary coil _LS voltage vs _is positive ( vs _> 0), that is, the positive connection terminal nA ₊ of the synchronous rectifier 10 is a high voltage, and the negative connection terminal _nA- of the coil is a low voltage. When the voltage of the driving control terminal IN of the gate driving module 13 is lower than the threshold voltage of the fourth switch S4 compared to the power supply terminal VDD, the fourth switch S4 is turned on, and the power supply capacitor C _PD supplies power to the module gate G of the switching power module 11 through the fourth switch S4 and the second resistor RG _,p, and the clamping capacitor _CP is charged to the same potential as the power supply capacitor C _PD . When the voltage of the clamping capacitor _CP is high enough, it is provided to the gate of the first switch S1 through the first diode _DM , so that the gate-to-source voltage vgs _,MOS of the first switch S1 exceeds its threshold voltage, and the first switch S1 is turned on. At the same time, due to v _PD = v _CP , the gate-source voltage v _gs,GaN of the second switch S2 is v _PD - v _CP =0, and the second switch S2 is in the on state.

Time point t2~t3: The power switch Q1 of the primary line 1A is switched on again at time point t2 (δT), and the secondary coil _LS voltage vs _is negative ( vs _< 0), that is, the positive connection terminal nA ₊ of the synchronous rectifier 10 is a low voltage, and the negative connection terminal _nA- of the coil is a high voltage. At this time, since the reference terminal VSS voltage of the gate drive module 13 is lower than the drive control terminal IN, and the voltage difference exceeds the threshold voltage of the third switch S3, the third switch S3 is turned on, and the module gate G of the switch power module 11 is connected to the positive connection terminal n _a+ of the coil through the first resistor _RG,n and the gate drive module 13. The clamping circuit formed by the clamping capacitor _CP and the clamping diode _DP makes the gate-source voltage vgs _,GaN of the second switch _S2 -vCP , which is lower than the threshold voltage VGaN _,ON of the second switch S2. The second switch S2 is turned off, so that when the secondary coil L When _{the S} voltage vs <0, the synchronous rectifier 10 forms an open circuit function.

Time point t3~t4: The power switch Q1 of the primary line 1A is switched to non-conducting again at time point t3, and the secondary coil _LS voltage vs _is positive ( vs _> 0), that is, the positive connection terminal nA ₊ of the synchronous rectifier 10 is a high voltage, and the negative connection terminal _nA- of the coil is a low voltage. The charge stored in the gate-source parasitic capacitor _Cgs of the first switch S1 during the period t1~t2 is blocked by the first diode _DM and cannot be released, so the first switch S1 remains turned on; further, the voltage of the drive control terminal IN of the gate drive module 13 is again lower than the voltage of the power supply terminal VDD, so that the fourth switch S4 is turned on, and the power supply capacitor _CPD supplies power to the clamping capacitor _CP through the fourth switch S4, and the gate-source voltage vgs _,GaN of the second switch S2 _is vPD - vCP =0, _and the second switch S2 is turned on again. The first switch S1 and the second switch S2 are both turned on, so that when the secondary coil _{LS voltage} vs >0, the synchronous rectifier 10 is turned on.

At this point, the synchronous rectifier 10 has completed initial charging and a complete switching cycle.

FIG4 is an experimental waveform diagram of the working state of the synchronous rectifier 10 of the present invention. It can be seen from FIG4 that the gate-source voltage vgs _,MOS of the first switch S1 is maintained at a high potential difference, so the first switch S1 is always turned on, and the gate-source voltage vgs _,GaN of the second switch is switched to a high potential difference when the voltage at the positive connection terminal nA ₊ of the coil is switched to a positive voltage, so the second switch is switched to conduction when vgs _{,GaN is} vs > vGaN _,ON , so that the positive end voltage of the secondary side coil _LS is output to the load through the synchronous rectifier 10.

、

為整流器切換所產生的輸出電壓v _BAT 主要震盪部位，標示

為整流器切換所產生的二次側線圈L_S電壓v _S 主要震盪部位。波形圖中各電壓之正負極性均標示於圖1相應之元件位置上。 FIG5A shows an experimental waveform diagram of the power converter 1 of the present invention using the synchronous rectifier 10 under heavy load, and FIG5B shows an experimental waveform diagram of the power converter using a rectifying diode as secondary-side rectification under heavy load. The two power converters compared in the experiment differ only in that the secondary-side rectifying elements are the synchronous rectifier of the present invention and a diode, wherein the diode used for comparison is RFN10T2D. The sampled waveforms are the secondary-side coil _LS voltage v _S , an output voltage v _BAT at the load connection terminal n _LD , and a conduction current i _S through the synchronous rectifier 10. The waveforms marked

,

The output voltage v _BAT generated by the rectifier switching mainly oscillates at the location marked

_{This is the main oscillation location of the secondary coil LS voltage vS generated} by the rectifier switching. The positive and negative polarities of each voltage in the waveform are marked on the corresponding component position in Figure 1.

、

、

及5B中的

、

、

可知，圖5A中的二次側線圈L_S電壓v _S 及負載連接端n_LD的輸出電壓v _BAT 在同步整流器10切換 時，均呈現較平滑的切換響應；相對的，圖5B中的以二極體進行整流的二次側線圈L_S電壓v _S 及負載連接端n_LD的輸出電壓v _BAT 具有明顯幅度較大的電壓震盪。從圖5A、5B的實驗波形圖可知，本發明的同步整流器10明顯改進了切換時的切換振鈴問題。 Compare Figure 5A

,

,

and 5B

,

,

It can be seen that the secondary coil _LS voltage v _S and the output voltage v _BAT of the load connection terminal n _LD in FIG5A both present a relatively smooth switching response when the synchronous rectifier 10 switches; in contrast, the secondary coil _LS voltage v _S and the output voltage v _BAT of the load connection terminal n _LD in FIG5B rectified by a diode have a voltage oscillation with a significant amplitude. It can be seen from the experimental waveforms of FIG5A and FIG5B that the synchronous rectifier 10 of the present invention has significantly improved the switching ringing problem during switching.

FIG. 6 shows the efficiency-load curves of the power converter 1 using the synchronous rectifier 10 and the power converter using a diode as secondary-side rectification according to the present invention. In the experiment, when the output current Io<1.75A (light load), since the power converter 1 operates in a discontinuous current mode, the module gate G voltage of the switching power module 11 is not sufficient to be charged to a voltage that can effectively drive the second switch S2, so the efficiency is low; when the output current Io>1.75A (heavy load), the power converter 1 of the present invention using the synchronous rectifier 10 starts to operate in a continuous current mode. It can be clearly seen that the efficiency of the power converter 1 of the present invention exceeds the efficiency of the traditional power converter 1 using a diode as the secondary side rectification by about 2%. Therefore, the synchronous rectifier 10-phase rectifier diode of the present invention has significantly better power transmission efficiency under heavy load.

From the above operation principle and experimental waveform of the synchronous rectifier 10, it can be seen that when the power supply capacitor C _PD is fully charged during t0-t1, and the clamping capacitor C _P is fully charged through the gate driver module 13 during t1-t2, the first switch S1 is kept in the on state during the subsequent operation of the power converter 1, and the actual switching operation is performed by the second switch S2 (D-mode GaN HEMT), so it has at least the following advantages:

1. The D-mode GaN HEMT replaces the traditional diode as a switch. The module drain D and the module source S of the synchronous rectifier 10 do not have a forward bias when conducting, avoiding the problem of voltage drop power loss on the traditional rectifier diode, so that the power converter 1 of the present invention effectively improves the overall conversion efficiency at large output current and high load.

2. According to the characteristics of D-mode GaN HEMT, the second switch S2 does not have a body diode of NMOS or PMOS, and since the first switch S1 is kept in a conducting state during the operation of the synchronous rectifier 10, the body diode _DB of the first switch S1 has very little effect during the operation of the synchronous rectifier 10. Therefore, when the second switch S2 of the synchronous rectifier 10 is switched to non-conducting, the reverse recovery current effect generated in the synchronous rectifier 10 is very low, thereby reducing the voltage oscillation when the synchronous rectifier 10 is turned off and reducing the electromagnetic interference generated by the power converter.

3. Based on the low output capacitance characteristics of the D-mode GaN HEMT, the voltage oscillation generated when the synchronous rectifier 10 switches from non-conduction to conduction is also lower, making the voltage curve of the power converter during the coil energy storage period smoother, further reducing the electromagnetic interference generated by the power converter.

The above is only an embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as above by the embodiment, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modifications to equivalent embodiments of equivalent changes by using the technical contents disclosed above within the scope of the technical solution of the present invention. However, any simple modification, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.

L _S : Secondary coil 10: Depletion gallium nitride transistor synchronous rectifier n _LD : Load connection terminal n _A+ : Coil positive connection terminal n _A- : Coil negative connection terminal 11: Switching power module G: Module gate S: Module source D: Module drain S1: First switch S2: Second switch C _gs : Gate-source parasitic capacitance C _P : Clamping capacitance D _P : Clamping diode D _M : First diode 12: Peak detection module C _PD : Power supply capacitor D _B : Body diode D _PD : Power supply diode R _PD : Buffer resistor 13: Gate driver module IN: Driver control terminal VSS: Reference terminal VDD: Power supply terminal N _OUT : First driver terminal P _OUT : Second driver terminal S3: Third switch S4: Fourth switch R _Gn : First resistor R _Gp : Second resistor BAT: Load R _BAT : Load resistor C _BAT : Load capacitor _vs : Secondary coil voltage

Claims (8)

A depletion-type gallium nitride transistor synchronous rectifier comprises: a switching power module having a module gate, a module drain and a module source, the module source is connected to a coil positive connection end, the module drain is connected to a load connection end, and comprises: a first switch and a second switch, which are connected in series between the module source and the module drain; a clamp A first diode is connected between the module gate and a gate of the first switch; wherein the second switch is a depletion mode gallium nitride high electron mobility transistor (D-mode GaN HEMT); a peak detection module, including a power supply diode and a power supply capacitor, which are connected in series between the module drain of the switching power module and a negative connection terminal of a coil, and there is a connection point between the power supply diode and the power supply capacitor; and a gate drive module, having a drive control terminal, a reference terminal, a power supply terminal, a first drive terminal and a second drive terminal, the drive control terminal is electrically connected to the negative connection terminal of the coil, and the reference terminal is electrically connected to the positive connection terminal of the coil , the power supply end is electrically connected to the connection point of the power supply diode and the power supply capacitor, the first drive end is electrically connected to the module gate through a first resistor, and the second drive end is electrically connected to the module gate through a second resistor; when the voltage of the drive control end exceeds the voltage of the reference end, the reference end and the first drive end are connected; when the voltage of the drive control end is lower than the voltage of the power supply end, the power supply end and the second drive end are connected. The depletion gallium nitride transistor synchronous rectifier as described in claim 1, wherein the peak detection module comprises: a buffer resistor electrically connected between the connection point and the power supply diode. A depletion gallium nitride transistor synchronous rectifier as described in claim 1, wherein, a source of the first switch is electrically connected to the source of the module, a drain of the first switch is connected to a source of the second switch, and a drain of the second switch is connected to the drain of the module. The depletion gallium nitride transistor synchronous rectifier as described in claim 1, wherein the gate drive module comprises: a third switch electrically connected between the power supply terminal and the first drive terminal, and having a control terminal connected to the drive control terminal; a fourth switch electrically connected between the second drive terminal and the reference terminal, and having a control terminal connected to the drive control terminal; wherein, when the voltage of the drive control terminal of the gate drive module exceeds the voltage of the reference terminal by a threshold voltage of the third switch, the third switch is turned on; when the voltage of the drive control terminal of the gate drive module is lower than the voltage of the power supply terminal by a threshold voltage of the fourth switch, the fourth switch is turned on. The depletion-type gallium nitride transistor synchronous rectifier as described in claim 4, wherein the third switch is an N-channel metal oxide semiconductor field effect transistor (NMOS), having a gate, a source and a drain, the source of the third switch is connected to the reference terminal, the drain of the third switch is connected to the first drive terminal, and the gate of the third switch is connected to the drive control terminal; the fourth switch is a P-channel metal oxide semiconductor field effect transistor (PMOS), having a gate, a source and a drain, the source of the fourth switch is connected to the power supply terminal, the drain of the fourth switch is connected to the second drive terminal, and the gate of the fourth switch is connected to the drive control terminal. A depletion gallium nitride transistor synchronous rectifier as described in claim 1, wherein the resistance value of the first resistor is less than or equal to the resistance value of the second resistor. A power converter with a depletion gallium nitride transistor synchronous rectifier comprises: an isolation transformer having a primary coil and a secondary coil; a primary circuit electrically connected to the primary coil, comprising a power switch electrically connected between a negative end of the primary coil and a ground end; a secondary circuit comprising a depletion gallium nitride transistor synchronous rectifier as described in any one of claims 1 to 6, the positive connection end of the coil being connected to a positive end of the secondary coil, and the negative connection end of the coil being connected to a negative end of the secondary coil. The power converter with a depletion gallium nitride transistor synchronous rectifier as described in claim 7 is a flyback power converter.