TWI848382B - Processing method for flip-chip VCSEL structure with high refractive index contrast DBR - Google Patents
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- 238000003672 processing method Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 29
- 229910052751 metal Inorganic materials 0.000 claims abstract description 17
- 239000002184 metal Substances 0.000 claims abstract description 17
- 230000003287 optical effect Effects 0.000 claims abstract description 16
- 238000005530 etching Methods 0.000 claims description 18
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 16
- 229910052593 corundum Inorganic materials 0.000 claims description 16
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 16
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 12
- 230000003647 oxidation Effects 0.000 claims description 10
- 238000007254 oxidation reaction Methods 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 238000009713 electroplating Methods 0.000 claims description 8
- 238000002161 passivation Methods 0.000 claims description 8
- 230000002093 peripheral effect Effects 0.000 claims description 8
- 238000005520 cutting process Methods 0.000 claims description 6
- 125000006850 spacer group Chemical group 0.000 claims description 5
- 238000000231 atomic layer deposition Methods 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 230000008020 evaporation Effects 0.000 claims description 4
- 238000001704 evaporation Methods 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 4
- 238000003486 chemical etching Methods 0.000 claims description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 abstract description 16
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 abstract description 8
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 230000017525 heat dissipation Effects 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 21
- 238000010586 diagram Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 description 1
- 101001121408 Homo sapiens L-amino-acid oxidase Proteins 0.000 description 1
- 102100026388 L-amino-acid oxidase Human genes 0.000 description 1
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 1
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18361—Structure of the reflectors, e.g. hybrid mirrors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/024—Arrangements for thermal management
- H01S5/02461—Structure or details of the laser chip to manipulate the heat flow, e.g. passive layers in the chip with a low heat conductivity
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S2304/00—Special growth methods for semiconductor lasers
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Abstract
本發明涉及一種高折射率對比DBR的倒裝VCSEL結構的工藝方法,以歐姆金屬取代了部分Al2O3,散熱襯底、AlGaAs/歐姆金屬所形成的高導熱、低電阻導通路徑,使得光學路徑和電學路徑分離。Al2O3/AlyGa1-yAs DBR形成的堆疊結構可以減少DBR層對數,改變了以最高Al組分作為電流孔徑限制層的做法,使得電學性能和光學性能得到顯著提高,提高了轉換效率及總輸出功率。 The present invention relates to a process method for a flip-chip VCSEL structure of a high refractive index contrast DBR, in which part of Al 2 O 3 is replaced by ohmic metal, and a high thermal conductivity and low resistance conduction path formed by a heat dissipation substrate and AlGaAs/ohmic metal is used to separate the optical path from the electrical path. The stacked structure formed by Al 2 O 3 / AlyGa1 -yAs DBR can reduce the number of DBR layer logarithms, changing the practice of using the highest Al component as the current aperture limiting layer, so that the electrical and optical performances are significantly improved, and the conversion efficiency and total output power are improved.
Description
本發明涉及VCSEL技術領域,尤其涉及一種高折射率對比DBR的倒裝VCSEL結構的工藝方法。 The present invention relates to the field of VCSEL technology, and in particular to a process method for a flip-chip VCSEL structure with a high refractive index contrast DBR.
現有主流的砷化鎵基VCSEL的結構有以下特徵: The current mainstream GaAs-based VCSEL structure has the following characteristics:
1.電流局限由氧化工藝將AlGaAs轉化成Al2O3,週邊被氧化的形成電流局限層,沒被氧化的形成電流通道。整體的電流通道較小,且AlGaAs本身就是比較難摻雜的半導體材料,相較於金屬而言電阻較高。 1. Current confinement AlGaAs is converted into Al 2 O 3 by oxidation process. The oxidized part forms the current confinement layer, and the unoxidized part forms the current channel. The overall current channel is small, and AlGaAs itself is a semiconductor material that is difficult to dope, and has a higher resistance than metal.
2.AlGaAs被氧化之後所形成的Al2O3屬於絕緣體,同時扮演著這電流局限及光學局限(破壞諧振腔)的功能。 2. Al2O3 formed after AlGaAs is oxidized is an insulator, which plays the role of current limitation and optical limitation (destroying the resonant cavity).
3.即便倒裝結構也僅限於晶片表面,未深及DBR內部。 3. Even the flip-chip structure is limited to the chip surface and does not reach deep into the DBR.
鑒於上述狀況,有必要提出一種高折射率對比DBR的倒裝VCSEL結構的工藝方法。 In view of the above situation, it is necessary to propose a process method for a flip-chip VCSEL structure with a high refractive index contrast DBR.
為了解決上述技術問題,本發明採用的技術方案為:一種高折射率對比DBR的倒裝VCSEL結構的工藝方法,包括以下步驟:將一第二DBR區的主要DBR AlxGa1-xAs/AlyGa1-yAs(x>y,0y<1)中高Al%組分AlxGa1-xAs的部分進行完全氧化,使其轉變成Al2O3,在所需的光學路徑上形成Al2O3/AlyGa1-yAs DBR堆疊結構,並以結構中最臨近有源區的至少一層中Al%組分AlzGa1-zAs形成 一電流孔徑,且層間以AlyGa1-yAs作為一間隔層,並通過控制其氧化速率控制該電流孔徑的大小,其中Al%組分滿足x>z>y;將週邊部分完全氧化所形成的Al2O3以化學蝕刻方式去除,保留光學路徑的Al2O3/AlyGa1-yAs DBR堆疊結構;及去除週邊部分的Al2O3所形成的空間以原子層沉積、濺鍍、蒸鍍及電鍍中的一種或多種組合方式填充歐姆金屬,以形成低電阻的電學導通路徑。 In order to solve the above technical problems, the technical solution adopted by the present invention is: a process method for a flip-chip VCSEL structure with a high refractive index contrast DBR, comprising the following steps: a main DBR AlxGa1 -xAs / AlyGa1-yAs ( x>y, 0 y<1) is completely oxidized to convert the high Al% component AlxGa1 -xAs into Al2O3 , forming an Al2O3 / AlyGa1 -yAs DBR stacking structure on the desired optical path, and forming a current aperture with at least one layer of Al% component AlzGa1 -zAs closest to the active region in the structure, and AlyGa1 -yAs is used as a spacer between the layers, and the size of the current aperture is controlled by controlling its oxidation rate, wherein the Al% component satisfies x>z>y; removing the Al2O3 formed by the complete oxidation of the peripheral part by chemical etching, retaining the Al2O3 / AlyGa1 -yAs DBR stacking structure of the optical path; and removing the Al2O3 in the peripheral part The space formed by 3 is filled with ohmic metal by one or a combination of atomic layer deposition, sputtering, evaporation and electroplating to form a low-resistance electrical conduction path.
進一步的,還包括:外延結構成長,從下至上依次形成一GaAs襯底、一第一DBR區、一有源區、一第二DBR區;平臺蝕刻,即蝕刻該第二DBR區形成一一次蝕刻平臺;第一電極製作,在該一次蝕刻平臺上形成第一電極。 Furthermore, it also includes: epitaxial structure growth, forming a GaAs substrate, a first DBR region, an active region, and a second DBR region from bottom to top; platform etching, that is, etching the second DBR region to form a primary etching platform; first electrode manufacturing, forming the first electrode on the primary etching platform.
進一步的,還包括散熱襯底鍵合,即在該第二DBR區遠離該有源區的一端鍵合散熱襯底。 Furthermore, it also includes heat sink substrate bonding, that is, bonding the heat sink substrate at one end of the second DBR region away from the active region.
進一步的,該散熱襯底包括Mo、Si、Cu、CuW中的一種或多種。 Furthermore, the heat sink includes one or more of Mo, Si, Cu, and CuW.
進一步的,還包括GaAs襯底去除、第二電極製作、鈍化保護/襯底切割、第二電極電鍍連接。 Furthermore, it also includes GaAs substrate removal, second electrode fabrication, passivation protection/substrate cutting, and second electrode electroplating connection.
本發明的有益效果在於:以歐姆金屬取代了部分Al2O3,該散熱襯底、AlGaAs/歐姆金屬所形成的高導熱、低電阻導通路徑,使得光學路徑和電學路徑分離。Al2O3/AlyGa1-yAs DBR形成的堆疊結構可以減少DBR層對數,改變了以最高Al組分作為電流孔徑限制層的做法,使得電學性能和光學性能得到顯著提高,提高了轉換效率及總輸出功率。 The beneficial effect of the present invention is that part of Al 2 O 3 is replaced by ohmic metal, and the high thermal conductivity and low resistance conduction path formed by the heat sink, AlGaAs/ohmic metal separates the optical path from the electrical path. The stacked structure formed by Al 2 O 3 / AlyGa1 -yAs DBR can reduce the number of DBR layers, changing the practice of using the highest Al component as the current aperture limiting layer, so that the electrical and optical performances are significantly improved, and the conversion efficiency and total output power are improved.
100:第一DBR區 100: First DBR Zone
110:堆疊結構 110: Stack structure
120:歐姆金屬 120: Ohm metal
130:電流孔徑 130: Current aperture
140:Al2O3層 140:Al 2 O 3 layers
150:間隔層 150: Interlayer
200:有源區 200: Active area
300:第二DBR區 300: Second DBR Zone
400:散熱襯底 400: Heat dissipation lining
500:第一電極 500: First electrode
600:第二電極 600: Second electrode
700:鈍化層 700: Passivation layer
800:GaAs襯底 800:GaAs substrate
(a)~(f):方法步驟 (a)~(f): Method steps
圖1是本發明實施例一種高折射率對比DBR的倒裝VCSEL結構的示意圖;圖2是本發明實施例一種高折射率對比DBR的倒裝VCSEL結構的另一實施方式的示意圖; 圖3是本發明實施例一種高折射率對比DBR的倒裝VCSEL結構及其工藝方法的結構示意圖。 FIG1 is a schematic diagram of a flip-chip VCSEL structure of a high refractive index contrast DBR in an embodiment of the present invention; FIG2 is a schematic diagram of another embodiment of a flip-chip VCSEL structure of a high refractive index contrast DBR in an embodiment of the present invention; FIG3 is a schematic diagram of a flip-chip VCSEL structure of a high refractive index contrast DBR and its process method in an embodiment of the present invention.
為了使本發明的目的、技術方案及優點更加清楚明白,以下結合附圖及實施例,對本發明一種高折射率對比DBR的倒裝VCSEL結構及工藝方法進行進一步詳細說明。應當理解,此處所描述的具體實施例僅用以解釋本發明,並不用於限定本發明。 In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the following is a further detailed description of the flip-chip VCSEL structure and process method of a high refractive index contrast DBR of the present invention in combination with the attached figures and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention and are not intended to limit the present invention.
請參照圖1-圖3,一種高折射率對比DBR的倒裝VCSEL結構,從上至下依次包括:一第一DBR區100、一有源區200、一第二DBR區300和一散熱襯底400;其中,在該第二DBR區300內,高鋁含量AlxGa1-xAs其中的x由該有源區200到表面逐漸遞減,一堆疊結構110由Al2O3/AlyGa1-yAs組成並且其中的y由該有源區200到表面逐漸遞增,該堆疊結構110上下兩側有Al2O3層140,該堆疊結構110外填充有歐姆金屬120,在該有源區200的下方最臨近該有源區200的至少一層中Al%組分AlzGa1-zAs形成一電流孔徑130,且層間以AlyGa1-yAs作為一間隔層150,作為器件串聯電阻及光型的調整手段,其中x>z>y。 Referring to FIG. 1 to FIG. 3 , a flip-chip VCSEL structure with a high refractive index contrast DBR includes, from top to bottom, a first DBR region 100, an active region 200, a second DBR region 300, and a heat sink 400. In the second DBR region 300, the x of the high aluminum content Al x Ga 1-x As gradually decreases from the active region 200 to the surface, and a stacking structure 110 is composed of Al 2 O 3 / Aly Ga 1-y As and the y of the stacking structure 110 gradually increases from the active region 200 to the surface. The stacking structure 110 has Al 2 O 3 on both sides. 3 layers 140, the stacked structure 110 is filled with ohmic metal 120, and a current aperture 130 is formed in at least one layer of Al% component AlzGa1 -zAs below the active area 200 and closest to the active area 200, and AlyGa1 -yAs is used as a spacer 150 between the layers as a means to adjust the device series resistance and light type, where x>z>y.
以歐姆金屬120取代了部分Al2O3,該散熱襯底400、AlGaAs/歐姆金屬120所形成的高導熱、低電阻導通路徑,使得光學路徑和電學路徑分離。Al2O3/AlyGa1-yAs DBR形成的堆疊結構110可以減少DBR層對數,改變了以最高Al組分作為該電流孔徑130限制層的做法,使得電學性能和光學性能得到顯著提高,轉換效率高,功率高。 The ohm metal 120 replaces part of Al 2 O 3 , and the high thermal conductivity and low resistance conduction path formed by the heat sink 400 and AlGaAs/ohm metal 120 separates the optical path from the electrical path. The stacked structure 110 formed by Al 2 O 3 / AlyGa1 -yAs DBR can reduce the number of DBR layers, changing the practice of using the highest Al component as the current aperture 130 limiting layer, so that the electrical and optical performances are significantly improved, and the conversion efficiency and power are high.
優選的,該電流孔徑130的直徑小於該堆疊結構110的直徑。 Preferably, the diameter of the current aperture 130 is smaller than the diameter of the stacked structure 110.
請參照圖1和圖2,特別的,該第一DBR區100為p-DBR,p-DBR上設有p電極;該第二DBR區300為n-DBR,n-DBR連接有n電極。 Please refer to FIG. 1 and FIG. 2 , in particular, the first DBR region 100 is a p-DBR, and a p-electrode is provided on the p-DBR; the second DBR region 300 is an n-DBR, and an n-electrode is connected to the n-DBR.
進一步的,該散熱襯底400包括金屬襯底或高雜質摻雜Si襯底。 Furthermore, the heat sink substrate 400 includes a metal substrate or a highly impurity-doped Si substrate.
進一步的,該散熱襯底400包括Mo、Si、Cu、CuW中的一種或多種。 Furthermore, the heat sink 400 includes one or more of Mo, Si, Cu, and CuW.
請參照圖3,本發明還提供一種高折射率對比DBR的倒裝VCSEL結構的工藝方法,包括以下步驟:將該第二DBR區300的主要DBRAlxGa1-xAs/AlyGa1-yAs(x>y,0y<1)中高Al%組分AlxGa1-xAs的部分進行完全氧化,使其轉變成Al2O3,在所需的光學路徑上形成Al2O3/AlyGa1-yAs DBR堆疊結構110,並以結構中最臨近該有源區200的至少一層中Al%組分AlzGa1-zAs形成該電流孔徑130,且層間以AlyGa1-yAs作為該間隔層150,並通過控制其氧化速率控制該電流孔徑130的大小,其中Al%組分滿足x>z>y;將週邊部分完全氧化所形成的Al2O3以化學蝕刻方式去除,保留光學路徑的Al2O3/AlyGa1-yAs DBR堆疊結構110;去除週邊部分的Al2O3所形成的空間以原子層沉積、濺鍍、蒸鍍及電鍍中的一種或多種組合方式填充歐姆金屬120,以形成低電阻的電學導通路徑。 3, the present invention also provides a method for manufacturing a flip-chip VCSEL structure with a high refractive index contrast DBR , comprising the following steps : y<1) is completely oxidized to convert the Al2O3 / AlyGa1-yAs DBR stack structure 110 on the desired optical path, and the current aperture 130 is formed by using the Al% component AlzGa1-zAs in at least one layer closest to the active region 200 in the structure, and the spacer 150 is used as AlyGa1 -yAs between the layers, and the size of the current aperture 130 is controlled by controlling the oxidation rate thereof, wherein the Al % component satisfies x>z>y; the Al2O3 formed by the complete oxidation of the peripheral part is removed by chemical etching, and the Al2O3 / AlyGa1 -yAs in the optical path is retained. The DBR stack structure 110 is formed by removing the peripheral Al 2 O 3 and then filling the space with ohmic metal 120 by one or more combinations of atomic layer deposition, sputtering, evaporation and electroplating to form a low-resistance electrical conduction path.
請參照圖3,還包括:外延結構成長,從下至上依次形成一GaAs襯底800、該第一DBR區100、該有源區200、該第二DBR區300;平臺蝕刻,即蝕刻該第二DBR區300形成一一次蝕刻平臺;及第一電極500製作,在該一次蝕刻平臺上形成第一電極500。 Please refer to Figure 3, which also includes: epitaxial structure growth, forming a GaAs substrate 800, the first DBR region 100, the active region 200, and the second DBR region 300 from bottom to top; platform etching, that is, etching the second DBR region 300 to form a primary etching platform; and the first electrode 500 is manufactured, forming the first electrode 500 on the primary etching platform.
請參照圖3,還包括散熱襯底鍵合,即在該第二DBR區300遠離該有源區200的一端鍵合該散熱襯底400。 Please refer to FIG. 3 , which also includes heat sink substrate bonding, that is, the heat sink substrate 400 is bonded at one end of the second DBR region 300 away from the active region 200.
進一步的,該散熱襯底400包括Mo、Si、Cu、CuW中的一種或多種。 Furthermore, the heat sink 400 includes one or more of Mo, Si, Cu, and CuW.
請參照圖3,還包括GaAs襯底800去除、第二電極600製作、鈍化保護/襯底切割、第二電極600電鍍連接。 Please refer to Figure 3, which also includes the removal of GaAs substrate 800, the production of the second electrode 600, passivation protection/substrate cutting, and electroplating connection of the second electrode 600.
特別的,請參照圖3,在第二電極600與該散熱襯底400之間,該第一DBR區100、該有源區200、該第二DBR區300外還設有一鈍化層700。 In particular, please refer to FIG. 3 , between the second electrode 600 and the heat sink 400 , a passivation layer 700 is provided outside the first DBR region 100 , the active region 200 , and the second DBR region 300 .
可以理解的,整個工藝形成的是倒裝VCSEL,具體的,請參照圖3,首先進行(a)外延結構成長,依次形成該GaAs襯底800、該第一DBR區100、該有源區200、該第二DBR區300;(b)然後進行平臺蝕刻/第一電極500製作;(c)氧化法形成光窗,在該第二DBR區300域內形成光窗,並且使高鋁含量AlxGa1-xAs其中的x由該有源區200到表面逐漸遞減,將該第二DBR區300的主要DBR AlxGa1-xAs/AlyGa1-yAs(x>y,0y<1)中高Al%組分AlxGa1-xAs的部分進行完全氧化,使其轉變成Al2O3,在所需的光學路徑上形成Al2O3/AlyGa1-yAs DBR堆疊結構110,並以結構中最臨近該有源區200的至少一層中Al%組分AlzGa1-zAs形成該電流孔徑130,且層間以AlyGa1-yAs作為該間隔層150,並通過控制其氧化速率控制該電流孔徑130的大小,其中Al%組分滿足x>z>y;(d)二次平臺蝕刻,形成該二次蝕刻平面,並且通過蝕刻將該第二DBR區300內的週邊部分完全氧化所形成的Al2O3以去除;(e)歐姆金屬120填充,去除週邊部分的Al2O3所形成的空間以原子層沉積、濺鍍、蒸鍍及電鍍中的一種或多種組合方式填充歐姆金屬120,以形成低電阻的電學導通路徑;(f)散熱襯底400鍵合,在該第二DBR區300上鍵合連接該散熱襯底400;(g)GaAs襯底800去除,將外延結構倒置,去除外延成長形成的該GaAs襯底800;(h)第二電極600製作,在該第一DBR區100上製作第二電極600;(i)鈍化保護/襯底切割,鈍化保護即在該散熱襯底400上方的該第一DBR區100、該有源區200和該第二DBR區300外形成該鈍化層700,襯底切割即根據需要切割該散熱襯底400;(j)第二電極600電鍍連接。 As can be understood, the whole process forms a flip-chip VCSEL. Specifically, please refer to FIG. 3. First, (a) epitaxial structure growth is performed to sequentially form the GaAs substrate 800, the first DBR region 100, the active region 200, and the second DBR region 300; (b) platform etching/first electrode 500 manufacturing is then performed; (c) an oxidation method is used to form a light window, and a light window is formed in the second DBR region 300, and the x in the high aluminum content AlxGa1 -xAs is gradually decreased from the active region 200 to the surface, and the main DBR AlxGa1 -xAs /AlyGa1 -yAs ( x>y, 0 (d) performing secondary platform etching to form the secondary etching plane, and completely oxidizing the Al2O3 / AlyGa1-yAs DBR stack structure 110 on the desired optical path, and forming the current aperture 130 with the Al% component of AlzGa1-zAs in at least one layer closest to the active region 200 in the structure, and using the AlyGa1 - yAs as the spacer layer 150 between the layers, and controlling the size of the current aperture 130 by controlling the oxidation rate thereof, wherein the Al% component satisfies x>z>y; and (e) performing secondary platform etching to form the secondary etching plane, and completely oxidizing the peripheral portion in the second DBR region 300 by etching to form the Al2O3/ AlyGa1-yAs DBR stack structure 110. 3 is removed; (e) Ohm metal 120 filling, the space formed by removing the peripheral Al 2 O 3 is filled with Ohm metal 120 by one or more combinations of atomic layer deposition, sputtering, evaporation and electroplating to form a low-resistance electrical conduction path; (f) heat sink substrate 400 bonding, the heat sink substrate 400 is bonded and connected to the second DBR region 300; (g) GaAs substrate 800 removal, the epitaxial structure is inverted, and the GaAs substrate 800 formed by epitaxial growth is removed; ( h) Fabrication of the second electrode 600: fabricating the second electrode 600 on the first DBR region 100; (i) passivation protection/substrate cutting: passivation protection is forming the passivation layer 700 outside the first DBR region 100, the active region 200 and the second DBR region 300 above the heat sink substrate 400; substrate cutting is cutting the heat sink substrate 400 as needed; (j) electroplating connection of the second electrode 600.
可以理解的,Al2O3即氧化鋁泛指VCSEL結構中AlGaAs經氧化而得以Al2O3為主可而含有少量的的Ga2O3、GaAs或AlAs的混合物。 It can be understood that Al 2 O 3 or aluminum oxide generally refers to a mixture of Al 2 O 3 as a main component and a small amount of Ga 2 O 3 , GaAs or AlAs, which is obtained by oxidation of AlGaAs in the VCSEL structure.
需要說明,若本發明實施例中有涉及方向性指示(諸如上、下、左、右、前、後……),則該方向性指示僅用於解釋在某一特定姿態(如附圖所示)下各部件之間的相對位置關係、運動情況等,如果該特定姿態發生改變時,則該方向性指示也相應地隨之改變。在一般情況下,以煙嘴相對於底座的方向為上、或頂。 It should be noted that if there are directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention, the directional indications are only used to explain the relative position relationship and movement of the components in a certain posture (as shown in the attached figure). If the specific posture changes, the directional indication will also change accordingly. In general, the direction of the mouthpiece relative to the base is up or top.
另外,若本發明實施例中有涉及“第一”、“第二”等的描述,則該“第一”、“第二”等的描述僅用於描述目的,而不能理解為指示或暗示其相對重要性或者隱含指明所指示的技術特徵的數量。由此,限定有“第一”、“第二”的特徵可以明示或者隱含地包括至少一個該特徵。 In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features.
綜上所述,本發明提供的一種高折射率對比DBR的倒裝VCSEL結構及其工藝方法,以歐姆金屬取代了部分Al2O3,散熱襯底、AlGaAs/歐姆金屬所形成的高導熱、低電阻導通路徑,使得光學路徑和電學路徑分離。Al2O3/AlyGa1-yAs DBR形成的堆疊結構可以減少DBR層對數,改變了以最高Al組分作為電流孔徑限制層的做法,使得電學性能和光學性能得到顯著提高,提高了轉換效率及總輸出功率。 In summary, the present invention provides a flip-chip VCSEL structure with a high refractive index contrast DBR and a process method thereof, in which part of Al 2 O 3 is replaced by ohmic metal, and the heat dissipation substrate, AlGaAs/ohmic metal form a high thermal conductivity and low resistance conduction path, so that the optical path and the electrical path are separated. The stacked structure formed by Al 2 O 3 / AlyGa1 -yAs DBR can reduce the number of DBR layers, change the practice of using the highest Al component as the current aperture limiting layer, so that the electrical and optical performances are significantly improved, and the conversion efficiency and total output power are improved.
以上所述,僅是本發明的較佳實施例而已,並非對本發明作任何形式上的限制,雖然本發明已以較佳實施例揭露如上,然而並非用以限定本發明,任何熟悉本專業的技術人員,在不脫離本發明技術方案範圍內,當可利用上述揭示的技術內容做出些許更動或修飾為等同變化的等效實施例,但凡是未脫離本發明技術方案內容,依據本發明的技術實質對以上實施例所作的任何簡單修改、等同變化與修飾,均仍屬於本發明技術方案的範圍內。 The above is only the preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as the preferred embodiment, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modifications to equivalent embodiments of equivalent changes by using the above disclosed technical contents within the scope of the technical solution of the present invention. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of the technical solution of the present invention.
(a)~(f):方法步驟 (a)~(f): Method steps
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