TWI794115B - Thin Film Chip Package Structure - Google Patents
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- TWI794115B TWI794115B TW111122060A TW111122060A TWI794115B TW I794115 B TWI794115 B TW I794115B TW 111122060 A TW111122060 A TW 111122060A TW 111122060 A TW111122060 A TW 111122060A TW I794115 B TWI794115 B TW I794115B
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- 239000010409 thin film Substances 0.000 title claims abstract description 49
- 230000017525 heat dissipation Effects 0.000 claims abstract description 60
- 238000004806 packaging method and process Methods 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 239000010408 film Substances 0.000 claims abstract description 23
- 239000010410 layer Substances 0.000 claims description 23
- 239000011241 protective layer Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 229910021389 graphene Inorganic materials 0.000 claims description 3
- 238000001816 cooling Methods 0.000 description 11
- 230000000694 effects Effects 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 2
- 230000002708 enhancing effect Effects 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 125000000391 vinyl group Chemical group [H]C([*])=C([H])[H] 0.000 description 1
- 229920002554 vinyl polymer Polymers 0.000 description 1
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- Packaging Frangible Articles (AREA)
- Pressure Sensors (AREA)
Abstract
一種薄膜晶片封裝結構,其包括:一薄膜基板;一晶片,設置於該薄膜基板之上表面;以及一散熱貼,包括一第一覆蓋部及與該第一覆蓋部相連接之至少一第二覆蓋部,其中,該第一覆蓋部係覆蓋在該晶片上方,各所述第二覆蓋部係覆蓋在該晶片之一側之該薄膜基板之所述上表面上,且各所述第二覆蓋部具有至少一鏤空區。A thin film chip packaging structure, which includes: a film substrate; a chip, arranged on the upper surface of the film substrate; and a heat dissipation paste, including a first covering part and at least one second covering part connected to the first Covering parts, wherein, the first covering part covers the wafer, each of the second covering parts covers the upper surface of the film substrate on one side of the wafer, and each of the second covering parts The part has at least one hollow area.
Description
本發明係有關於晶片封裝,特別是關於一種薄膜晶片封裝結構。The invention relates to chip packaging, in particular to a thin film chip packaging structure.
在半導體領域中,COF(chip-on-film;覆晶薄膜)主要應用在顯示器的驅動 IC封裝。In the semiconductor field, COF (chip-on-film; chip-on-film) is mainly used in the display driver IC package.
近年來,隨著市場對螢幕解析度及刷新率的要求日漸提升,對驅動 IC的散熱性能要求也越來越高。目前市場上主流的COF驅動 IC產品為在薄膜基板背面貼附散熱貼,亦有少數業者是在薄膜基板上之晶片正面貼附散熱貼,然其散熱效果皆仍有改進的空間。In recent years, as the market's requirements for screen resolution and refresh rate have been increasing, the heat dissipation performance requirements for driver ICs have also become higher and higher. At present, the mainstream COF driver IC products on the market attach heat dissipation stickers to the back of the film substrate, and a few companies attach heat dissipation stickers to the front of the chip on the film substrate. However, there is still room for improvement in the heat dissipation effect.
為解決上述的問題,本領域亟需一新穎的薄膜晶片封裝結構。In order to solve the above problems, there is an urgent need in the art for a novel thin film chip packaging structure.
本發明之一目的在於揭露一種薄膜晶片封裝結構,其可藉由在一散熱貼中鄰近一晶片之長邊處設置鏤空區以確保該散熱貼與該晶片及一薄膜基板間的空氣被完全排除,從而避免該散熱貼因氣泡的阻隔而降低導熱效果。One purpose of the present invention is to disclose a thin-film chip packaging structure, which can ensure that the air between the heat-dissipating paste, the chip and a thin-film substrate is completely excluded by providing a hollow area adjacent to the long side of a chip in a heat-dissipating paste , so as to prevent the heat dissipation sticker from reducing the heat conduction effect due to the barrier of air bubbles.
本發明之另一目的在於揭露一種薄膜晶片封裝結構,其可藉由在一散熱貼中鄰近一晶片之長邊處設置鏤空區以確保該散熱貼與該晶片及一薄膜基板間的空氣被完全排除,以避免該散熱貼因氣泡的熱膨脹而與該晶片及該薄膜基板脫離,從而增強產品的封裝可靠度。Another object of the present invention is to disclose a thin-film chip packaging structure, which can ensure that the air between the heat-dissipating paste, the chip and a thin-film substrate is completely closed by providing a hollow area adjacent to the long side of a chip in a heat-dissipating paste. Excluded to prevent the heat dissipation paste from detaching from the chip and the film substrate due to the thermal expansion of the air bubbles, thereby enhancing the packaging reliability of the product.
本發明之又一目的在於揭露一種薄膜晶片封裝結構,其可藉由在一散熱貼中設置鏤空區以分散散熱貼的實體區域而增強散熱效果,從而減少散熱貼的用料以降低封裝成本。Yet another object of the present invention is to disclose a thin film chip packaging structure, which can enhance the heat dissipation effect by providing a hollow area in a heat dissipation paste to disperse the physical area of the heat dissipation paste, thereby reducing the materials used in the heat dissipation paste and reducing the packaging cost.
為達前述目的,一種薄膜晶片封裝結構乃被提出,其包括: 一薄膜基板; 一晶片,設置於該薄膜基板之上表面;以及 一散熱貼,包括一第一覆蓋部及與該第一覆蓋部相連接之至少一第二覆蓋部,其中,該第一覆蓋部係覆蓋在該晶片上方,各所述第二覆蓋部係覆蓋在該晶片之一側之該薄膜基板之所述上表面上,且各所述第二覆蓋部具有至少一鏤空區。 To achieve the aforementioned purpose, a thin film chip packaging structure is proposed, which includes: a film substrate; a wafer disposed on the upper surface of the film substrate; and A heat dissipation sticker, comprising a first covering part and at least one second covering part connected with the first covering part, wherein the first covering part is covered above the chip, and each of the second covering parts is covered On the upper surface of the film substrate on one side of the wafer, each of the second covering parts has at least one hollow area.
在一實施例中,該晶片於一長邊方向具有一第一長度,該第一覆蓋部於該長邊方向具有一第二長度,且該第二長度小於該第一長度。In one embodiment, the wafer has a first length along a long side direction, the first covering portion has a second length along the long side direction, and the second length is smaller than the first length.
在一實施例中,該晶片於一長邊方向具有一第一長度,該第一覆蓋部於該長邊方向具有一第二長度,且該第二長度等於該第一長度。In one embodiment, the chip has a first length along a long side direction, the first covering portion has a second length along the long side direction, and the second length is equal to the first length.
在一實施例中,該晶片於一長邊方向具有一第一長度,該第一覆蓋部於該長邊方向具有一第二長度,該第二長度大於該第一長度,且該第一覆蓋部係沿該長邊方向自該晶片之兩側伸出以露出該晶片的兩側表面。In one embodiment, the wafer has a first length in a long side direction, the first covering portion has a second length in the long side direction, the second length is greater than the first length, and the first covering portion The part protrudes from both sides of the wafer along the long side direction to expose the two side surfaces of the wafer.
在一實施例中,各所述第二覆蓋部在該長邊方向之任一散熱貼實體總長度等於該第一覆蓋部於該長邊方向的長度。In one embodiment, the total physical length of any cooling patch of each second covering portion in the longitudinal direction is equal to the length of the first covering portion in the longitudinal direction.
在一實施例中,各所述第二覆蓋部在該長邊方向之任一散熱貼實體總長度小於該第一覆蓋部於該長邊方向的長度。In one embodiment, the total length of any heat dissipation sticker in the longitudinal direction of each of the second covering parts is smaller than the length of the first covering part in the longitudinal direction.
在一實施例中,各所述第二覆蓋部之各所述鏤空區係一閉合之鏤空區。In one embodiment, each hollow area of each second covering portion is a closed hollow area.
在一實施例中,各所述第二覆蓋部之各所述鏤空區係一開放之鏤空區。In one embodiment, each hollow area of each second covering portion is an open hollow area.
在一實施例中,該散熱貼包括一散熱層及一保護層,該散熱層係貼附於該薄膜基板及該晶片上,且該保護層覆蓋該散熱層。In one embodiment, the heat dissipation sticker includes a heat dissipation layer and a protective layer, the heat dissipation layer is pasted on the film substrate and the chip, and the protection layer covers the heat dissipation layer.
在可能的實施例中,該散熱層可包括鋁、銅和石墨烯之選項中之至少一種材料。In a possible embodiment, the heat dissipation layer may include at least one material selected from aluminum, copper and graphene.
在一實施例中,所述之薄膜晶片封裝結構進一步包括一背面散熱貼,其係貼附於該薄膜基板下表面。In one embodiment, the thin film chip packaging structure further includes a back heat dissipation sticker attached to the lower surface of the thin film substrate.
為使 貴審查委員能進一步瞭解本發明之結構、特徵及其目的,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable your review committee members to further understand the structure, features and purpose of the present invention, drawings and detailed descriptions of preferred specific embodiments are hereby attached.
請一併參照圖1、2及3,其中,圖1為本發明之薄膜晶片封裝結構之一實施例的外觀示意圖;圖2為圖1之薄膜晶片封裝結構之俯視圖;及圖3為圖1之薄膜晶片封裝結構沿剖面線V1-V1之一剖面圖。Please refer to Figs. 1, 2 and 3 together, wherein Fig. 1 is a schematic view of the appearance of an embodiment of the thin film chip packaging structure of the present invention; Fig. 2 is a top view of the thin film chip packaging structure of Fig. 1; and Fig. 3 is a view of Fig. 1 A cross-sectional view of the thin film chip packaging structure along the section line V1-V1.
如圖1、2及3所示,該薄膜晶片封裝結構包含一薄膜基板10、一散熱貼20及一晶片30;薄膜基板10具有一上表面10a及一下表面10b;晶片30係設置於上表面10a且其沿著一長邊方向有一長度B;散熱貼20包含一第一覆蓋部20a及兩個第二覆蓋部20b,其中,第一覆蓋部20a在該長邊方向具有一長度A,各第二覆蓋部20b均具有一鏤空部25,鏤空部25在該長邊方向之兩側的散熱貼20實體部分分別具有一長度A1與A2,且較佳地,鏤空部25在第二覆蓋部20b中相對靠近晶片30。在本實施例中,長度A小於長度B,且長度A1與A2的和等於長度A,故鏤空部25的上方跟下方會有凸出部。As shown in Figures 1, 2 and 3, the thin film chip packaging structure includes a
另外,薄膜基板10還包括一電路層12及一油墨層14,電路層12會露出部分金屬與晶片30進行壓合連接;且散熱貼20可包含一散熱層22與一保護層24,其中散熱層22,可包括鋁、銅和石墨烯之選項中之至少一種材料,係貼覆晶片30與薄膜基板10之上表面10a,而保護層24則完全覆蓋散熱層22且其尺寸大於散熱層22。In addition, the
另外,在可能的變化實施例中,所述的長度A可大於或等於長度B。請參照圖4,其繪示本發明之薄膜晶片封裝結構之另一實施例的俯視圖。如圖4所示,所述的長度A大於長度B,且散熱貼20係在該長邊方向自晶片30之兩短邊伸出以曝露晶片30之與所述兩短邊連接之兩側面。In addition, in a possible variation embodiment, the length A may be greater than or equal to the length B. Please refer to FIG. 4 , which shows a top view of another embodiment of the thin film chip packaging structure of the present invention. As shown in FIG. 4 , the length A is greater than the length B, and the
另外,在可能的變化實施例中,散熱貼20亦可不設所述的凸出部。請一併參照圖5及6,其繪示本發明之薄膜晶片封裝結構之另兩個實施例的俯視圖。如圖5所示,散熱貼20不具有所述的凸出部,且所述的長度A小於長度B;以及如圖6所示,散熱貼20不具有所述的凸出部,且所述的長度A大於長度B。In addition, in a possible variation embodiment, the
另外,在可能的變化實施例中,散熱貼20可有多個鏤空部25。請一併參照圖7至10,其繪示本發明之薄膜晶片封裝結構之另 四個實施例的俯視圖。如圖7所示,散熱貼20在晶片30之長邊之兩側各設有兩個鏤空部25,所述的長度A小於長度B,散熱貼20在晶片30之長邊方向之等效實體長度係三段實體長度A1、A2及A3之和,且該等效實體長度等於長度A;如圖8所示,散熱貼20在晶片30之長邊之兩側各設有兩個鏤空部25,所述的長度A大於長度B,散熱貼20在晶片30之長邊方向之等效實體長度係三段實體長度A1、A2及A3之和,且該等效實體長度等於長度A;如圖9所示,散熱貼20在晶片30之長邊之兩側各設有兩對鏤空部25,所述的長度A小於長度B,散熱貼20在晶片30之長邊方向之等效實體長度係三段實體長度A1、A2及A3之和,且該等效實體長度等於長度A;以及如圖10所示,散熱貼20在晶片30之長邊之兩側各設有兩對鏤空部25,所述的長度A大於長度B,散熱貼20在晶片30之長邊方向之等效實體長度係三段實體長度A1、A2及A3之和,且該等效實體長度等於長度A。In addition, in a possible variation embodiment, the
另外,雖然在上述的實施例中鏤空部25皆為閉合之鏤空區,但本發明並不以此為限,其亦可為開放之鏤空區。請一併參照圖11至14,其繪示本發明之薄膜晶片封裝結構之另 四個實施例的俯視圖。如圖11所示,散熱貼20在晶片30之長邊兩側各具有一開放之鏤空部25,鏤空部25在該長邊方向之兩側的散熱貼20實體部分分別具有一長度A1與A2,長度A小於長度B,且長度A1與A2的和等於長度A;如圖12所示,散熱貼20在晶片30之長邊兩側各具有一開放之鏤空部25,鏤空部25在該長邊方向之兩側的散熱貼20實體部分分別具有一長度A1與A2,長度A大於長度B,且長度A1與A2的和等於長度A;如圖13所示,散熱貼20在晶片30之長邊兩側各具有兩個開放之鏤空部25,散熱貼20在晶片30之長邊方向之等效實體長度係三段實體長度A1、A2及A3之和,該等效實體長度等於長度A,且長度A小於長度B;以及如圖14所示,散熱貼20在晶片30之長邊兩側各具有兩個開放之鏤空部25,散熱貼20在晶片30之長邊方向之等效實體長度係三段實體長度A1、A2及A3之和,該等效實體長度等於長度A,且長度A大於長度B。In addition, although the
另外,本發明亦可在薄膜基板10之下表面10b設置一背面散熱貼以增強散熱效果。請一併參照圖15及16,其中,圖15為本發明之薄膜晶片封裝結構之又一實施例的外觀示意圖;及圖16為圖15之薄膜晶片封裝結構沿剖面線V2-V2之一剖面圖。如圖15及16所示,薄膜基板10之下表面10b設有一背面散熱貼20c,且背面散熱貼20c包含一散熱層22與一保護層24,其中散熱層22,可包括鋁、銅和石墨烯之選項中之至少一種材料,係貼覆薄膜基板10之下表面10b,而保護層24則完全覆蓋散熱層22且其尺寸大於散熱層22。In addition, in the present invention, a back heat dissipation sticker can also be provided on the
藉由前述所揭露的設計,本發明乃具有以下的優點: 一、本發明之薄膜晶片封裝結構可藉由在一散熱貼中鄰近一晶片之長邊處設置鏤空區以確保該散熱貼與該晶片及一薄膜基板間的空氣被完全排除,從而避免該散熱貼因氣泡的阻隔而降低導熱效果。 二、本發明之薄膜晶片封裝結構可藉由在一散熱貼中鄰近一晶片之長邊處設置鏤空區以確保該散熱貼與該晶片及一薄膜基板間的空氣被完全排除,以避免該散熱貼因氣泡的熱膨脹而與該晶片及該薄膜基板脫離,從而增強產品的封裝可靠度。 三、本發明之薄膜晶片封裝結構可藉由在一散熱貼中設置鏤空區以分散散熱貼的實體區域而增強散熱效果,從而減少散熱貼的用料以降低封裝成本。 With the design disclosed above, the present invention has the following advantages: 1. The thin-film chip packaging structure of the present invention can avoid the heat dissipation by setting a hollow area near the long side of a chip in a heat dissipation paste to ensure that the air between the heat dissipation paste, the chip and a thin film substrate is completely excluded. The paste reduces the heat conduction effect due to the barrier of air bubbles. 2. The thin-film chip packaging structure of the present invention can ensure that the air between the heat-dissipating paste, the chip and a thin-film substrate is completely excluded by setting a hollow area adjacent to the long side of a chip in a heat-dissipating paste, so as to avoid the heat dissipation The paste is detached from the chip and the film substrate due to the thermal expansion of the air bubbles, thereby enhancing the packaging reliability of the product. 3. The thin film chip packaging structure of the present invention can enhance the heat dissipation effect by setting hollow areas in a heat dissipation paste to disperse the physical area of the heat dissipation paste, thereby reducing the materials used in the heat dissipation paste and reducing the packaging cost.
本案所揭示者,乃較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。What is disclosed in this case is a preferred embodiment. For example, any partial changes or modifications derived from the technical ideas of this case and easily deduced by those who are familiar with the technology are within the scope of the patent right of this case.
綜上所陳,本案無論目的、手段與功效,皆顯示其迥異於習知技術,且其首先發明合於實用,確實符合發明之專利要件,懇請 貴審查委員明察,並早日賜予專利俾嘉惠社會,是為至禱。To sum up, regardless of the purpose, means and efficacy of this case, it shows that it is very different from the conventional technology, and its first invention is practical, and it does meet the patent requirements of the invention. I implore your review committee to understand it clearly and grant a patent as soon as possible. Society is for the Most Prayer.
10:薄膜基板
10a:上表面
10b:下表面
12:電路層
14:油墨層
20:散熱貼
20a:第一覆蓋部
20b:第二覆蓋部
20c:背面散熱貼
22:散熱層
24:保護層
25:鏤空部
30:晶片
10:
圖1為本發明之薄膜晶片封裝結構之一實施例的外觀示意圖。 圖2為圖1之薄膜晶片封裝結構之俯視圖。 圖3為圖1之薄膜晶片封裝結構沿剖面線V1-V1之一剖面圖。 圖4繪示本發明之薄膜晶片封裝結構之另一實施例的俯視圖。 圖5及6繪示本發明之薄膜晶片封裝結構之另兩個實施例的俯視圖。 圖7至10繪示本發明之薄膜晶片封裝結構之另 四個實施例的俯視圖。 圖11至14繪示本發明之薄膜晶片封裝結構之另 四個實施例的俯視圖。 圖15為本發明之薄膜晶片封裝結構之又一實施例的外觀示意圖。 圖16為圖15之薄膜晶片封裝結構沿剖面線V2-V2之一剖面圖。 FIG. 1 is a schematic view of the appearance of an embodiment of the thin film chip packaging structure of the present invention. FIG. 2 is a top view of the thin film chip packaging structure in FIG. 1 . FIG. 3 is a cross-sectional view of the thin film chip package structure in FIG. 1 along the section line V1-V1. FIG. 4 is a top view of another embodiment of the thin film chip packaging structure of the present invention. 5 and 6 show top views of another two embodiments of the thin film chip packaging structure of the present invention. 7 to 10 show top views of another four embodiments of the thin film chip packaging structure of the present invention. 11 to 14 show top views of another four embodiments of the thin film chip packaging structure of the present invention. FIG. 15 is a schematic view of another embodiment of the thin film chip package structure of the present invention. FIG. 16 is a cross-sectional view of the thin film chip package structure of FIG. 15 along the section line V2-V2.
10:薄膜基板 10: Film substrate
10a:上表面 10a: Upper surface
10b:下表面 10b: lower surface
20:散熱貼 20: cooling stickers
20a:第一覆蓋部 20a: first covering part
20b:第二覆蓋部 20b: the second covering part
22:散熱層 22: heat dissipation layer
24:保護層 24: protective layer
25:鏤空部 25: hollow out part
30:晶片 30: Wafer
Claims (9)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW111122060A TWI794115B (en) | 2022-06-14 | 2022-06-14 | Thin Film Chip Package Structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW111122060A TWI794115B (en) | 2022-06-14 | 2022-06-14 | Thin Film Chip Package Structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI794115B true TWI794115B (en) | 2023-02-21 |
| TW202349604A TW202349604A (en) | 2023-12-16 |
Family
ID=86689382
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW111122060A TWI794115B (en) | 2022-06-14 | 2022-06-14 | Thin Film Chip Package Structure |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI794115B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080023822A1 (en) * | 2006-07-20 | 2008-01-31 | Samsung Electronics Co., Ltd. | Chip on flexible printed circuit type semiconductor package |
| US20180342437A1 (en) * | 2015-12-02 | 2018-11-29 | Novatek Microelectronics Corp. | Chip on film package and heat-dissipation structure for a chip package |
| TWI697079B (en) * | 2019-03-06 | 2020-06-21 | 南茂科技股份有限公司 | Chip on film package structure |
-
2022
- 2022-06-14 TW TW111122060A patent/TWI794115B/en active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080023822A1 (en) * | 2006-07-20 | 2008-01-31 | Samsung Electronics Co., Ltd. | Chip on flexible printed circuit type semiconductor package |
| US20180342437A1 (en) * | 2015-12-02 | 2018-11-29 | Novatek Microelectronics Corp. | Chip on film package and heat-dissipation structure for a chip package |
| TWI697079B (en) * | 2019-03-06 | 2020-06-21 | 南茂科技股份有限公司 | Chip on film package structure |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202349604A (en) | 2023-12-16 |
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