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TWM642111U - Thin film chip packaging structure - Google Patents

Thin film chip packaging structure Download PDF

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Publication number
TWM642111U
TWM642111U TW112202039U TW112202039U TWM642111U TW M642111 U TWM642111 U TW M642111U TW 112202039 U TW112202039 U TW 112202039U TW 112202039 U TW112202039 U TW 112202039U TW M642111 U TWM642111 U TW M642111U
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Taiwan
Prior art keywords
heat dissipation
covering part
film substrate
chip
packaging structure
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TW112202039U
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Chinese (zh)
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晏勤曉
林立堂
高雷
王艷梅
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大陸商北京集創北方科技股份有限公司
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Priority to TW112202039U priority Critical patent/TWM642111U/en
Publication of TWM642111U publication Critical patent/TWM642111U/en

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Abstract

一種薄膜晶片封裝結構,其包括:一薄膜基板;一晶片,設置於該薄膜基板之上表面;以及一散熱貼,包括一第一覆蓋部、與該第一覆蓋部相連接之一第二覆蓋部及與該第二覆蓋部相連之一第三覆蓋部,該第一覆蓋部係覆蓋在該晶片上方,該第二覆蓋部係懸空於該晶片之一長邊側面與該薄膜基板之間,且該第三覆蓋部係覆蓋在該薄膜基板之一散熱貼覆蓋區;其中,該第二覆蓋部設有至少一開口以露出該晶片。A thin-film chip packaging structure, which includes: a thin-film substrate; a chip, arranged on the upper surface of the thin-film substrate; part and a third covering part connected with the second covering part, the first covering part is covered above the wafer, and the second covering part is suspended between one long side of the wafer and the film substrate, And the third covering part covers a heat dissipation sticker covering area of the film substrate; wherein, the second covering part is provided with at least one opening to expose the chip.

Description

薄膜晶片封裝結構Thin Film Chip Package Structure

本創作係有關於晶片封裝,特別是關於一種薄膜晶片封裝結構。The invention is related to chip packaging, in particular to a thin film chip packaging structure.

在半導體領域中,COF(chip-on-film;覆晶薄膜)主要應用在顯示器的驅動 IC封裝。In the semiconductor field, COF (chip-on-film; chip-on-film) is mainly used in the display driver IC package.

近年來,隨著市場對螢幕解析度及刷新率的要求日漸提升,對驅動 IC的散熱性能要求也越來越高。目前市場上主流的COF驅動 IC產品為在薄膜基板背面貼附散熱貼,亦有少數業者是在薄膜基板上之晶片正面貼附散熱貼,然其散熱效果皆仍有改進的空間。In recent years, as the market's requirements for screen resolution and refresh rate have been increasing, the heat dissipation performance requirements for driver ICs have also become higher and higher. At present, the mainstream COF driver IC products on the market attach heat dissipation stickers to the back of the film substrate, and a few companies attach heat dissipation stickers to the front of the chip on the film substrate. However, there is still room for improvement in the heat dissipation effect.

為解決上述的問題,本領域亟需一新穎的薄膜晶片封裝結構。In order to solve the above problems, there is an urgent need in the art for a novel thin film chip packaging structure.

本創作之一目的在於揭露一種薄膜晶片封裝結構,其可藉由在散熱貼上與一晶片之長邊側面對應之局部區域開孔,使該散熱貼能夠均勻地黏貼在該晶片及該薄膜基板上而避免產生皺摺,從而避免該散熱貼因皺摺內之氣泡的阻隔而降低導熱效果以及避免該散熱貼因皺摺內之氣泡的熱膨脹而與該晶片及該薄膜基板脫離。One purpose of this creation is to disclose a thin-film chip packaging structure, which can make the heat dissipation paste evenly adhere to the chip and the film substrate by opening holes in a local area corresponding to the long side of a chip on the heat dissipation paste Wrinkles are avoided, thereby preventing the heat dissipation sticker from reducing the heat conduction effect due to the air bubbles in the wrinkles and preventing the heat dissipation sticker from being separated from the chip and the film substrate due to thermal expansion of the air bubbles in the wrinkles.

為達前述目的,一種薄膜晶片封裝結構乃被提出,其包括:一薄膜基板;一晶片,設置於該薄膜基板之上表面;以及一散熱貼,包括一第一覆蓋部、與該第一覆蓋部相連接之一第二覆蓋部及與該第二覆蓋部相連之一第三覆蓋部,該第一覆蓋部係覆蓋在該晶片上方,該第二覆蓋部係懸空於該晶片之一長邊側面與該薄膜基板之間,且該第三覆蓋部係覆蓋在該薄膜基板之一散熱貼覆蓋區;其中,該第二覆蓋部設有至少一開口以露出該晶片。 In order to achieve the aforementioned purpose, a thin film chip packaging structure is proposed, which includes: a thin film substrate; a chip, arranged on the upper surface of the thin film substrate; A second covering part connected with the second covering part and a third covering part connected with the second covering part, the first covering part is covered above the wafer, and the second covering part is suspended from one long side of the wafer Between the side surface and the film substrate, the third covering part is covering a heat dissipation sticker covering area of the film substrate; wherein, the second covering part is provided with at least one opening to expose the chip.

在一實施例中,該開口從該第二覆蓋部延伸至該第三覆蓋部。 In one embodiment, the opening extends from the second covering portion to the third covering portion.

在一實施例中,該散熱貼包括一散熱層及一保護層,該散熱層係貼附於該薄膜基板及該晶片上,且該保護層覆蓋該散熱層。 In one embodiment, the heat dissipation sticker includes a heat dissipation layer and a protective layer, the heat dissipation layer is pasted on the film substrate and the chip, and the protection layer covers the heat dissipation layer.

在可能的實施例中,該散熱層可包括鋁、銅和石墨烯之選項中之至少一種材料。 In a possible embodiment, the heat dissipation layer may include at least one material selected from aluminum, copper and graphene.

為達前述目的,本創作進一步提出一種薄膜晶片封裝結構,其包括:一薄膜基板;一晶片,設置於該薄膜基板之上表面;一散熱貼,包括一第一覆蓋部、與該第一覆蓋部相連接之一第二覆蓋部及與該第二覆蓋部相連之一第三覆蓋部,該第一覆蓋部係覆蓋在該晶片上方,該第二覆蓋部係懸空於該晶片之一長邊側面與該薄膜基板之間,且該第三覆蓋部係覆蓋在該薄膜基板之一散熱貼覆蓋區,其中,該第二覆蓋部設有至少一開口以露出該晶片;以及一背面散熱貼,貼附於該薄膜基板下表面。 In order to achieve the aforementioned purpose, this creation further proposes a thin film chip packaging structure, which includes: a thin film substrate; a chip, arranged on the upper surface of the thin film substrate; a heat dissipation paste, including a first covering part, and the first covering A second covering part connected with the second covering part and a third covering part connected with the second covering part, the first covering part is covered above the wafer, and the second covering part is suspended from one long side of the wafer Between the side surface and the film substrate, and the third covering part covers a heat dissipation sticker covering area of the film substrate, wherein the second covering part is provided with at least one opening to expose the chip; and a back heat dissipation sticker, Attached to the lower surface of the film substrate.

在一實施例中,該開口從該第二覆蓋部延伸至該第三覆蓋部。 In one embodiment, the opening extends from the second covering portion to the third covering portion.

在一實施例中,該散熱貼包括一散熱層及一保護層,該散熱層係貼附於該薄膜基板及該晶片上,且該保護層覆蓋該散熱層。 In one embodiment, the heat dissipation sticker includes a heat dissipation layer and a protective layer, the heat dissipation layer is pasted on the film substrate and the chip, and the protection layer covers the heat dissipation layer.

在可能的實施例中,該散熱層可包括鋁、銅和石墨烯之選項中之至少一種材料。 In a possible embodiment, the heat dissipation layer may include at least one material selected from aluminum, copper and graphene.

在一實施例中,該背面散熱貼包括另一散熱層及另一保護層,該另一散熱層係貼附於該薄膜基板及該晶片上,且該另一保護層覆蓋該另一散熱層。 In one embodiment, the back heat dissipation sticker includes another heat dissipation layer and another protective layer, the other heat dissipation layer is attached on the film substrate and the chip, and the another protection layer covers the other heat dissipation layer .

在可能的實施例中,該另一散熱層可包括鋁、銅和石墨烯之選項中之至少一種材料。 In a possible embodiment, the other heat dissipation layer may include at least one material selected from among aluminum, copper and graphene.

為使貴審查委員能進一步瞭解本創作之結構、特徵及其目的,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable your review committee members to further understand the structure, characteristics and purpose of this creation, drawings and detailed descriptions of preferred specific embodiments are hereby attached.

請一併參照圖1、2及3,其中,圖1為本創作之薄膜晶片封裝結構之一實施例的外觀示意圖;圖2為圖1之薄膜晶片封裝結構之俯視圖;及圖3為圖1之薄膜晶片封裝結構沿剖面線A-A之一剖面圖。 Please refer to Fig. 1, 2 and 3 together, wherein, Fig. 1 is the appearance schematic diagram of one embodiment of the thin film chip packaging structure of this creation; Fig. 2 is the top view of the thin film chip packaging structure of Fig. 1; And Fig. 3 is Fig. 1 A cross-sectional view of the thin film chip packaging structure along the section line A-A.

如圖1、2及3所示,該薄膜晶片封裝結構包含一薄膜基板10、一散熱貼20及一晶片30;薄膜基板10具有一上表面10a及一下表面10b;晶片30係設置於上表面10a;散熱貼20包括一第一覆蓋部20a、與第一覆蓋部20a相連接之兩個第二覆蓋部20b及與第二覆蓋部20b相連接之兩個第三覆蓋部20c,第一覆蓋部20a係覆蓋在晶片30上方,第二覆蓋部20b係懸空於晶片30之一長邊側面與薄膜基板10之間,且第三覆蓋部20c係覆蓋在薄膜基板10之一散熱貼覆蓋區;其中,第二覆蓋部20b設有一開口40以露出晶片30。 As shown in Figures 1, 2 and 3, the thin film chip packaging structure includes a thin film substrate 10, a heat dissipation paste 20 and a chip 30; the thin film substrate 10 has an upper surface 10a and a lower surface 10b; the chip 30 is arranged on the upper surface 10a; heat dissipation paste 20 includes a first covering part 20a, two second covering parts 20b connected with the first covering part 20a and two third covering parts 20c connected with the second covering part 20b, the first covering The part 20a is covered above the wafer 30, the second covering part 20b is suspended between one of the long sides of the wafer 30 and the film substrate 10, and the third covering part 20c is covered on a heat dissipation paste coverage area of the film substrate 10; Wherein, the second covering portion 20 b is provided with an opening 40 to expose the chip 30 .

在圖1的實施例中,雖然第二覆蓋部20b之開口40顯示為方形,但本創作並不以此為限,其亦可呈圓形、三角形、方形等幾何形狀或其他非幾何形狀。另外,開口40的數目亦可為多個,且其排布方式可為並列、對稱等方式。另外,開口40可僅限於第二覆蓋部20b內,亦可延伸至第三覆蓋部20c。依此安排,散熱貼20即可均勻地黏貼在晶片30及薄膜基板10上而避免產生皺摺,從而避免散熱貼20因皺摺內之氣泡的阻隔而降低導熱效果以及避免散熱貼20因皺摺內之氣泡的熱膨脹而與晶片30及薄膜基板10脫離。 In the embodiment of FIG. 1 , although the opening 40 of the second covering portion 20 b is shown as a square shape, the present invention is not limited thereto, and it may also be in geometric shapes such as circles, triangles, squares, or other non-geometric shapes. In addition, the number of openings 40 may also be multiple, and the arrangement thereof may be parallel, symmetrical, and the like. In addition, the opening 40 may be limited to the second covering portion 20b, or extend to the third covering portion 20c. According to this arrangement, the heat dissipation sticker 20 can be evenly pasted on the chip 30 and the film substrate 10 to avoid wrinkles, thereby preventing the heat dissipation sticker 20 from reducing the heat conduction effect due to the air bubbles in the wrinkles and preventing the heat dissipation sticker 20 from being wrinkled. The thermal expansion of the air bubbles in the fold separates from the wafer 30 and the film substrate 10 .

另外,薄膜基板10還包括一電路層12及一油墨層14,電路層12會露出部分金屬與晶片30進行壓合連接;且散熱貼20可包含一散熱層22與一保護層24,其中散熱層22,可包括鋁、銅和石墨烯之選項中之至少一種材料,係貼覆晶片30與薄膜基板10之上表面10a,而保護層24則完全覆蓋散熱層22且其尺寸大於散熱層22。In addition, the film substrate 10 also includes a circuit layer 12 and an ink layer 14, the circuit layer 12 will expose part of the metal and the chip 30 for press-fit connection; Layer 22, which may include at least one material in the options of aluminum, copper and graphene, is attached to the upper surface 10a of the chip 30 and the film substrate 10, and the protective layer 24 completely covers the heat dissipation layer 22 and its size is larger than that of the heat dissipation layer 22 .

請一併參照圖4及圖5,其為本創作之薄膜晶片封裝結構之另二實施例的外觀示意圖。如圖4所示,散熱貼20之開口40尺寸較大,其沿著第二覆蓋部20b延伸至第三覆蓋部20c。如圖5所示,散熱貼20在各第二覆蓋部20b各設有一開口40,且該二開口40呈現對稱排布。此安排亦有助於散熱貼20與晶片30間的空氣排除,從而可避免散熱貼20因氣泡的阻隔而降低導熱效果以及避免散熱貼20因氣泡的熱膨脹而與晶片30脫離。Please refer to FIG. 4 and FIG. 5 together, which are schematic appearance diagrams of another two embodiments of the thin film chip packaging structure of the present invention. As shown in FIG. 4 , the opening 40 of the cooling sticker 20 has a large size and extends along the second covering portion 20 b to the third covering portion 20 c. As shown in FIG. 5 , the cooling sticker 20 is provided with an opening 40 on each second covering portion 20b, and the two openings 40 are symmetrically arranged. This arrangement also helps to remove the air between the heat dissipation paste 20 and the chip 30, thereby preventing the heat dissipation paste 20 from reducing the heat conduction effect due to the barrier of air bubbles and preventing the heat dissipation paste 20 from being separated from the chip 30 due to the thermal expansion of the air bubbles.

另外,本創作亦可在薄膜基板10之下表面10b設置一背面散熱貼以增強散熱效果。請參照圖6,其為本創作之薄膜晶片封裝結構之又一實施例之一剖面圖。如圖6所示,薄膜基板10之下表面10b設有一背面散熱貼20d,且背面散熱貼20d包含一散熱層22與一保護層24,其中散熱層22,可包括鋁、銅和石墨烯之選項中之至少一種材料,係貼覆薄膜基板10之下表面10b,而保護層24則完全覆蓋散熱層22且其尺寸大於散熱層22。In addition, in the present invention, a back heat dissipation sticker can also be provided on the lower surface 10b of the film substrate 10 to enhance the heat dissipation effect. Please refer to FIG. 6 , which is a cross-sectional view of another embodiment of the thin film chip packaging structure of the present invention. As shown in FIG. 6 , the lower surface 10b of the film substrate 10 is provided with a back heat dissipation paste 20d, and the back heat dissipation paste 20d includes a heat dissipation layer 22 and a protective layer 24, wherein the heat dissipation layer 22 may include aluminum, copper and graphene. At least one material in the options is attached to the lower surface 10 b of the film substrate 10 , and the protective layer 24 completely covers the heat dissipation layer 22 and has a larger size than the heat dissipation layer 22 .

藉由前述所揭露的設計,本創作乃具有以下的優點: 一、本創作之薄膜晶片封裝結構可藉由在散熱貼上與一晶片之長邊側面對應之局部區域開孔,使該散熱貼能夠均勻地黏貼在該晶片及該薄膜基板上而避免產生皺摺,從而避免該散熱貼因皺摺內之氣泡的阻隔而降低導熱效果以及避免該散熱貼因皺摺內之氣泡的熱膨脹而與該晶片及該薄膜基板脫離。 By the design disclosed above, this creation has the following advantages: 1. The thin-film chip packaging structure of this invention can make holes on the heat dissipation sticker in a local area corresponding to the long side of a chip, so that the heat dissipation sticker can be evenly pasted on the chip and the film substrate to avoid wrinkles Folding, so as to prevent the heat dissipation paste from reducing the heat conduction effect due to the barrier of air bubbles in the folds and avoid the heat dissipation paste from being separated from the chip and the film substrate due to thermal expansion of the air bubbles in the folds.

本案所揭示者,乃較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。What is disclosed in this case is a preferred embodiment. For example, any partial changes or modifications derived from the technical ideas of this case and easily deduced by those who are familiar with the technology are within the scope of the patent right of this case.

綜上所陳,本案無論目的、手段與功效,皆顯示其迥異於習知技術,且其首先創作合於實用,確實符合新型之專利要件,懇請 貴審查委員明察,並早日賜予專利俾嘉惠社會,是為至禱。To sum up, the purpose, means and efficacy of this case all show that it is very different from the conventional technology, and its first creation is practical, and indeed meets the requirements of a patent for a new model. I urge your review committee to clearly understand it and grant a patent as soon as possible. Society is for the Most Prayer.

10:薄膜基板10: Film substrate

10a:上表面10a: Upper surface

10b:下表面10b: lower surface

12:電路層12: Circuit layer

14:油墨層14: ink layer

20:散熱貼20: cooling stickers

20a:第一覆蓋部20a: first covering part

20b:第二覆蓋部20b: the second covering part

20c:第三覆蓋部20c: The third covering part

20d:背面散熱貼20d: Cooling sticker on the back

22:散熱層22: heat dissipation layer

24:保護層24: protective layer

30:晶片30: Wafer

圖1為本創作之薄膜晶片封裝結構之一實施例的外觀示意圖。 FIG. 1 is a schematic view of the appearance of an embodiment of the thin film chip packaging structure of the present invention.

圖2為圖1之薄膜晶片封裝結構之俯視圖。 FIG. 2 is a top view of the thin film chip package structure in FIG. 1 .

圖3為圖1之薄膜晶片封裝結構沿剖面線A-A之一剖面圖。 FIG. 3 is a cross-sectional view of the thin film chip package structure of FIG. 1 along the section line A-A.

圖4至圖5為本創作之薄膜晶片封裝結構之另二實施例的外觀示意圖。 4 to 5 are schematic appearance diagrams of another second embodiment of the thin film chip packaging structure of the present invention.

圖6為本創作之薄膜晶片封裝結構之又一實施例。 FIG. 6 is another embodiment of the thin film chip packaging structure of the present invention.

圖7為圖6之薄膜晶片封裝結構沿剖面線B-B之一剖面圖。 FIG. 7 is a cross-sectional view of the thin film chip package structure in FIG. 6 along the section line B-B.

10:薄膜基板 10: Film substrate

20:散熱貼 20: cooling stickers

20a:第一覆蓋部 20a: first covering part

20b:第二覆蓋部 20b: the second covering part

20c:第三覆蓋部 20c: The third covering part

30:晶片 30: Wafer

40:開口 40: opening

Claims (10)

一種薄膜晶片封裝結構,其包括:一薄膜基板;一晶片,設置於該薄膜基板之上表面;以及一散熱貼,包括一第一覆蓋部、與該第一覆蓋部相連接之一第二覆蓋部及與該第二覆蓋部相連之一第三覆蓋部,該第一覆蓋部係覆蓋在該晶片上方,該第二覆蓋部係懸空於該晶片之一長邊側面與該薄膜基板之間,且該第三覆蓋部係覆蓋在該薄膜基板之一散熱貼覆蓋區;其中,該第二覆蓋部設有至少一開口以露出該晶片。 A thin-film chip packaging structure, which includes: a thin-film substrate; a chip, arranged on the upper surface of the thin-film substrate; part and a third covering part connected with the second covering part, the first covering part is covered above the wafer, and the second covering part is suspended between one long side of the wafer and the film substrate, And the third covering part covers a heat dissipation sticker covering area of the film substrate; wherein, the second covering part is provided with at least one opening to expose the chip. 如申請專利範圍第1項所述之薄膜晶片封裝結構,其中,該開口從該第二覆蓋部延伸至該第三覆蓋部。 In the thin film chip packaging structure described in claim 1 of the patent claims, the opening extends from the second covering part to the third covering part. 如申請專利範圍第1項所述之薄膜晶片封裝結構,其中,該散熱貼包括一散熱層及一保護層,該散熱層係貼附於該薄膜基板及該晶片上,且該保護層覆蓋該散熱層。 The thin film chip packaging structure as described in item 1 of the scope of patent application, wherein the heat dissipation paste includes a heat dissipation layer and a protective layer, the heat dissipation layer is attached to the thin film substrate and the chip, and the protective layer covers the thermal layer. 如申請專利範圍第3項所述之薄膜晶片封裝結構,其中,該散熱層包括由鋁、銅和石墨烯所組成之群組所選擇的至少一種材料。 The thin film chip package structure as described in claim 3 of the patent application, wherein the heat dissipation layer includes at least one material selected from the group consisting of aluminum, copper and graphene. 一種薄膜晶片封裝結構,其包括:一薄膜基板;一晶片,設置於該薄膜基板之上表面;一散熱貼,包括一第一覆蓋部、與該第一覆蓋部相連接之一第二覆蓋部及與該第二覆蓋部相連之一第三覆蓋部,該第一覆蓋部係覆蓋在該晶片上方,該第二覆蓋部係懸空於該晶片之一長邊側面與該薄膜基板之間,且該第三覆蓋部 係覆蓋在該薄膜基板之一散熱貼覆蓋區,其中,該第二覆蓋部設有至少一開口以露出該晶片;以及一背面散熱貼,貼附於該薄膜基板下表面。 A thin-film chip packaging structure, which includes: a thin-film substrate; a chip, arranged on the upper surface of the thin-film substrate; a heat dissipation sticker, including a first covering part and a second covering part connected with the first covering part and a third covering part connected to the second covering part, the first covering part is covered above the wafer, the second covering part is suspended between one long side of the wafer and the film substrate, and The third cover It is a heat dissipation paste covering area covered on the film substrate, wherein the second covering part is provided with at least one opening to expose the chip; and a back heat dissipation paste is attached to the lower surface of the film substrate. 如申請專利範圍第5項所述之薄膜晶片封裝結構,其中,該開口從該第二覆蓋部延伸至該第三覆蓋部。 In the thin film chip packaging structure described in claim 5 of the patent claims, wherein the opening extends from the second covering part to the third covering part. 如申請專利範圍第5項所述之薄膜晶片封裝結構,其中,該散熱貼包括一散熱層及一保護層,該散熱層係貼附於該薄膜基板及該晶片上,且該保護層覆蓋該散熱層。 The thin film chip packaging structure as described in item 5 of the scope of patent application, wherein the heat dissipation paste includes a heat dissipation layer and a protective layer, the heat dissipation layer is attached to the thin film substrate and the chip, and the protective layer covers the thermal layer. 如申請專利範圍第7項所述之薄膜晶片封裝結構,其中,所述散熱層包括由鋁、銅和石墨烯所組成之群組所選擇的至少一種材料。 According to the thin film chip packaging structure described in item 7 of the patent scope of the application, the heat dissipation layer includes at least one material selected from the group consisting of aluminum, copper and graphene. 如申請專利範圍第5項所述之薄膜晶片封裝結構,其中,該背面散熱貼包括另一散熱層及另一保護層,該另一散熱層係貼附於該薄膜基板及該晶片上,且該另一保護層覆蓋該另一散熱層。 The thin-film chip packaging structure described in item 5 of the scope of the patent application, wherein the back heat dissipation sticker includes another heat dissipation layer and another protective layer, and the other heat dissipation layer is attached to the film substrate and the chip, and The another protection layer covers the other heat dissipation layer. 如申請專利範圍第9項所述之薄膜晶片封裝結構,其中,該另一散熱層包括由鋁、銅和石墨烯所組成之群組所選擇的至少一種材料。The thin film chip packaging structure as described in claim 9 of the patent application, wherein the other heat dissipation layer includes at least one material selected from the group consisting of aluminum, copper and graphene.
TW112202039U 2023-03-08 2023-03-08 Thin film chip packaging structure TWM642111U (en)

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