TWI769459B - Substrate structure and manufacturing method thereof - Google Patents

Abstract

A substrate structure comprises a substrate body with a circuit body having at least one recessed portion to enhance a bonding force between the circuit body and an insulating portion of the substrate body to avoid a problem of delamination, so a surface of the circuit body can be effectively combined with the insulating portion and free from be roughened. Therefore, the surface of the circuit body of the present invention can be flattened more to reduce an insertion loss of the circuit body.

Description

Substrate structure and method of making the same

The present invention relates to a packaging substrate, in particular to a substrate structure for changing the appearance of a wire body and a manufacturing method thereof.

With the evolution of technology and the vigorous development of the electronic industry, electronic products are gradually moving towards a trend of high performance. Among them, there are more and more electronic products that require high frequency and high speed (such as 5G).

FIG. 1A is a schematic cross-sectional view of a conventional package substrate 1 . As shown in FIG. 1A , a conventional package substrate 1 includes a core layer 10 having conductive vias 100 , a circuit layer 11 and a build-up structure 13 disposed on the core layer 10 , and a shield covering the build-up structure 13 . The solder layer 15, wherein the conductive vias 100 are filled with insulating fillers 100a, and the build-up structure 13 has at least one dielectric layer 130, a wiring layer 131 disposed on the dielectric layer 130, and a plurality of electrical properties The wiring layer 131 is connected with the conductive blind vias 132 of the wiring layer 11 , and the solder mask layer 15 has a plurality of openings 150 , and the outermost wiring layer 131 is exposed to the openings 150 for bonding the solder balls 17 . The package substrate 1 is externally connected to a semiconductor chip (not shown) or a circuit board (not shown) through the solder balls 17 .

With the increasing demand for high-frequency and high-speed signal transmission in electronic products, the electrical insertion loss (Insertion Loss) of the transmission lines (such as the line layer 11 and the wiring layer 131 ) in the conventional package substrate 1 It becomes more and more serious, so the insulating part (such as the solder mask layer 15 and the dielectric layer 130 ) of the package substrate 1 can be made by using a low-loss (low Dk/Df) dielectric material to reduce the attenuation of the signal and improve the signal integrity.

However, the conventional packaging substrate 1 uses a low-loss dielectric material to form the insulating portion, which tends to increase other electrical properties and process instability. 1 presents an unstable state.

Furthermore, since the appearance surface of the metal lines (such as the circuit layer 11 and the wiring layer 131 ) is flatter, as shown in FIG. 1B , the insertion loss is smaller, so the industry can also adopt the method of reducing the surface roughness of the metal lines. , instead of using a low-loss dielectric material, but the flat surface of the metal circuit and the insulating material (the solder mask layer 15 and the dielectric layer 130 ) have poor bonding properties, and delamination problems are likely to occur.

Therefore, how to overcome the above-mentioned various problems of the conventional technology has become an urgent problem to be overcome in the current industry.

In view of the above-mentioned lack of the prior art, the present invention provides a substrate structure, which includes: a substrate body; and a circuit body, which are configured based on the shape of the substrate body and define conductive traces and at least one formed on the conductive traces the recess.

The present invention further provides a method for manufacturing a substrate structure, which includes: providing a substrate body configured with at least one conductor; removing part of the material of the conductor to form a circuit body, wherein the circuit body defines conductive traces and At least one recess is formed on the conductive trace.

In the aforementioned substrate structure and its manufacturing method, the conductive traces have a first conductive wire body and a second conductive wire body that are integrally connected, and the thickness of the first conductive wire body is greater than the thickness of the second conductive wire body, The concave portion is formed by the first conductive wire body and the second conductive wire body. For example, the depth of the recess It is 1/2 to 1/3 of the thickness of the circuit body. Alternatively, the width of the recess is 1/3 of the width of the circuit body.

In the aforementioned substrate structure and its manufacturing method, the concave portion is in the shape of a perforation penetrating up and down. For example, the width of the recess is 1/3 of the width of the circuit body. Alternatively, the circuit body may have a plurality of the recesses arranged at a distance from each other.

In the aforementioned substrate structure and its manufacturing method, the recesses are formed on opposite sides of the circuit body. For example, the depth of one of the recesses on the opposite sides of the circuit body is 1/2 to 1/3 of the thickness of the circuit body. Alternatively, the width of one of the recesses on the opposite sides of the circuit body is 1/3 of the width of the circuit body.

As can be seen from the above, in the substrate structure and the manufacturing method of the present invention, the bonding between the circuit body and the insulating material is enhanced mainly by the design of the circuit body arranging the concave portion, so that the surface of the circuit body does not need to be roughened, The insulating material can be effectively combined to avoid the problem of delamination. Therefore, compared with the prior art, the surface of the circuit body of the present invention can be flattened as required, which is beneficial to reduce the electrical insertion loss of the circuit body.

Furthermore, the insertion loss can be reduced by the design of the concave portion. Therefore, compared with the prior art, the substrate structure of the present invention does not need to use low-loss dielectric materials to form the insulating material of the substrate body, thereby avoiding other electrical currents. performance and process instability.

1: Package substrate

10, 20, 30': core layer

100, 201, 301: Conductive Vias

100a: Insulating filler

11,2b,3b: circuit layer

13: Build-up structure

130, 260, 360: Dielectric layer

131, 261, 361: wiring layer

132,262,362: Conductive blind vias

15: Solder mask

150, 250, 350, 350': opening

17: Solder Ball

2,2',2",3,3',3",5: Substrate structure

2a, 2a', 2a", 3a, 3a', 5a: Substrate body

20a: first metal layer

20b: second metal layer

200: Through hole

203, 203', 263, 363: Electrical contact pads

21, 21', 31, 31', 31", 51, 51', 51": line body

21a, 31a: first conductive wire body

21b, 31b: the second conductive wire

210, 210’, 310, 310’, 310”, 510, 510’, 510”: Recess

211, 311, 511: Conductive traces

22, 32, 52: Conductors

23: The first resistance layer

230: First opening area

24: Second resistance layer

240: Second open area

25, 35, 35': insulating protective layer

26,36: Buildup Department

30: Bearer

30a: Metal layer

34: Resist layer

340: Open area

d1,d2: thickness

h: depth

L: benchmark curve

L1: first curve

L2: Second curve

L3: Third Curve

R,t: width

FIG. 1A is a schematic cross-sectional view of a conventional package substrate.

FIG. 1B is a partial perspective view of FIG. 1A .

2A to 2H are schematic cross-sectional views of the first embodiment of the manufacturing method of the substrate structure of the present invention.

Picture 2G' is another aspect of picture 2G.

Figure 2G" is a partial plan view of Figure 2G.

Fig. 2H' is a schematic cross-sectional view of another aspect of Fig. 2H.

FIGS. 3A to 3F are schematic cross-sectional views of the second embodiment of the manufacturing method of the substrate structure of the present invention.

Figure 3F' is another aspect of Figure 3F.

FIGS. 3G to 3H are schematic cross-sectional views of subsequent processes of FIG. 3F.

Fig. 3H' is a schematic cross-sectional view of another embodiment of the subsequent process of Fig. 3G.

Fig. 4A is a partial perspective view of Fig. 2H or 3F.

Fig. 4B is a partial perspective view of Fig. 2G' or 3F'.

Fig. 4C is a partial perspective view of Fig. 3H.

FIG. 5A is a schematic cross-sectional view of another embodiment of FIG. 2H.

FIG. 5B is a partially enlarged perspective view of FIG. 5A .

FIG. 6 is a comparison diagram of the line transmission loss between the substrate structure of the present invention and the conventional package substrate.

The following specific embodiments are used to illustrate the implementation of the present invention, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

It should be noted that the structures, proportions, sizes, etc. shown in the drawings in this specification are only used to cooperate with the contents disclosed in the specification for the understanding and reading of those who are familiar with the art, and are not intended to limit the implementation of the present invention. Therefore, it does not have technical substantive significance, and any structural modifications and proportions The change of the relationship or the adjustment of the size should still fall within the scope that the technical content disclosed in the present invention can cover, without affecting the effect that the present invention can produce and the purpose that can be achieved. At the same time, terms such as "above", "first" and "second" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the present invention. Changes or adjustments, without substantial changes to the technical content, should also be regarded as the scope of the present invention.

FIGS. 2A to 2H are schematic cross-sectional views of the first embodiment of the manufacturing method of the substrate structure 2 of the present invention. In this embodiment, the substrate structure 2 is a circuit board, and the manufacturing method thereof adopts the manufacturing process of a packaging substrate with a core layer.

As shown in FIG. 2A , a base material is provided, which is composed of a core layer 20 and a first metal layer 20 a combined with two opposite sides of the core layer 20 . Next, a through hole 200 is formed through the core layer 20 , and a second metal layer 20 b is formed on the first metal layer 20 a and in the through hole 200 , so as to form a conductive through hole 201 in the through hole 200 .

In this embodiment, the first metal layer 20a and the second metal layer 20b are made of copper. For example, the base material is a copper foil substrate (Copper coated laminated, CCL for short) or other forms, and the material of the core layer 20 can be selected from, for example, ABF (Ajinomoto Build-up Film), polyvinyl ether (PPE), polyethylene Tetrafluoroethylene (PTFE), FR4, FR5, Bismaleimide triazine (BT), Liquid Crystal Polymer, benzocyclobutadiene -butene, referred to as BCB), polyimide (Polyimide, referred to as PI), aromatic nylon (Aramide), epoxy resin and glass fiber and other photosensitive or non-photosensitive organic resin materials, but not limited to the above types of materials.

In other embodiments, a plug hole material (not shown), such as an insulating material, may be formed in the conductive via 201 .

As shown in FIG. 2B, a first resist layer 23 in the form of a dry film or other photoresist is formed on the second metal layer 20b, which has a plurality of exposed portions of the first opening regions 230 of the second metal layer 20b .

As shown in FIG. 2C , the second metal layer 20b in the first opening regions 230 and the first metal layer 20a thereunder are removed by etching to form the patterned conductor 22 electrically connected to the conductive via 201 .

As shown in FIG. 2D , the first resist layer 23 is removed to expose the conductor 22 .

As shown in FIG. 2E , a second resist layer 24 in the form of a dry film or other photoresist is formed on the conductor 22 , which has at least a second opening area 240 exposing a portion of the conductor 22 .

As shown in FIGS. 2F to 2G, part of the conductor 22 in the second opening area 240 is removed by etching to form a circuit body 21 with a recess 210, and the circuit body 21 (with the recess 210 formed) and the conductive body 21 are formed. The body 22 (without the concave portion 210 formed) serves as the wiring layer 2b. After that, the second resistive layer 24 is removed to expose the circuit layer 2b, wherein the circuit body 21 defines a conductive trace 211 and at least one concave portion 210 formed on the conductive trace 211 .

In this embodiment, the circuit body 21 (or the conductive trace 211 ) formed with the recess 210 is defined as a first conductive wire body 21 a and a second conductive wire body 21 b which are integrally connected, and the first conductive wire body 21 a is defined. The thickness d1 is greater than the thickness d2 of the second conductive wire body 21b, so that the first conductive wire body 21a and the second conductive wire body 21b form the concave portion 210, as shown in FIG. 4A. For example, the recess 210 is in the shape of a trench, the first conductive line 21a is used as the sidewall of the trench, and the second conductive line 21b is used as the bottom of the trench. Preferably, the depth h of the recessed portion 210 is 1/2 to 1/3 of the thickness d1 of the first conductive wire body 21a (or the circuit body 21 ), and the width t of the recessed portion 210 is the circuit body 1/3 of the width R of 21.

Furthermore, the concave portion 210 does not penetrate the conductive traces 211 and does not break the conductive traces 211 . Alternatively, as shown in the circuit body 21 ′ shown in FIG. 2G ′, the concave portion 210 ′ can be in the shape of a through hole, which penetrates the conductive trace 211 up and down, and as shown in FIG. 4B , can be formed on the conductive trace 211 A plurality of rectangular through holes spaced apart from each other, wherein the width t of the concave portion 210 ′ is 1/3 of the width R of the conductive trace 211 .

As shown in FIG. 2H, following the process of FIG. 2G, an insulating protective layer 25 such as a solder mask is formed on the core layer 20, the circuit layer 2b and the conductive via 201 to obtain a substrate structure 2, and the The insulating protective layer 25 fills the concave portion 210 .

In this embodiment, the substrate structure 2 includes a substrate body 2a and a circuit body 21 disposed in the substrate body 2a, wherein the substrate body 2a includes the core layer 20 with conductive vias 201, conductive body 22 and insulating protective layer 25 .

In another embodiment, as shown in FIG. 2H' of the substrate structure 2', the substrate body 2a' may include a build-up portion 26 formed on the core layer 20 and the circuit layer 2b. For example, the build-up portion 26 includes at least a dielectric layer 260 that can fill the recess 210 , a wiring layer 261 disposed on the dielectric layer 260 , and a conductive layer that electrically connects the wiring layer 261 and the wiring layer 2b Blind holes 262 are formed, and the insulating protective layer 25 is disposed on the outermost wiring layer 261 of the build-up portion 26, and part of the surface of the outermost wiring layer 261 is exposed to the opening 250 of the insulating protective layer 25, so as to As an electrical contact pad 263, it is used for bonding conductive elements (not shown) such as solder balls, so that the substrate structure 2' can be connected to electronic components (not shown) or circuits such as semiconductor chips through the conductive elements (not shown) board (figure omitted). Specifically, the material of the dielectric layer 260 is, for example, polybenzoxazole (PBO), polyimide (PI), prepreg (PP), etc., and the wiring The layer 261 and the conductive blind via 262 are in the form of a redistribution layer (RDL for short), and the materials thereof are copper or other metal materials.

In addition, the circuit body 21 further has an electrical contact pad 203 connected to the end of the conductive trace 211, as shown in FIG. 2G", so as to conduct each layer of circuits, and the recesses 210, 210' are not formed on the electrical contact pad 203 and the electrical contact pads 263 of the build-up portion 26. It should be understood that the conductors 22 are also formed with electrical contact pads 203' for conducting circuits of various layers, and the recesses 210 and 210' are not formed in each of the On the electrical contact pad 203'. It should be noted that in the circuit design, the conductive traces related to high-frequency transmission signals (such as the frequency above 28 GHz used by 5G mobile communication devices) can be used as the circuit bodies 21, 21'.

FIGS. 3A to 3H are schematic cross-sectional views of the second embodiment of the manufacturing method of the substrate structure 3 of the present invention. In this embodiment, the substrate structure 3 is a circuit board, and the manufacturing method thereof adopts the manufacturing process of a package substrate without a core layer (coreless).

As shown in FIG. 3A, a carrier 30 with a metal layer 30a (such as copper or other metal materials) on the surface is provided, such as a copper foil substrate, and then a patterned copper or other metal material is formed by electroplating The conductor 32 is on the metal layer 30a.

As shown in FIG. 3B , a resist layer 34 in the form of a dry film or other photoresist is formed on the conductor 32 , which has at least an open area 340 exposing a portion of the conductor 32 .

As shown in FIG. 3C, part of the conductor 32 in the opening area 340 is removed by etching to form the circuit body 31 having the recess 310, and the circuit body 31 and the conductor 32 are used as the circuit layer 3b. After that, the resistance layer 34 is removed, wherein the circuit body 31 defines a conductive trace 311 and at least one concave portion 310 formed on the conductive trace 311 .

In this embodiment, the circuit body 31 (or the conductive traces 311 ) formed with the concave portion 310 is defined as a first conductive wire body 31a and a second conductive wire body 31b which are integrally connected. The thickness d1 is greater than the thickness d2 of the second conductive wire body 31b, so that the first conductive wire body 31a and the second conductive wire body 31b form the recessed portion 310, as shown in FIG. 4A. For example, the recess 310 is in the shape of a trench, the first conductive line body 31a is used as the sidewall of the trench, and the second conductive line body 31b is used as the bottom of the trench. Preferably, the depth h of the recess 310 is 1/2 to 1/3 of the thickness d1 of the first conductive wire body 31a (or the circuit body 31 ), and the width t of the recess 310 is the circuit body 1/3 of the width R of 31.

Furthermore, as shown in the circuit body 31 ′ shown in FIG. 4B , the concave portion 310 ′ can also be in the shape of a through hole, which penetrates the conductive trace 311 , and can be formed on the conductive trace 311 as shown in FIG. 4B A plurality of rectangular through holes spaced apart from each other, wherein the width t of the concave portion 310 ′ is 1/3 of the width R of the conductive trace 311 .

As shown in FIG. 3D, a build-up portion 36 is formed on the carrier 30 and the circuit layer 3b.

In this embodiment, the build-up portion 36 includes at least one dielectric layer 360, a wiring layer 361 disposed on the dielectric layer 360, and conductive blind vias 362 electrically connecting the wiring layer 361 and the wiring layer 3b. . Specifically, the material of the dielectric layer 360 is, for example, polybenzoxazole (PBO for short), Polyimide (Polyimide, referred to as PI), prepreg (Prcpreg, referred to as PP), etc., and the wiring layer 361 and the conductive blind vias 362 are in the form of a redistribution layer (Redistribution layer, referred to as RDL), among which The material is copper or other metal materials.

As shown in FIGS. 3E to 3F, the carrier 30 is removed by peeling, and then the metal layer 30a is removed by etching, so as to obtain two substrate structures 3, so that the circuit body 31 is exposed to the dielectric layer 360, and the The concave portion 310 is embedded in the dielectric layer 360 .

In this embodiment, the substrate structure 3 includes a substrate body 3 a and a circuit body 31 disposed in the substrate body 3 a , and the substrate body 3 a includes the build-up portion 36 and the conductor 32 .

Furthermore, before removing the carrier 30, an insulating protective layer 35 such as a solder mask can be formed on the outermost wiring layer 361 of the build-up portion 36, so the substrate body 3a can include the insulating protective layer. 35. For example, the insulating protection layer 35 has at least one opening 350, so that the outermost wiring layer 361 is exposed to the opening 350 of the insulating protection layer 35 for serving as electrical contact pads 363 for bonding conductive elements such as solder balls (illustration omitted), so that the substrate structure 3 can be connected to electronic components such as semiconductor chips (illustration omitted) or circuit board (illustration omitted) through the conductive element (illustration omitted).

In addition, if the shape of the concave portion 310' shown in Fig. 4B is changed to be used in the subsequent process in Fig. 3C, the substrate structure 3' shown in Fig. 3F' will be obtained.

In addition, based on the process of FIG. 3F, as shown in FIG. 3G, a resist layer 34 can be formed on the exposed surface of the circuit body 31, and another recess 310” corresponding to the recess 310 can be formed by etching the resist layer 34. , so that recesses 310, 310" are formed on opposite sides of the circuit body 31", and then the resistance layer 34 is removed to obtain the substrate structure 3" as shown in Figures 3H and 4C. The cross-section of the circuit body 31" is roughly It is H-shaped, that is, two opposite sides of the circuit body 31 ′ have trench-shaped recesses 310 , 310 ″. Further, an insulating protective layer 35' such as a solder mask can be formed on the dielectric layer 360 to cover the circuit body 31" and its recess 310", so the substrate body 3a' can include two insulating protective layers 35, 35'. For example, the insulating protection layer 35' has at least one opening 350', so that part of the conductor 32 is exposed to the opening 350' for bonding conductive elements such as solder balls (Fig. omit), so that the substrate structure 3" can be connected to an electronic component such as a semiconductor chip (omitted) or a circuit board (omitted) through the conductive element (omitted).

Alternatively, as shown in Fig. 3H', following Fig. 3G, after removing the resist layer 34, the two substrate structures 3" (with only one insulating protective layer 35) can be pressed together on a conductive through hole On opposite sides of the core layer 30' of 301, another substrate structure 2" is formed, and its substrate body 2a" includes the core layer 30' with the conductive via 301, the conductor 32, the insulating protection layer 35 and the The build-up portion 36 is formed, and the conductor 32 is electrically connected to the conductive via 301 .

Therefore, in the manufacturing method of the substrate structure 2, 2', 2", 3, 3', 3" of the present invention, the circuit body 21, 21', 31, 31', 31" is mainly arranged by laying the The concave portions 210, 210', 310, 310', 310" increase the surface area of the circuit body 21, 21', 31, 31', 31", so that the circuit layers 2b, 3b can be connected to insulating materials (such as the dielectric layers 260, 360 or insulating protective layers). 25, 35') is enhanced, so the metal surfaces of the circuit layers 2b, 3b do not need to be roughened, and the insulating material can be effectively combined to avoid the problem of delamination. Therefore, compared with the prior art, The metal surfaces of the circuit layers 2b, 3b of the present invention can be flattened as required, and the metal surface areas of the circuit layers 2b, 3b are increased, which is beneficial to reduce the overall electrical conductivity of the circuit layers 2b, 3b, the wiring layers 261, 361 and the conductive blind holes 262, 362 Insertion Loss. Specifically, as shown in Figure 6, at high frequencies, compared to the conventional rectangular circuit body (that is, no recess is formed), the insertion loss in the high frequency range (such as above 40GHz) ( As shown in the reference curve L) in Fig. 6, the substrate structures 2, 2', 2", 3, 3', 3" of the present invention can be reduced by the design of the trench-shaped recesses 210, 310 (as shown in Fig. 4A). 5% to 7% insertion loss (as shown in the first curve L1 in Figure 6), and can be reduced by 30% to 42% by the design of the perforated recesses 210', 310' (as shown in Figure 4B) The insertion loss (as shown in the second curve L2 in Figure 6), and the design of the recesses 310, 310" on both sides (as shown in Figure 4C) can reduce the insertion loss by 17% to 24% (as shown in Figure 6) The third curve L3) shown.

Furthermore, the insertion loss can be reduced by the design of the recesses 210, 210', 310, 310', 310", so compared with the prior art, the substrate structures 2, 2', 2", 3, 3', 3” no need to choose low loss dielectric The insulating material (such as the dielectric layer 261, 361 or the insulating protective layer 25, 35, 35') of the substrate body 2a, 2a', 2a", 3a', 3a is made of materials, so as to avoid other electrical properties and process instability And other issues.

In addition, the perforated recesses 210', 310' shown in Fig. 4B can be adjusted according to the design of the patterned circuit layers 2b, 3b, and the more the number of perforations, the better.

Further, the manufacturing method of the present invention can be applied to the substrate structure 5 in the form of a lead frame, as shown in FIGS. 5A and 5B . For example, the substrate structure 5 includes a substrate body 5a such as a plate body and a plurality of conductors 52 arranged around the substrate body 5a such as lead pins, and at least one of the conductors 52 is subjected to an etching process , so as to remove part of the material of the conductor 52 to serve as the circuit body 51 , 51 ′, 51 ″ having the conductive traces 511 and the recesses 510 , 510 ′, 510 ″.

The present invention further provides a substrate structure 2, 2', 2", 3, 3', 3", 5, comprising: a substrate body 2a, 2a', 2a", 3a, 3a', 5a and a circuit body 21 ,21',31,31',31",51,51',51".

The substrate bodies 2a, 2a', 2a", 3a, 3a', 5a are in the form of package substrates or lead frames.

The circuit bodies 21, 21', 31, 31', 31", 51, 51', 51" are configured based on the shape of the substrate bodies 2a, 2a', 2a", 3a, 3a', 5a and A conductive trace 211, 311, 511 and at least one recess 210, 210', 310, 310', 310", 510, 510', 510" formed on the conductive trace 211, 311, 511 are defined.

In one embodiment, the conductive traces 211 , 311 , 511 have a first conductive wire body 21 a , 31 a and a second conductive wire body 21 b , 31 b integrally connected, and the thickness d1 of the first conductive wire body 21 a , 31 a is greater than the thickness d1 of the first conductive wire body 21 a , 31 a The thickness d2 of the second conductive lines 21b, 31b is such that the first conductive lines 21a, 31a and the second conductive lines 21b, 31b form the recesses 210, 310, 510. For example, the depth h of the recesses 210, 310, 510 is 1/2 to 1/3 of the thickness d1 of the circuit body 21, 31, 51. Alternatively, the width t of the concave portion 210, 310, 510 is 1/3 of the width R of the circuit body 21, 31, 51.

In one embodiment, the concave portions 210', 310', 510' are in the shape of perforations penetrating up and down. For example, the width t of the recesses 210', 310', 510' is 1/3 of the width R of the circuit bodies 21', 31', 51'. Further, the circuit bodies 21', 31', 51' have a plurality of the concave portions 210', 310', 510' which are spaced apart from each other.

In one embodiment, the recesses 310, 310", 510, 510" are formed on opposite sides of the circuit body 31", 51". For example, the depth h of one of the recesses 310, 310", 510, 510" on the opposite sides of the circuit body 31", 51" is 1/2 to 1/3 of the thickness d1 of the circuit body 31", 51". Alternatively, the width t of one of the recesses 310, 310", 510, 510" on the opposite sides of the circuit body 31", 51" is 1/3 of the width R of the circuit body 31", 51".

To sum up, in the substrate structure and the manufacturing method of the present invention, the circuit body is designed with a concave portion to reduce the electrical insertion loss, and can strengthen the bonding between the layers to avoid the problem of delamination.

The above embodiments are used to illustrate the principles and effects of the present invention, but not to limit the present invention. Any person skilled in the art can make modifications to the above embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the right of the present invention should be listed in the scope of the patent application described later.

2a, 3a: Substrate body

21,31: Line body

21a, 31a: first conductive wire body

21b, 31b: the second conductive wire

210, 310: Recess

211, 311: Conductive traces

22,32: Conductor

R,t: width

Claims (16)

A substrate structure includes: a substrate body; and a circuit body, which is configured based on the shape of the substrate body and defines a conductive trace and at least one recess formed on the conductive trace, wherein the conductive trace has The first conductive wire body and the second conductive wire body are integrally connected, and the thickness of the first conductive wire body is greater than the thickness of the second conductive wire body, so that the first conductive wire body and the second conductive wire body are The concave portion is formed. The substrate structure according to claim 1, wherein the depth of the recess is 1/2 to 1/3 of the thickness of the circuit body. The substrate structure according to claim 1, wherein the width of the recess is 1/3 of the width of the circuit body. The substrate structure of claim 1, wherein the recesses are formed on opposite sides of the circuit body. The substrate structure according to claim 4, wherein the depth of one of the recesses on the opposite sides of the circuit body is 1/2 to 1/3 of the thickness of the circuit body. The substrate structure according to claim 4, wherein the width of one of the recesses on the opposite sides of the circuit body is 1/3 of the width of the circuit body. A substrate structure includes: a substrate body; and a circuit body, which is configured based on the shape of the substrate body and defines a conductive trace and at least one concave portion formed on the conductive trace, wherein the concave portion penetrates up and down , and the width of the recess is 1/3 of the width of the circuit body. The substrate structure according to claim 7, wherein the circuit body has a plurality of the recesses arranged at a distance from each other. A method for manufacturing a substrate structure, comprising: providing a substrate body configured with at least one conductor; and removing part of the material of the conductor to form a circuit body, wherein the circuit body is defined with conductive traces and at least one forming A recess on the conductive trace, wherein the conductive trace has a first conductive wire body and a second conductive wire body that are integrally connected, and the thickness of the first conductive wire body is greater than the thickness of the second conductive wire body , so that the first conductive wire body and the second conductive wire body form the concave portion. The manufacturing method of the substrate structure according to the claim 9, wherein the depth of the recess is 1/2 to 1/3 of the thickness of the circuit body. The manufacturing method of the substrate structure as described in claim 9, wherein the width of the recess is 1/3 of the width of the circuit body. The manufacturing method of the substrate structure as described in claim 9, wherein the concave portion is formed on opposite sides of the circuit body. The manufacturing method of the substrate structure according to the claim 12, wherein the depth of one of the recesses on the opposite sides of the circuit body is 1/2 to 1/3 of the thickness of the circuit body. The manufacturing method of the substrate structure according to the claim 12, wherein the width of one of the recesses on the opposite sides of the circuit body is 1/3 of the width of the circuit body. A method for manufacturing a substrate structure, comprising: providing a substrate body configured with at least one conductor; and Part of the material of the conductor is removed to form a circuit body, the circuit body is defined with a conductive trace and at least one concave portion formed on the conductive trace, wherein the concave portion is in the shape of a perforation penetrating up and down, and the concave portion is The width is 1/3 of the width of the circuit body. The method for manufacturing a substrate structure as described in claim 15, wherein the circuit body system has a plurality of the recesses arranged at intervals from each other.

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