[go: up one dir, main page]

TWI608765B - Print circuit board and method for manufacturing same - Google Patents

Print circuit board and method for manufacturing same Download PDF

Info

Publication number
TWI608765B
TWI608765B TW104123344A TW104123344A TWI608765B TW I608765 B TWI608765 B TW I608765B TW 104123344 A TW104123344 A TW 104123344A TW 104123344 A TW104123344 A TW 104123344A TW I608765 B TWI608765 B TW I608765B
Authority
TW
Taiwan
Prior art keywords
layer
copper foil
conductive
foil layer
circuit board
Prior art date
Application number
TW104123344A
Other languages
Chinese (zh)
Other versions
TW201703589A (en
Inventor
郭志
Original Assignee
鵬鼎科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 鵬鼎科技股份有限公司 filed Critical 鵬鼎科技股份有限公司
Publication of TW201703589A publication Critical patent/TW201703589A/en
Application granted granted Critical
Publication of TWI608765B publication Critical patent/TWI608765B/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/421Blind plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2009Reinforced areas, e.g. for a specific part of a flexible printed circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

電路板及其製作方法 Circuit board and manufacturing method thereof

本發明涉及電路板技術領域,尤其涉及一種電路板及其製作方法。 The present invention relates to the field of circuit boards, and in particular, to a circuit board and a method of fabricating the same.

隨著電子產品向輕薄化發展的趨勢,底銅材料的選擇也會越來越趨向輕薄化,而在輕薄底銅上加工盲孔是電路板製作過程中必不可少的。然而,目前的盲孔加工工藝中的表面處理會造成銅厚的削減,而各前制程中,多次涉及到表面處理,多次銅厚削減疊加,會出現盲孔孔破等風險,進而影響線路形成及各層線路的導通。 With the trend of thinner and lighter electronic products, the choice of bottom copper materials will become more and more light and thin, and the processing of blind holes on thin and light copper is indispensable in the process of circuit board production. However, the surface treatment in the current blind hole processing process will cause a reduction in copper thickness, and in each of the previous processes, the surface treatment is involved many times, and multiple copper thickness reductions are superimposed, and the risk of blind hole breakage may occur, thereby affecting Line formation and conduction of lines at each layer.

有鑑於此,本發明提供一種能夠降低孔破風險的電路板 In view of this, the present invention provides a circuit board capable of reducing the risk of hole breakage. .

一種電路板,該電路板包括一基材層、形成在該基材層的相背兩表面的一第一導電線路層和一第二導電線路層、至少一個導電盲孔及至少一個加強墊;至少一個該導電盲孔電連接該第一導電線路層及該第二導電線路層,該第二導電線路層對應於該導電盲孔的部分形成有凹陷,至少一個該加強墊形成在該第二導電線路層的遠離該基材層的表面上,從而凸出於該第二導電線路層,一個該加強墊形成在一個該導電盲孔的底部。 A circuit board comprising a substrate layer, a first conductive circuit layer and a second conductive circuit layer formed on opposite surfaces of the substrate layer, at least one conductive blind hole and at least one reinforcing pad; The at least one conductive via is electrically connected to the first conductive circuit layer and the second conductive circuit layer, and the second conductive circuit layer is formed with a recess corresponding to the conductive blind hole, and at least one of the reinforcing pads is formed in the second The conductive circuit layer is away from the surface of the substrate layer so as to protrude from the second conductive circuit layer, and one of the reinforcing pads is formed at a bottom of the conductive blind hole.

一種電路板的製作方法,其步驟包括:提供一電路基板,該電路基板包括一基材層及形成在該基材層相背兩表面的一第一銅箔層和一第二銅箔 層;該第二銅箔層的遠離該基材層的表面上預定位置形成至少一個加強墊,該加強墊凸出於該第二銅箔層;自該第一銅箔層向該加強墊形成至少一個導電盲孔,該第二銅箔層對應於該導電盲孔的部分形成有凹陷;將第一銅箔層及該第二銅箔層製作形成第一導電線路層和第二導電線路層,該導電盲孔電連接該第一導電線路層和該第二導電線路層。 A method of manufacturing a circuit board, the method comprising: providing a circuit substrate, the circuit substrate comprising a substrate layer and a first copper foil layer and a second copper foil formed on opposite surfaces of the substrate layer a layer; a predetermined position on a surface of the second copper foil layer away from the substrate layer forming at least one reinforcing pad protruding from the second copper foil layer; forming the reinforcing pad from the first copper foil layer At least one conductive blind hole, the second copper foil layer is formed with a recess corresponding to the portion of the conductive blind hole; forming the first copper foil layer and the second copper foil layer to form the first conductive circuit layer and the second conductive circuit layer The conductive via hole electrically connects the first conductive circuit layer and the second conductive circuit layer.

本發明提供的電路板,在對應於導電盲孔的第二銅箔層上電鍍形成了至少一個加強墊,增加了導電盲孔的底銅厚度,降低了導電盲孔在盲孔加工及後續制程中出現孔破的風險。 The circuit board provided by the invention forms at least one reinforcing pad on the second copper foil layer corresponding to the conductive blind hole, increases the thickness of the bottom copper of the conductive blind hole, and reduces the processing of the conductive blind hole in the blind hole and the subsequent process There is a risk of hole breakage.

100‧‧‧電路板 100‧‧‧ boards

10‧‧‧電路基板 10‧‧‧ circuit board

11‧‧‧基材層 11‧‧‧Substrate layer

12‧‧‧第一銅箔層 12‧‧‧First copper foil layer

13‧‧‧第二銅箔層 13‧‧‧Second copper foil layer

131‧‧‧凹陷 131‧‧‧ dent

14‧‧‧第一乾膜層 14‧‧‧First dry film

15‧‧‧第二幹膜層 15‧‧‧Second dry film

151‧‧‧第一開口 151‧‧‧ first opening

152‧‧‧加強墊 152‧‧‧Enhanced mat

16‧‧‧棕化膜 16‧‧‧ Brown film

17‧‧‧導電盲孔 17‧‧‧ Conductive blind holes

171‧‧‧盲孔 171‧‧‧Blind hole

172‧‧‧導電層 172‧‧‧ Conductive layer

173‧‧‧電鍍層 173‧‧‧Electroplating

18‧‧‧第一導電線路層 18‧‧‧First conductive circuit layer

19‧‧‧第二導電線路層 19‧‧‧Second conductive circuit layer

21‧‧‧第一覆蓋膜層 21‧‧‧First cover layer

22‧‧‧第二覆蓋膜層 22‧‧‧second cover layer

23‧‧‧防焊層 23‧‧‧ solder mask

200‧‧‧電路板中間體 200‧‧‧Circuit board intermediates

圖1是本發明提供的一電路基板的剖視圖。 1 is a cross-sectional view of a circuit substrate provided by the present invention.

圖2是在圖1所述的電路基板的相背兩側面上形成幹膜後的剖視圖。 Fig. 2 is a cross-sectional view showing a dry film formed on opposite sides of the circuit board of Fig. 1;

圖3是圖2所述的幹膜形成第一開口後的剖視圖。 Figure 3 is a cross-sectional view of the dry film of Figure 2 after forming a first opening.

圖4是在圖3所述的第一開口內選擇性電鍍,形成加強墊後的剖視圖。 4 is a cross-sectional view of the first opening illustrated in FIG. 3 after selective plating to form a reinforcing pad.

圖5是在圖4所述的幹膜去除後的剖視圖。 Figure 5 is a cross-sectional view of the dry film removed after Figure 4 is removed.

圖6是將圖5所述的銅箔層表面形成棕/黑化膜後的剖視圖。 Fig. 6 is a cross-sectional view showing the surface of the copper foil layer shown in Fig. 5 formed into a brown/blackened film.

圖7是將圖6所述的電路基板上形成盲孔後的剖視圖。 Fig. 7 is a cross-sectional view showing a blind hole formed in the circuit board shown in Fig. 6.

圖8是在圖7所述的棕/黑化膜去除後的剖視圖。 Figure 8 is a cross-sectional view of the brown/blackened film described in Figure 7 after removal.

圖9是在圖8所述的盲孔的壁上形成導電層後的剖視圖。 Fig. 9 is a cross-sectional view showing a conductive layer formed on the wall of the blind hole shown in Fig. 8.

圖10是對圖9所述的盲孔進行電鍍,形成導電盲孔後的剖視圖。 Fig. 10 is a cross-sectional view showing the blind hole of Fig. 9 electroplated to form a conductive blind hole.

圖11是對圖10所述的銅箔層製作形成導電線路層後的剖視圖。 Fig. 11 is a cross-sectional view showing the formation of a conductive wiring layer in the copper foil layer shown in Fig. 10.

圖12是在圖11所述的導電線路層上形成覆蓋膜層厚的剖視圖。 Figure 12 is a cross-sectional view showing the thickness of a cover film formed on the conductive wiring layer described in Figure 11.

圖13是在圖12所述的覆蓋膜層的空隙形成防焊層,進而形成電路板後的剖視圖。 Fig. 13 is a cross-sectional view showing a gap-preventing layer formed in the gap of the cover film layer shown in Fig. 12, and further forming a circuit board.

下面結合圖1~圖13及實施例對本案所提供的電路板及其製作方法作進一步說明。 The circuit board provided in the present application and the manufacturing method thereof will be further described below with reference to FIGS. 1 to 13 and the embodiments.

一種電路板100的製作方法,其包括如下步驟:第一步,請參閱圖1,提供一電路基板10。 A manufacturing method of a circuit board 100 includes the following steps: First, referring to FIG. 1, a circuit substrate 10 is provided.

該電路基板10包括一絕緣的基材層11、一第一銅箔層12及一第二銅箔層13,該第一銅箔層12及該第二銅箔層13分別形成在該基材層11的相背的兩側。 The circuit substrate 10 includes an insulating substrate layer 11, a first copper foil layer 12 and a second copper foil layer 13. The first copper foil layer 12 and the second copper foil layer 13 are respectively formed on the substrate. The opposite sides of the layer 11 are.

其中,該基材層11的材質可以為聚醯亞胺(polyimide,PI)、聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate,PET)、聚萘二甲酸乙二醇酯(Polyethylene Naphthalate,PEN)等可撓性材料,也可以為樹脂板、陶瓷板、金屬板等硬性支撐材料。 The material of the substrate layer 11 may be polyimide (PI), polyethylene terephthalate (PET), or polyethylene naphthalate (PEN). The flexible material may be a rigid support material such as a resin plate, a ceramic plate or a metal plate.

第二步,請參閱圖2~圖5,在該電路基板10的該第二銅箔層13的遠離該基材層的表面上的預定位置形成至少一個加強墊152,進而形成電路板中間體200。 In the second step, referring to FIG. 2 to FIG. 5, at least one reinforcing pad 152 is formed at a predetermined position on the surface of the second copper foil layer 13 of the circuit substrate 10 away from the substrate layer, thereby forming a circuit board intermediate. 200.

首先,請參閱圖2,分別在該第一銅箔層12及該第二銅箔層13的遠離該基材層11的表面上形成一第一乾膜層14及一第二幹膜層15。其中,該第一乾膜層14及該第二幹膜層15可以通過壓膜裝置壓合在該第一銅箔層12及該第二銅箔層13的兩側。其次,請參閱圖3,通過曝光制程,該第一乾膜層14及該第二幹膜層15有選擇性地硬化,之後通過顯影制程,溶解掉該非硬化區的幹膜,形成至少一個第一開口151。定義該第一開口151的寬度為D1,在本實施例中,D1約為100-150um。 First, referring to FIG. 2, a first dry film layer 14 and a second dry film layer 15 are formed on the surface of the first copper foil layer 12 and the second copper foil layer 13 away from the substrate layer 11, respectively. . The first dry film layer 14 and the second dry film layer 15 may be pressed on both sides of the first copper foil layer 12 and the second copper foil layer 13 by a lamination device. Next, referring to FIG. 3, the first dry film layer 14 and the second dry film layer 15 are selectively hardened by an exposure process, and then the dry film of the non-hardened zone is dissolved by a developing process to form at least one An opening 151. The width of the first opening 151 is defined as D1. In the present embodiment, D1 is approximately 100-150 um.

再次,請參閱圖4,通過選擇性電鍍的方法在至少一個該第一開口151內形成至少一個該加強墊152。該加強墊152的形狀可以為圓形也可以為方形或是其他形狀。 Again, referring to FIG. 4, at least one of the reinforcing pads 152 is formed in at least one of the first openings 151 by selective plating. The reinforcing pad 152 may have a circular shape or a square shape or other shapes.

之後,請參閱圖5,通過去膜裝置,去除硬化後的幹膜,使至少一個該加強墊152凸出於該第二銅箔層13,形成該電路板中間體200。 Thereafter, referring to FIG. 5, the hardened dry film is removed by a film removing device, and at least one of the reinforcing pads 152 protrudes from the second copper foil layer 13 to form the circuit board intermediate body 200.

該電路板中間體200包括該基材層11、該第一銅箔層12、該第二銅箔層13及至少一個形成在該第二銅箔層13上的該加強墊152。 The circuit board intermediate body 200 includes the base material layer 11, the first copper foil layer 12, the second copper foil layer 13, and at least one reinforcing pad 152 formed on the second copper foil layer 13.

其中,該加強墊152的寬度與該第一開口151的寬度相等,定義該加強墊152的厚度為D2,D2的厚度不大於該第二銅箔層的厚度的二分之一。該加強墊152的形成位置即對應後續形成的導電盲孔17的位置。 The width of the reinforcing pad 152 is equal to the width of the first opening 151, and the thickness of the reinforcing pad 152 is defined as D2, and the thickness of D2 is not more than one-half of the thickness of the second copper foil layer. The position at which the reinforcing pad 152 is formed corresponds to the position of the subsequently formed conductive blind hole 17.

第三步,請參閱圖6~圖10,在第二步形成的該電路板中間體200上形成至少一個導電盲孔17。其中,該加強墊152設置在該導電盲孔17的底部,該加強墊的大小不小於該導電盲孔17的底部的大小。 In the third step, referring to FIG. 6 to FIG. 10, at least one conductive blind hole 17 is formed on the circuit board intermediate body 200 formed in the second step. The reinforcing pad 152 is disposed at the bottom of the conductive blind hole 17 , and the size of the reinforcing pad is not less than the size of the bottom of the conductive blind hole 17 .

具體地,在第二步形成的該電路板中間體200上形成至少一個盲孔171,至少一個該盲孔171可以通過機械鑽孔或是鐳射鑽孔的方式形成。在本實施例中,至少一個該盲孔171是通過鐳射鑽孔形成的。在本實施例中,製作至少一個該導電盲孔17的步驟如下:首先,請參閱圖6,通過棕化工藝在該第一銅箔層12、該第二銅箔層13及該加強墊152的表面形成一層棕化膜16。該棕化膜16用於減少鐳射燒蝕能量的損失。 Specifically, at least one blind hole 171 is formed on the circuit board intermediate body 200 formed in the second step, and at least one of the blind holes 171 may be formed by mechanical drilling or laser drilling. In the present embodiment, at least one of the blind holes 171 is formed by laser drilling. In this embodiment, the step of fabricating at least one of the conductive vias 17 is as follows: First, referring to FIG. 6, the first copper foil layer 12, the second copper foil layer 13, and the reinforcing pad 152 are passed through a browning process. The surface forms a browning film 16. The browning film 16 serves to reduce the loss of laser ablation energy.

在其他實施例中,也可以通過黑化工藝在該第一銅箔層12、該第二銅箔層13及該加強墊152的表面形成一層黑化膜。 In other embodiments, a blackening film may be formed on the surface of the first copper foil layer 12, the second copper foil layer 13, and the reinforcing pad 152 by a blackening process.

其中,在進行棕/黑化前,還需要對第二步形成的電路板中間體200進行表面處理。 Among them, before the brown/blackening is performed, the circuit board intermediate body 200 formed in the second step needs to be surface-treated.

其次,請參閱圖7,自在該第一銅箔層12的表面向該第二銅箔層13通過鐳射燒蝕形成至少一個盲孔171,該盲孔171貫通該第一銅箔層12及該基材層11,該盲孔171與該加強墊152的位置相對。定義與該盲孔171相對應的部分該第二銅箔層13(即該盲孔171底部的第二銅箔層13)為該盲孔171的底銅,該加強墊152使得該盲孔171的底銅厚度增加。本實施例中,如圖7所示,帶有該盲孔171的該電路板中間體200在鐳射燒蝕形成盲孔171時,還部分燒蝕該第二銅箔層13,且在進行表面處理時,也會蝕刻部分該第二銅箔層13,使得該第二銅箔層13的表面形成多個凹陷131,該凹陷131會對該盲孔171的底銅的厚度有所削減,在後續流程中容易發生孔破,但是,在本發明中,由於該盲孔171的底銅厚度增加,使得該盲孔171的底銅在鐳射燒蝕及表面處理後,在後續流程中也不容易出現孔破。 Next, referring to FIG. 7, at least one blind hole 171 is formed by laser ablation from the surface of the first copper foil layer 12 to the second copper foil layer 13, and the blind hole 171 penetrates the first copper foil layer 12 and the The base layer 11 has a blind hole 171 opposite to the position of the reinforcing pad 152. A portion of the second copper foil layer 13 (ie, the second copper foil layer 13 at the bottom of the blind hole 171) corresponding to the blind hole 171 is defined as a bottom copper of the blind hole 171, and the reinforcing pad 152 makes the blind hole 171 The thickness of the bottom copper is increased. In this embodiment, as shown in FIG. 7, the circuit board intermediate body 200 with the blind hole 171 partially ablates the second copper foil layer 13 when the laser ablation forms the blind hole 171, and performs the surface. During processing, a portion of the second copper foil layer 13 is also etched such that a surface of the second copper foil layer 13 forms a plurality of recesses 131, and the recess 131 reduces the thickness of the bottom copper of the blind via 171. Hole breakage is likely to occur in the subsequent process. However, in the present invention, since the thickness of the bottom copper of the blind hole 171 is increased, the bottom copper of the blind hole 171 is not easily removed in the subsequent process after laser ablation and surface treatment. The hole broke.

再次,請參閱圖8,微蝕去除該棕化膜16。 Again, referring to Figure 8, the browning film 16 is removed by microetching.

之後,請參閱圖9,對該盲孔171進行孔金屬化處理,在每個該盲孔171的孔壁形成一導通該第一銅箔層12及該第二銅箔層13的導電層172。 Then, referring to FIG. 9, the blind via 171 is subjected to a hole metallization process, and a conductive layer 172 that turns on the first copper foil layer 12 and the second copper foil layer 13 is formed on the sidewall of each of the blind vias 171. .

其中,可以通過黑影或是化銅等制程實現該盲孔171的金屬化。 The metallization of the blind via 171 can be achieved by a process such as black shadow or copper.

在對該盲孔171進行孔金屬化處理前,還需要經過刷磨、高壓、超聲波水洗等表面前處理及等離子體(plasma)除膠、微蝕、活化等制程以對上述形成的帶有該盲孔171的電路板中間體200的表面及該盲孔171的內壁進行磨平、清潔、除膠等。上述這些流程也會對該盲孔171的底銅的銅厚有所削減,但是,在本發明中,由於該盲孔171的底銅厚度增加,進而使得該盲孔171在上述流程中不容易出現孔破。 Before the hole hole 171 is subjected to the hole metallization treatment, surface pretreatment such as brushing, high pressure, ultrasonic water washing, plasma plasma removal, microetching, activation, etc. are required to form the above-mentioned The surface of the circuit board intermediate body 200 of the blind hole 171 and the inner wall of the blind hole 171 are ground, cleaned, glued, and the like. The above processes also reduce the copper thickness of the bottom copper of the blind via 171. However, in the present invention, since the thickness of the bottom copper of the blind via 171 is increased, the blind via 171 is not easily made in the above process. The hole broke.

最後,請參閱圖10,通過選擇性電鍍在該盲孔171的該導電層172上形成一電鍍層173,進而形成導電盲孔17。 Finally, referring to FIG. 10, a plating layer 173 is formed on the conductive layer 172 of the blind via 171 by selective plating, thereby forming a conductive via hole 17.

第四步,請參閱圖11,將該第一銅箔層12和該第二銅箔層13分別製作形成第一導電線路層18及第二導電線路層19。 In the fourth step, referring to FIG. 11, the first copper foil layer 12 and the second copper foil layer 13 are respectively formed into a first conductive wiring layer 18 and a second conductive wiring layer 19.

其中,該第一導電線路層18及該第二導電線路層19可以通過影像轉移工藝及蝕刻工藝形成。 The first conductive circuit layer 18 and the second conductive circuit layer 19 can be formed by an image transfer process and an etching process.

第五步,請參閱圖12,在該第一導電線路層18的表面形成一第一覆蓋膜層21,在該第二導電線路層19的表面形成一第二覆蓋膜層22。 In the fifth step, referring to FIG. 12, a first cover film layer 21 is formed on the surface of the first conductive circuit layer 18, and a second cover film layer 22 is formed on the surface of the second conductive circuit layer 19.

其中,該第一覆蓋膜層21包括至少一第二開口211,部分該第一導電線路層18從該第二開口211中裸露出來。 The first cover film layer 21 includes at least one second opening 211 , and a portion of the first conductive circuit layer 18 is exposed from the second opening 211 .

在形成該第一覆蓋膜層21及該第二覆蓋膜層22之前,還需要對第四步形成的電路板進行電路板表面前處理,在此過程中,該導電盲孔17的底銅的銅厚也會有所削減,但是,在本發明中,由於在對應於該導電盲孔17的底銅的位置增加了該加強墊152,進而使該導電盲孔17的底銅變厚,在上述流程中不容易出現孔破。 Before forming the first cover film layer 21 and the second cover film layer 22, the circuit board surface pre-treatment of the circuit board formed in the fourth step is also required, in the process, the bottom copper of the conductive blind hole 17 is The copper thickness is also reduced. However, in the present invention, since the reinforcing pad 152 is added at a position corresponding to the bottom copper of the conductive blind hole 17, the bottom copper of the conductive blind hole 17 is thickened. Hole breakage is less likely to occur in the above process.

第六步,請參閱圖13,在該第二開口211內形成一防焊層23,進而形成該電路板100。 In the sixth step, referring to FIG. 13, a solder resist layer 23 is formed in the second opening 211 to form the circuit board 100.

在本實施例中,該電路板100為雙層板,在其他實施例中,該電路板100並不局限於雙層板,還可以是多層板。 In the embodiment, the circuit board 100 is a double-layer board. In other embodiments, the circuit board 100 is not limited to a double-layer board, and may also be a multi-layer board.

具體地,請參閱圖13,該電路板100包括一基材層11、形成在該基材層11的相背兩表面的一第一導電線路層18和一第二導電線路層19、形成 在該第一導電線路層18的遠離該基材層11的表面上的一第一覆蓋膜層21和一防焊層23及形成在該第二導電線路層19和該加強墊152的遠離該基材層11的表面上的一第二覆蓋膜層22。 Specifically, referring to FIG. 13 , the circuit board 100 includes a substrate layer 11 , a first conductive circuit layer 18 and a second conductive circuit layer 19 formed on opposite surfaces of the substrate layer 11 . a first cover film layer 21 and a solder resist layer 23 on the surface of the first conductive circuit layer 18 away from the substrate layer 11 and a distance away from the second conductive circuit layer 19 and the reinforcing pad 152 A second cover film layer 22 on the surface of the substrate layer 11.

該電路板100上形成有至少一個導電盲孔17,該導電盲孔17電連接該第一導電線路層18及該第二導電線路層19。該第二銅箔層13對應於該導電盲孔17的部分形成有多個凹陷131,該凹陷131使得該導電盲孔17底銅有消減。至少一個該加強墊152形成在該第二導電線路層19的遠離該基材層11的表面上,每個該加強墊152與每個該導電盲孔17的位置相對。定義該加強墊152的厚度為D2,D2的厚度不大於該第二銅箔層的厚度的二分之一。該第一覆蓋膜層21上形成有至少一個第二開口,該防焊層23有選擇性地分佈在該第一覆蓋膜層21的第二開口211內。 The circuit board 100 is formed with at least one conductive blind hole 17 electrically connected to the first conductive circuit layer 18 and the second conductive circuit layer 19. A portion of the second copper foil layer 13 corresponding to the conductive blind hole 17 is formed with a plurality of recesses 131, and the recess 131 causes the bottom copper of the conductive blind via 17 to be reduced. At least one of the reinforcing pads 152 is formed on a surface of the second conductive wiring layer 19 remote from the substrate layer 11, and each of the reinforcing pads 152 is opposed to a position of each of the conductive blind holes 17. The thickness of the reinforcing pad 152 is defined as D2, and the thickness of D2 is not more than one-half of the thickness of the second copper foil layer. At least one second opening is formed on the first cover film layer 21, and the solder resist layer 23 is selectively distributed in the second opening 211 of the first cover film layer 21.

本發明提供的電路板100及其製作方法,在對應於至少一個導電盲孔17的第二銅箔層13的位置形成至少一個具有一定厚度的加強墊152,以增加與該加強墊152對應的該導電盲孔17的底銅厚度,在經各制程及各前處理制程後可避免該導電盲孔17的底部出現孔破,以滿足導電盲孔和線路設計需求。 The circuit board 100 and the manufacturing method thereof provide at least one reinforcing pad 152 having a certain thickness at a position corresponding to the second copper foil layer 13 of the at least one conductive blind hole 17 to increase the corresponding to the reinforcing pad 152. The thickness of the bottom copper of the conductive blind via 17 can prevent the bottom of the conductive blind via 17 from being broken after each process and each pre-treatment process, so as to meet the design requirements of the conductive blind via and the circuit.

綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士爰依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。 In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

100‧‧‧電路板 100‧‧‧ boards

11‧‧‧基材層 11‧‧‧Substrate layer

131‧‧‧凹陷 131‧‧‧ dent

152‧‧‧加強墊 152‧‧‧Enhanced mat

17‧‧‧導電盲孔 17‧‧‧ Conductive blind holes

18‧‧‧第一導電線路層 18‧‧‧First conductive circuit layer

19‧‧‧第二導電線路層 19‧‧‧Second conductive circuit layer

21‧‧‧第一覆蓋膜層 21‧‧‧First cover layer

22‧‧‧第二覆蓋膜層 22‧‧‧second cover layer

23‧‧‧防焊層 23‧‧‧ solder mask

Claims (3)

一種電路板的製作方法,其步驟包括:提供一電路基板,該電路基板包括一基材層及形成在該基材層相背兩表面的一第一銅箔層和一第二銅箔層;該第二銅箔層的遠離該基材層的表面上預定位置形成至少一個加強墊,該加強墊凸出於該第二銅箔層;自該第一銅箔層向該加強墊形成至少一個導電盲孔,該第二銅箔層對應於該導電盲孔的部分形成有凹陷;將第一銅箔層及該第二銅箔層製作形成第一導電線路層和第二導電線路層,該導電盲孔電連接該第一導電線路層和該第二導電線路層。 A circuit board manufacturing method, the method comprising: providing a circuit substrate, the circuit substrate comprising a substrate layer and a first copper foil layer and a second copper foil layer formed on opposite surfaces of the substrate layer; Forming at least one reinforcing pad at a predetermined position on a surface of the second copper foil layer away from the substrate layer, the reinforcing pad protruding from the second copper foil layer; forming at least one from the first copper foil layer toward the reinforcing pad a conductive blind hole, the portion of the second copper foil layer corresponding to the conductive blind hole is formed with a recess; the first copper foil layer and the second copper foil layer are formed to form a first conductive circuit layer and a second conductive circuit layer, The conductive blind via electrically connects the first conductive wiring layer and the second conductive wiring layer. 如請求項第1項所述的電路板的製作方法,其中,該加強墊的大小不小於該導電盲孔的孔底的大小。 The method of manufacturing the circuit board of claim 1, wherein the size of the reinforcing pad is not less than the size of the bottom of the conductive blind hole. 如請求項第1項所述的電路板的製作方法,其中該加強墊的厚度不大於該第二銅箔層的厚度的二分之一。 The method of manufacturing the circuit board of claim 1, wherein the thickness of the reinforcing pad is not more than one-half of the thickness of the second copper foil layer.
TW104123344A 2015-06-30 2015-07-17 Print circuit board and method for manufacturing same TWI608765B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510384498.0A CN106332444B (en) 2015-06-30 2015-06-30 Circuit board and method of making the same

Publications (2)

Publication Number Publication Date
TW201703589A TW201703589A (en) 2017-01-16
TWI608765B true TWI608765B (en) 2017-12-11

Family

ID=57727969

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104123344A TWI608765B (en) 2015-06-30 2015-07-17 Print circuit board and method for manufacturing same

Country Status (2)

Country Link
CN (1) CN106332444B (en)
TW (1) TWI608765B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109413882B (en) * 2018-12-12 2021-09-21 东莞市若美电子科技有限公司 PCB board solder mask manufacturing process for LED display applications
CN113873786B (en) * 2020-06-30 2023-12-29 深南电路股份有限公司 Circuit board processing method and circuit board

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI319615B (en) * 2006-08-16 2010-01-11 Phoenix Prec Technology Corp Package substrate and manufacturing method thereof
TW201016094A (en) * 2008-10-15 2010-04-16 Unimicron Technology Corp Embedded circuit structure and process thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI318093B (en) * 2007-05-01 2009-12-01 Phoenix Prec Technology Corp Circuit board and manufacturing method thereof
CN102131347B (en) * 2010-01-15 2012-11-28 欣兴电子股份有限公司 Circuit substrate and manufacturing method thereof
CN201629905U (en) * 2010-01-18 2010-11-10 国基电子(上海)有限公司 circuit board
CN103369865A (en) * 2012-03-30 2013-10-23 宏启胜精密电子(秦皇岛)有限公司 A method for producing a circuit board
CN103796434B (en) * 2014-01-17 2016-09-07 杨秀英 A kind of ultrathin FPC method for processing blind hole

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI319615B (en) * 2006-08-16 2010-01-11 Phoenix Prec Technology Corp Package substrate and manufacturing method thereof
TW201016094A (en) * 2008-10-15 2010-04-16 Unimicron Technology Corp Embedded circuit structure and process thereof

Also Published As

Publication number Publication date
CN106332444A (en) 2017-01-11
TW201703589A (en) 2017-01-16
CN106332444B (en) 2021-03-23

Similar Documents

Publication Publication Date Title
TWI449480B (en) Multilayer wiring substrate
TWI617225B (en) Printed circuit board and method for manufacturing the same
US11690178B2 (en) Multilayer printed wiring board and method of manufacturing the same
TWI492690B (en) Method for manufacturing circuit board
TWI484875B (en) Circuit board and method for manufacturing same
CN104241231B (en) Manufacturing method of chip packaging substrate
TWI606765B (en) Printed circuit board and method for manufacturing same
TWI542260B (en) Printed circuit board and method for manufacturing the same
JP2006093650A (en) Manufacturing method of package substrate using electroless nickel plating
CN104115569B (en) Printed circuit board and manufacturing methods
JP2009283671A (en) Method of manufacturing printed-wiring board
KR101287761B1 (en) Printed circuit board and method for manufacturing the same
TW201720259A (en) Flexible printed circuit board and method manufacturing same
TWI608765B (en) Print circuit board and method for manufacturing same
TWI507098B (en) The flexible printed circuit board
TWI606763B (en) Circuit board and manufacturing method for same
KR101669534B1 (en) Circuit board with bumps and method of manufacturing the same
TW201444440A (en) Wiring substrate and method of manufacturing same
US8828247B2 (en) Method of manufacturing printed circuit board having vias and fine circuit and printed circuit board manufactured using the same
TWI462660B (en) Printed circuit board and method for manufacturing same
TWI479965B (en) Method for manufacturing printed circuit board
JP4256454B2 (en) Wiring board manufacturing method and wiring board
CN104105340A (en) Package substrate via hole structure and manufacture method
TWI420992B (en) Method for manufacturing printed circuit board
JP2009272600A (en) Printed circuit board manufacturing method