TWI420992B - Method for manufacturing printed circuit board - Google Patents
Method for manufacturing printed circuit board Download PDFInfo
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- TWI420992B TWI420992B TW99105407A TW99105407A TWI420992B TW I420992 B TWI420992 B TW I420992B TW 99105407 A TW99105407 A TW 99105407A TW 99105407 A TW99105407 A TW 99105407A TW I420992 B TWI420992 B TW I420992B
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- layer
- circuit board
- conductive
- wet
- plating
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- 238000000034 method Methods 0.000 title claims description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 239000010410 layer Substances 0.000 claims description 125
- 238000007747 plating Methods 0.000 claims description 36
- 239000007788 liquid Substances 0.000 claims description 27
- 239000011241 protective layer Substances 0.000 claims description 23
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 21
- 229910052737 gold Inorganic materials 0.000 claims description 21
- 239000010931 gold Substances 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 19
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 18
- 239000000126 substance Substances 0.000 claims description 17
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 10
- 229910052759 nickel Inorganic materials 0.000 claims description 9
- 238000000576 coating method Methods 0.000 claims description 7
- 229910000679 solder Inorganic materials 0.000 claims description 7
- 230000007704 transition Effects 0.000 claims description 7
- 239000003792 electrolyte Substances 0.000 claims description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 2
- 239000011135 tin Substances 0.000 claims 2
- 229910052718 tin Inorganic materials 0.000 claims 2
- 239000000243 solution Substances 0.000 description 13
- 238000005260 corrosion Methods 0.000 description 5
- 230000007797 corrosion Effects 0.000 description 5
- 229920000139 polyethylene terephthalate Polymers 0.000 description 5
- 239000005020 polyethylene terephthalate Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000004952 Polyamide Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920002647 polyamide Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000003755 preservative agent Substances 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- LCPVQAHEFVXVKT-UHFFFAOYSA-N 2-(2,4-difluorophenoxy)pyridin-3-amine Chemical compound NC1=CC=CN=C1OC1=CC=C(F)C=C1F LCPVQAHEFVXVKT-UHFFFAOYSA-N 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 238000003848 UV Light-Curing Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007334 copolymerization reaction Methods 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000008151 electrolyte solution Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000011152 fibreglass Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- BSIDXUHWUKTRQL-UHFFFAOYSA-N nickel palladium Chemical compound [Ni].[Pd] BSIDXUHWUKTRQL-UHFFFAOYSA-N 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 239000004926 polymethyl methacrylate Substances 0.000 description 1
- CHQMHPLRPQMAMX-UHFFFAOYSA-L sodium persulfate Substances [Na+].[Na+].[O-]S(=O)(=O)OOS([O-])(=O)=O CHQMHPLRPQMAMX-UHFFFAOYSA-L 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000007785 strong electrolyte Substances 0.000 description 1
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- Manufacturing Of Printed Wiring (AREA)
Description
本發明涉及電路板製作技術,尤其涉及一種電路板製作方法。 The present invention relates to circuit board manufacturing technology, and in particular, to a circuit board manufacturing method.
柔性電路板廣泛應用於各個領域,尤其於具有輕、薄、短、小之要求之便攜式電子設備,例如手機中。手機用柔性電路板通常藉由製作線路、製作覆蓋層、化學鍍鎳、化學鍍金、有機塗覆製程以及組裝製程等步驟製作完成。於線路製作工藝中,通常於柔性電路板上形成複數條導電線路以及複數焊盤。複數條導電線路與複數焊盤通常均為銅材料,且每個焊盤均與至少一導電線路相連接。於隨後製作覆蓋層之步驟係指於複數條導電線路上形成覆蓋層。化學鍍鎳與化學鍍金步驟係指於複數焊盤中需要作為接觸點或插接點之至少一焊盤表面形成化學鎳層與化學金層,以保護該至少一焊盤。有機塗覆工藝(Organic Solderability Preservatives,OSP)用於於其他不需要作為接觸點或插接點,而需要與電子元件焊接組裝之複數焊盤表面形成一層有機保焊層,從而保護該些焊盤。並且,該有機保焊層不會影響該些焊盤於後續組裝工藝中與電子元件之焊接組裝。 Flexible circuit boards are widely used in various fields, especially in portable electronic devices that are light, thin, short, and small, such as mobile phones. Flexible circuit boards for mobile phones are usually produced by the steps of making circuits, making cover layers, electroless nickel plating, electroless gold plating, organic coating processes, and assembly processes. In the circuit fabrication process, a plurality of conductive lines and a plurality of pads are usually formed on the flexible circuit board. The plurality of conductive lines and the plurality of pads are each of a copper material, and each of the pads is connected to at least one of the conductive lines. The subsequent step of making the cap layer refers to forming a cap layer on a plurality of conductive traces. The electroless nickel plating and the electroless gold plating step refer to forming a chemical nickel layer and a chemical gold layer on at least one pad surface of the plurality of pads as a contact point or a plug point to protect the at least one pad. The Organic Solderability Preservatives (OSP) is used to protect the pads by forming an organic solder mask on the surface of the plurality of pads that are not required to be soldered or assembled with the electronic components. . Moreover, the organic solder mask does not affect the solder assembly of the pads with the electronic components in subsequent assembly processes.
OSP處理過程通常包括除油、微蝕、水洗、成膜、水洗以及乾燥等步驟。其中,微蝕係指將柔性電路板放置於微蝕液中,使得微 蝕液咬蝕該些焊盤表面之銅層,以粗化該些焊盤表面以便於後續於粗化之焊盤表面形成膜層。然而,由於微蝕液為一種強電解質,而需要作為接觸點或插接點之至少一焊盤表面形成之化學金層之標準電位高於其他焊盤表面之銅之標準電位,從而,於微蝕液中造成了金與銅之間電接觸且同時存於電極電位差之狀況,從此則於該二者之間引起電偶腐蝕,使得於微蝕過程中銅之咬蝕速度被大幅度提高。如此,輕則造成微蝕程度不易控制,重則使得該焊盤以及與該焊盤連接處之導電線路被咬蝕過度而造成線路斷路。 The OSP process typically includes steps such as degreasing, microetching, water washing, film formation, water washing, and drying. Wherein, the micro-etching refers to placing the flexible circuit board in the micro-etching liquid, so that the micro-etching The etchant erodes the copper layers of the pad surfaces to roughen the pad surfaces to facilitate subsequent formation of a film layer on the roughened pad surface. However, since the microetching liquid is a strong electrolyte, the standard potential of the chemical gold layer formed on at least one pad surface as a contact point or a plug point is higher than the standard potential of copper on the surface of other pads, thereby In the etched liquid, the electrical contact between gold and copper is caused and the electrode potential difference is present at the same time. From then on, galvanic corrosion is caused between the two, so that the copper etch rate is greatly improved during the micro-etching process. In this way, the degree of micro-etching is not easy to control, and the wiring causes the pad and the conductive line connected to the pad to be excessively bitten and the line is broken.
有鑑於此,提供一種可避免微蝕過程中產生電偶腐蝕之電路板製作方法實為必要。 In view of this, it is necessary to provide a circuit board manufacturing method that can avoid galvanic corrosion during microetching.
以下以實施例為例說明一種電路板製作方法。 Hereinafter, an embodiment of a circuit board will be described by taking an embodiment as an example.
一種電路板製作方法,包括步驟:提供電路板,該電路板包括絕緣層、形成於絕緣層上之導電層以及形成於部分導電層上之鍍覆層,該導電層之材料具有第一電極電位,該鍍覆層與該導電層電接觸,鍍覆層之材料具有第二電極電位,該第二電極電位大於第一電極電位;於該鍍覆層上形成保護層;將該電路板以濕處理液進行濕處理,該濕處理液為電解質,於該濕處理過程中,該保護層與至少部分導電層暴露於該濕處理液中;去除該保護層,從而獲得濕處理後之電路板。 A circuit board manufacturing method comprising the steps of: providing a circuit board, the circuit board comprising an insulating layer, a conductive layer formed on the insulating layer, and a plating layer formed on the partial conductive layer, the material of the conductive layer having a first electrode potential The plating layer is in electrical contact with the conductive layer, the material of the plating layer has a second electrode potential, the second electrode potential is greater than the first electrode potential; a protective layer is formed on the plating layer; the circuit board is wet The treatment liquid is subjected to a wet treatment, and the wet treatment liquid is an electrolyte. During the wet treatment, the protective layer and at least a portion of the conductive layer are exposed to the wet treatment liquid; and the protective layer is removed to obtain a wet-processed circuit board.
與先前技術相較,本技術方案之電路板製作方法具有如下優點:由於電路板於進行濕處理之前,採用保護層遮蔽鍍覆層,從而使 得鍍覆層不暴露於濕處理液中,避免了濕處理液中鍍覆層與暴露之部分導電層之間電偶腐蝕之產生,使得暴露之部分導電層於濕處理過程中不會被過度處理,從而保證電路板之製作良率與優良性能。 Compared with the prior art, the circuit board manufacturing method of the present technical solution has the following advantages: since the circuit board shields the plating layer with a protective layer before performing the wet processing, The plated layer is not exposed to the wet treatment liquid, and the occurrence of galvanic corrosion between the plating layer and the exposed conductive layer in the wet treatment liquid is avoided, so that the exposed conductive layer is not excessively exposed during the wet treatment process. Processing to ensure the production yield and excellent performance of the board.
10‧‧‧電路板 10‧‧‧ boards
11‧‧‧絕緣層 11‧‧‧Insulation
12‧‧‧導電層 12‧‧‧ Conductive layer
13‧‧‧覆蓋層 13‧‧‧ Coverage
14‧‧‧鍍覆層 14‧‧‧ plating
120‧‧‧導電圖形 120‧‧‧Electrical graphics
121‧‧‧導電線路 121‧‧‧Electrical circuit
122‧‧‧焊盤 122‧‧‧ pads
1221‧‧‧接觸盤 1221‧‧‧Contact plate
1222‧‧‧組裝盤 1222‧‧‧ Assembly disk
15‧‧‧過渡層 15‧‧‧Transition layer
20‧‧‧保護層 20‧‧‧Protective layer
30‧‧‧有機保焊層 30‧‧‧Organic soldering layer
圖1係本技術方案實施例提供之電路板之俯視示意圖。 1 is a top plan view of a circuit board provided by an embodiment of the present technical solution.
圖2係本技術方案實施例提供之電路板沿圖1之II-II線之剖視示意圖。 2 is a cross-sectional view of the circuit board provided by the embodiment of the present technical solution taken along line II-II of FIG. 1.
圖3係於本技術方案實施例提供之電路板之鍍覆層上形成保護層之示意圖。 FIG. 3 is a schematic diagram of forming a protective layer on a plating layer of a circuit board provided by an embodiment of the present technical solution.
圖4係將本技術方案實施例提供之電路板進行濕處理以及表面處理後之示意圖。 FIG. 4 is a schematic view showing the wetness treatment and surface treatment of the circuit board provided by the embodiment of the present technical solution.
圖5係去除本技術方案實施例提供之電路板之保護層後之示意圖。 FIG. 5 is a schematic diagram of the protective layer of the circuit board provided by the embodiment of the present technical solution.
以下結合附圖及實施例對本技術方案提供之電路板製作方法進行詳細說明。 The method for fabricating the circuit board provided by the technical solution will be described in detail below with reference to the accompanying drawings and embodiments.
本技術方案實施例提供之電路板製作方法包括以下步驟: The circuit board manufacturing method provided by the embodiment of the technical solution includes the following steps:
第一步,請一併參閱圖1及圖2,提供電路板10。 In the first step, please refer to FIG. 1 and FIG. 2 together to provide the circuit board 10.
該電路板10可為多層板亦可為單層板。於本實施例中,以電路板10為經過製作線路、製作覆蓋層、化學鍍鎳以及化學鍍金等處理 步驟之單層板為例進行介紹。該電路板10包括絕緣層11、導電層12、覆蓋層13以及鍍覆層14。 The circuit board 10 can be a multi-layer board or a single layer board. In the embodiment, the circuit board 10 is processed, the cover layer, the electroless nickel plating, and the electroless gold plating are processed. The single layer board of the step is introduced as an example. The circuit board 10 includes an insulating layer 11, a conductive layer 12, a cover layer 13, and a plating layer 14.
該絕緣層11可為硬性樹脂層,如環氧樹脂、玻纖布等,亦可柔性樹脂層,如聚醯亞胺(Polyimide,PI)、聚乙烯對苯二甲酸乙二醇酯(Polyethylene Terephtalate,PET)、聚四氟乙烯(Teflon)、聚硫胺(Polyamide)、聚甲基丙烯酸甲酯(Polymethylmethacrylate)、聚碳酸酯(Polycarbonate)或聚醯亞胺-聚乙烯-對苯二甲酯共聚物(Polyamide polyethylene-terephthalate copolymer)等。 The insulating layer 11 may be a hard resin layer such as an epoxy resin, a fiberglass cloth, or the like, or a flexible resin layer such as Polyimide (PI) or polyethylene terephthalate (Polyethylene Terephtalate). , PET), Teflon, Polyamide, Polymethylmethacrylate, Polycarbonate or Polyimide-Polyethylene-terephthalate copolymerization (Polyamide polyethylene-terephthalate copolymer).
該導電層12形成於絕緣層11之一側,且與絕緣層11相接觸。該導電層12形成有導電圖形120,該導電圖形120包括至少一導電線路121以及複數焊盤122。該複數焊盤122包括至少一接觸盤1221與至少一組裝盤1222。接觸盤1221係指用於進行接觸或者進行插接之焊盤,例如為手機用電路板中用於與手機案件接觸之觸點,或者為電路板中用於與其他元件進行插接之邊接頭。組裝盤1222係指用於組裝電子元件之焊盤,亦即用於與電子元件之引腳或觸點電接觸之焊盤。本實施例中,導電線路121、接觸盤1221與組裝盤1222之數量均為複數,且每條導電線路121均連接於一接觸盤1221與一組裝盤1222之間。導電層12之材料一般為銅,銅之電極電位為0.337V。 The conductive layer 12 is formed on one side of the insulating layer 11 and is in contact with the insulating layer 11. The conductive layer 12 is formed with a conductive pattern 120 including at least one conductive line 121 and a plurality of pads 122. The plurality of pads 122 includes at least one contact pad 1221 and at least one assembly pad 1222. The contact pad 1221 refers to a pad for making contact or plugging, for example, a contact for contacting a mobile phone case in a circuit board for a mobile phone, or a connector for interfacing with other components in a circuit board. . Assembly disk 1222 refers to a pad for assembling electronic components, that is, a pad for electrical contact with a pin or contact of an electronic component. In this embodiment, the number of the conductive lines 121, the contact pads 1221 and the assembly pads 1222 are plural, and each of the conductive lines 121 is connected between a contact pad 1221 and an assembly disk 1222. The material of the conductive layer 12 is generally copper, and the electrode potential of the copper is 0.337V.
該覆蓋層13通常可藉由印刷技術形成於不具有導電圖形120之絕緣層11表面以及複數條導電線路121之表面,用於保護複數條導電線路121以避免導電線路121氧化。覆蓋層13之材料通常包括環 氧樹脂IR烘烤型、UV硬化型、液態感光型(LPISM-Liquid Photo Imagable Solder Mask)型油墨以及乾膜防焊型(Dry Film,Solder Mask)等。 The cover layer 13 is generally formed on the surface of the insulating layer 11 having no conductive pattern 120 and the surface of the plurality of conductive lines 121 by a printing technique for protecting the plurality of conductive lines 121 from oxidation of the conductive lines 121. The material of the cover layer 13 usually includes a ring Oxygen resin IR baking type, UV curing type, liquid photosensitive type (LPISM-Liquid Photo Imagable Solder Mask) type ink, and dry film solder mask type (Dry Film, Solder Mask).
該鍍覆層14可為化學銀層、化學金層、電鍍金層等,用於形成於該至少一接觸盤1221表面以保護該至少一接觸盤1221。本實施例中,該鍍覆層14為化學金層,不但可保護複數接觸盤1221,避免接觸盤1221氧化,還可增強接觸盤1221之導電性。金之電極電位為1.68V,高於銅之電極電位。 The plating layer 14 may be a chemical silver layer, a chemical gold layer, an electroplated gold layer or the like for forming on the surface of the at least one contact pad 1221 to protect the at least one contact pad 1221. In this embodiment, the plating layer 14 is a chemical gold layer, which not only protects the plurality of contact pads 1221, but also avoids oxidation of the contact pads 1221 and enhances the conductivity of the contact pads 1221. The electrode potential of gold is 1.68V, which is higher than the electrode potential of copper.
為提高化學金層於接觸盤1221上之附著性,增強化學金層與接觸盤1221之結合力,於接觸盤1221上形成化學金層之前,通常先於接觸盤1221上形成一層過渡層15。亦即,過渡層15形成於接觸盤1221與鍍覆層14之間,並與接觸盤1221與鍍覆層14相接觸。過渡層15通常可為化學鎳層、化學鎳鈀層、電鍍鎳層等導電材料層,以於增強鍍覆層14與接觸盤1221之結合力之同時,還使得鍍覆層14與接觸盤1221保持電接觸。本實施例中,過渡層15為化學鎳層。 In order to improve the adhesion of the chemical gold layer on the contact pad 1221, the bonding force between the chemical gold layer and the contact pad 1221 is enhanced. Before the chemical gold layer is formed on the contact pad 1221, a transition layer 15 is usually formed on the contact pad 1221. That is, the transition layer 15 is formed between the contact pad 1221 and the plating layer 14 and is in contact with the contact pad 1221 and the plating layer 14. The transition layer 15 can be a conductive material layer such as a chemical nickel layer, an electroless nickel palladium layer, or an electroplated nickel layer, so as to enhance the bonding force between the plating layer 14 and the contact pad 1221, and also make the plating layer 14 and the contact pad 1221. Keep electrical contact. In this embodiment, the transition layer 15 is an electroless nickel layer.
當然,本領域技術人員可理解,電路板10還可為經過內層板線路製作、內層板與外層板壓合、鑽孔、孔金屬化、外層板線路製作、製作覆蓋層、化學鍍鎳以及化學鍍金等處理步驟之多層板,其包括複數層相互間隔之絕緣層與導電層,並具有複數導通孔以導通複數層導電層。該多層板之外層板可具有與電路板10相近似之結構。 Of course, those skilled in the art can understand that the circuit board 10 can also be fabricated through the inner layer circuit, the inner layer and the outer layer are pressed, drilled, hole metallized, outer layer circuit fabricated, coated, and electroless nickel plated. And a multi-layer board for processing steps such as electroless gold plating, comprising a plurality of insulating layers and a conductive layer spaced apart from each other, and having a plurality of via holes to conduct a plurality of conductive layers. The outer layer of the multilayer board may have a structure similar to that of the circuit board 10.
第二步,請參閱圖3,於該鍍覆層14上形成保護層20,該保護層20可為油墨、光致抗蝕劑或者其他便於去除之絕緣材料。具體地,於化學金層表面形成保護層20之工藝可為印刷、塗覆、貼覆或其他方法。 In the second step, referring to FIG. 3, a protective layer 20 is formed on the plating layer 14, and the protective layer 20 may be an ink, a photoresist or other insulating material that is easy to remove. Specifically, the process of forming the protective layer 20 on the surface of the chemical gold layer may be printing, coating, laminating or other methods.
第三步,將該電路板10以為電解質之濕處理液進行濕處理,該保護層20與至少部分導電層12暴露於該濕處理液中。 In the third step, the circuit board 10 is wet-processed with a wet processing liquid for the electrolyte, and the protective layer 20 and at least a portion of the conductive layer 12 are exposed to the wet processing liquid.
該濕處理可為電路板製作流程中之一個主要流程,例如線路蝕刻,亦可畏電路板製作流程中之一個主要流程中之輔助流程,如有機塗覆工藝中之微蝕處理。 This wet processing can be a major process in the board fabrication process, such as line etching, or an auxiliary process in one of the main processes in the board fabrication process, such as microetching in organic coating processes.
於本實施例中,該濕處理係指有機塗覆工藝中之微蝕處理,該濕處理液係指微蝕液。將該電路板10以濕處理液進行濕處理係指將該電路板10放置於微蝕槽中以微蝕液進行微蝕處理,以便於後續於有機塗覆工藝中有機保焊層之形成。由於該覆蓋層13形成於導電線路121表面以及絕緣層11表面,該保護層20形成於複數接觸盤1221表面,因此,整個導電層12中僅有複數組裝盤1222暴露於該微蝕液中。當然,於進行微蝕處理時,除了導電層12之複數組裝盤1222外,該覆蓋層13、保護層20亦暴露於微蝕液中。該微蝕液主要由過硫酸鈉與硫酸組成,對於銅具有一定之腐蝕性,從而可粗化複數組裝盤1222之表面。 In the present embodiment, the wet treatment refers to a microetching treatment in an organic coating process, and the wet treatment liquid refers to a microetching liquid. Wet processing the circuit board 10 with a wet processing liquid means placing the circuit board 10 in the micro-etching bath to perform micro-etching treatment with the micro-etching liquid to facilitate subsequent formation of the organic solder-preserving layer in the organic coating process. Since the cover layer 13 is formed on the surface of the conductive line 121 and the surface of the insulating layer 11, the protective layer 20 is formed on the surface of the plurality of contact pads 1221, and therefore, only the plurality of assembled pads 1222 in the entire conductive layer 12 are exposed to the micro-etching liquid. Of course, in the micro-etching process, the cover layer 13 and the protective layer 20 are exposed to the micro-etching liquid in addition to the plurality of the assembled layers 1222 of the conductive layer 12. The micro-etching liquid is mainly composed of sodium persulfate and sulfuric acid, and has certain corrosiveness to copper, so that the surface of the plurality of assembled disks 1222 can be roughened.
本技術方案中,由於該電路板10於進行微蝕處理之前,採用保護層20遮蔽鍍覆層14即化學金層,從而使得化學金層不暴露於微蝕液中,避免間了微蝕液中化學金層與組裝盤1222之間電偶腐蝕之 產生,使得組裝盤1222於微蝕過程中被輕微均勻地咬蝕,而不會被過度咬蝕,從而保證了電路板10之製作良率與性能。 In the technical solution, since the circuit board 10 masks the plating layer 14 or the chemical gold layer before the micro-etching treatment, the chemical gold layer is not exposed to the micro-etching liquid, thereby avoiding the micro-etching liquid. Galvanic corrosion between the middle chemical gold layer and the assembly plate 1222 The resulting assembly plate 1222 is slightly and evenly punctured during the micro-etching process without being excessively eroded, thereby ensuring the yield and performance of the circuit board 10.
請參閱圖4,於本實施例中,對電路板10進行微蝕處理後,還對電路板10進行有機塗覆工藝處理(Organic Solderability Preservatives,OSP),從而,於複數組裝盤1222表面形成一層有機保焊層30。該有機保焊層30用於保護組裝盤1222,以避免組裝盤1222氧化,並於組裝盤1222與電子元件焊接組裝時退開以不影響組裝盤1222與電子元件之電接觸。 Referring to FIG. 4, in the embodiment, after the micro-etching process is performed on the circuit board 10, the circuit board 10 is also subjected to an Organic Solderability Preservatives (OSP), thereby forming a layer on the surface of the plurality of assembled disks 1222. Organic solder layer 30. The organic solder mask 30 is used to protect the assembly disk 1222 from oxidation of the assembly disk 1222 and is retracted when the assembly disk 1222 is soldered to the electronic component so as not to affect the electrical contact of the assembly disk 1222 with the electronic components.
當然,本領域技術人員可理解,該濕處理還可為其他任何需要用電解液進行處理之工藝,將該電路板10進行濕處理後,還可對電路板10進行其他任何需要採用電解液進行處理之工藝之後之表面處理工藝。 Of course, those skilled in the art can understand that the wet processing can also be any other process that requires treatment with an electrolyte. After the circuit board 10 is wet-processed, the circuit board 10 can be subjected to any other electrolyte solution. Surface treatment process after the process of treatment.
第四步,請參閱圖5,藉由適當之溶劑或者蝕刻劑去除該保護層20,從而獲得濕處理以及表面處理後之電路板10。例如,當該保護層20為固態光致抗蝕劑時,可採用剝除或採用顯影液溶解等方式去除保護層20。 In the fourth step, referring to FIG. 5, the protective layer 20 is removed by a suitable solvent or etchant to obtain a wet-processed and surface-treated circuit board 10. For example, when the protective layer 20 is a solid photoresist, the protective layer 20 may be removed by stripping or dissolution with a developing solution or the like.
本技術方案之電路板製作方法具有如下優點:由於該電路板10於進行濕處理之前,採用保護層20遮蔽鍍覆層14,從而鍍覆層14不暴露於濕處理液中,避免了濕處理液中鍍覆層14與暴露之部分導電層12之間電偶腐蝕之產生,使得暴露之部分導電層12於濕處理過程中不會被過度處理,從而保證電路板10之製作良率與性能。 The circuit board manufacturing method of the present technical solution has the following advantages: since the circuit board 10 shields the plating layer 14 with the protective layer 20 before performing the wet processing, the plating layer 14 is not exposed to the wet processing liquid, thereby avoiding the wet processing. The galvanic corrosion between the liquid plating layer 14 and the exposed portion of the conductive layer 12 is such that the exposed portion of the conductive layer 12 is not overtreated during the wet processing process, thereby ensuring the yield and performance of the circuit board 10. .
本技術方案之電路板生產設計系統及方法不限於前述結構,本領 域普通技術人員可根據本技術方案之技術構思對實施例提供之鍍膜裝置作其他各種相應之改變與變形。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。 The circuit board production design system and method of the present technical solution are not limited to the foregoing structure, and the skill A person skilled in the art can make various other corresponding changes and modifications to the coating device provided by the embodiment according to the technical idea of the technical solution. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.
1222‧‧‧組裝盤 1222‧‧‧ Assembly disk
14‧‧‧鍍覆層 14‧‧‧ plating
20‧‧‧保護層 20‧‧‧Protective layer
30‧‧‧有機保焊層 30‧‧‧Organic soldering layer
Claims (9)
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| TW200625515A (en) * | 2005-01-14 | 2006-07-16 | Advanced Semiconductor Eng | Method of forming oxidation resistant coating on conductive structure |
| JP2008147381A (en) * | 2006-12-08 | 2008-06-26 | Nitto Denko Corp | Method for manufacturing printed circuit board |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| TW200625515A (en) * | 2005-01-14 | 2006-07-16 | Advanced Semiconductor Eng | Method of forming oxidation resistant coating on conductive structure |
| JP2008147381A (en) * | 2006-12-08 | 2008-06-26 | Nitto Denko Corp | Method for manufacturing printed circuit board |
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