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TWI698952B - Electronic device mounting device and mounting method, and package component manufacturing method - Google Patents

Electronic device mounting device and mounting method, and package component manufacturing method Download PDF

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TWI698952B
TWI698952B TW108130627A TW108130627A TWI698952B TW I698952 B TWI698952 B TW I698952B TW 108130627 A TW108130627 A TW 108130627A TW 108130627 A TW108130627 A TW 108130627A TW I698952 B TWI698952 B TW I698952B
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mounting
stage
support substrate
semiconductor wafer
wafer
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TW201943008A (en
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橋本正規
布施憲亨
山田泰弘
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日商芝浦機械電子裝置股份有限公司
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Abstract

[課題] 提供一種實裝裝置,在未於每個實裝區域形成位置檢出用的標記等的支持基板,以高精度且高效率地實裝電子部件。 [解決手段] 實施形態的實裝裝置(1),具備:使載置具有複數實裝區域的支持基板(W)的載台(21)移動的載台部(20)、使具有複數實裝工具(43a、43b)的第1及第2實裝頭(43)移動的實裝部(40)、辨識支持基板(W)的全體位置的第1辨識部、辨識保持於實裝工具(43a、43b)的電子部件的位置的第2辨識部;其中,載台(21)與第1及第2實裝頭(43)的移動,係基於支持基板(W)及電子部件的位置資料、載台及工具的補正資料,以將實裝區域的列配置於設定在X方向的實裝線上,並在複數實裝區域將電子部件以第1及第2實裝頭(43)分擔實裝的方式控制。[Problem] To provide a mounting device that does not form a support substrate such as a mark for position detection in each mounting area, and mounts electronic components with high precision and efficiency. [Solution] The mounting device (1) of the embodiment includes: a stage part (20) that moves a stage (21) on which a support substrate (W) having a plurality of mounting areas is placed, and has a plurality of mounting areas The mounting part (40) where the first and second mounting heads (43) of the tool (43a, 43b) move, the first recognition part that recognizes the entire position of the support substrate (W), and the recognition held in the mounting tool (43a) , 43b) The second recognition unit of the position of the electronic component; wherein the movement of the stage (21) and the first and second mounting heads (43) is based on the position data of the support substrate (W) and the electronic components, The correction data of the stage and tools are arranged to arrange the mounting area on the mounting line set in the X direction, and the electronic parts are mounted in the first and second mounting heads (43) in the plural mounting areas. Way to control.

Description

電子部件的實裝裝置與實裝方法,及封裝部件的製造方法Electronic component mounting device and mounting method, and packaging component manufacturing method

本發明的實施形態係有關於電子部件的實裝裝置與實裝方法、及封裝部件的製造方法。The embodiment of the present invention relates to a mounting device and a mounting method of an electronic component, and a manufacturing method of a package component.

從前,已知有如同CSP(Chip Size Package)及BGA(Ball Grid Array)等,利用中介基板(中繼用基板)進行的半導體封裝的製程。此外,也已知有不利用中介基板,不分割成每個半導體晶片而維持晶圓狀態進行封裝化的稱為晶圓級封裝(Wafer Level Package:LWP)的製程。WLP具有不使用中介基板,能夠降低半導體封裝體的薄型化及製造成本的這種優點。In the past, semiconductor packaging processes using interposer substrates (relay substrates) such as CSP (Chip Size Package) and BGA (Ball Grid Array) have been known. In addition, there is also known a process called Wafer Level Package (LWP) that does not use an intermediate substrate and does not divide into individual semiconductor wafers while maintaining the wafer state for packaging. WLP has the advantage that it can reduce the thickness and manufacturing cost of the semiconductor package without using an intermediate substrate.

在WLP中,為了不使半導體晶片的形成電極墊片的面上的區域突出,已知有在半導體晶片上形成包含半導體封裝的I/O端子的再配線層的,扇入・晶圓級封裝(fan in-WLP:FI-WLP)。又,在近年,也提案有使半導體晶片的區域突出,形成包含半導體封裝的I/O端子的再配線層的扇出・晶圓級封裝(fan out-WLP:FO-WLP)。FO-WLP因為也能夠適用於在1個封裝內搭載RAM、快閃記憶體、CPU等半導體晶片或二極體、電容等複數種類的電子部件的多重晶片封裝(Multi Chip Package:MCP)而受到注目。In WLP, in order not to protrude the area on the surface of the semiconductor wafer where the electrode pads are formed, it is known to form a rewiring layer including the I/O terminals of the semiconductor package on the semiconductor wafer, fan-in and wafer-level packaging. (fan in-WLP: FI-WLP). In addition, in recent years, fan out/wafer level packaging (fan out-WLP: FO-WLP) has been proposed in which the area of the semiconductor chip is protruded to form a rewiring layer including the I/O terminals of the semiconductor package. FO-WLP can also be applied to multiple chip packages (MCP) in which semiconductor chips such as RAM, flash memory, and CPU, or multiple types of electronic components such as diodes and capacitors are mounted in a single package. Attention.

在這裡,MCP為如同上述,在1個封裝內搭載複數種類的電子部件者。在這種MCP中,因為搭載於相同封裝的電子部件各自的實裝位置的偏差,會對該封裝的電特性相互造成影響,故在各電子部件的實裝要求高位置精度。在利用前述中介基板進行的半導體封裝的製程中,因為在中介基板上的各實裝區域設置位置辨識用的對準標記,藉由適用在每個實裝區域辨識對準標記並將電子部件在實裝區域定位而實裝的方式(以下,稱為區域辨識方式),實現高位置精度的實裝。Here, the MCP refers to the one that mounts multiple types of electronic components in one package as described above. In this type of MCP, because the deviation of the respective mounting positions of the electronic components mounted in the same package affects the electrical characteristics of the package, high position accuracy is required for the mounting of the respective electronic components. In the semiconductor packaging process using the aforementioned interposer substrate, because each mounting area on the interposer substrate is provided with alignment marks for position identification, the alignment marks are applied to each mounting area and the electronic components are The method of positioning and mounting of the mounting area (hereinafter referred to as the area recognition method) realizes mounting with high position accuracy.

在FO-WLP的製程中,首先在支持基板上將複數半導體晶片以間隔的狀態實裝成行列狀,之後藉由將半導體晶片間的間隙以樹脂密封並將複數半導體晶片一體化,形成如同由半導體製程形成的晶圓的方式成形的擬似晶圓。在該擬似晶圓上,形成用以設置I/O端子的再配線層。將複數半導體晶片進行樹脂密封並一體化後,將支持基板剝離除去。但是,欲以FO-WLP製造MCP時,因為在支持基板上,於實裝半導體晶片的每個實裝區域不存在能夠用於位置辨識的那種能影像辨識的圖案,適用對中介基板進行的那種區域辨識方式並不實用。In the FO-WLP process, a plurality of semiconductor wafers are first mounted in rows and columns at intervals on a support substrate, and then the gaps between the semiconductor wafers are sealed with resin and the plural semiconductor wafers are integrated to form A pseudo-wafer shaped like a wafer formed by a semiconductor process. On the pseudo wafer, a rewiring layer for providing I/O terminals is formed. After the plural semiconductor wafers are resin-sealed and integrated, the supporting substrate is peeled and removed. However, when you want to manufacture MCP with FO-WLP, because there is no image-recognizable pattern that can be used for position recognition in each mounting area of the semiconductor chip on the support substrate, it is suitable for the intermediate substrate. That kind of area identification method is not practical.

不進行區域辨識時,適用藉由辨識表示支持基板的外形位置或基板全體的位置的對準標記來辨識支持基板的全體位置,依賴該支持基板的全體位置而在支持基板上的各實裝區域實裝半導體晶片的方式(以下,稱為全域辨識方式)。又,在MCP的半導體晶片的實裝位置的偏差,例如考慮到具有標準電極墊片的徑(20μm)與形成間距(35μm)的半導體晶片時,在半導體晶片的端子與由再配線層形成的端子間的接觸面積的確保及迴避鄰接的端子間的接觸的前提下,希望能抑制成±7μm以下。When region recognition is not performed, it is applicable to recognize the overall position of the support substrate by recognizing the alignment mark indicating the outline position of the support substrate or the position of the entire substrate, and each mounting area on the support substrate depends on the overall position of the support substrate A method of mounting a semiconductor chip (hereinafter referred to as the global identification method). In addition, the deviation of the mounting position of the semiconductor wafer of the MCP, for example, when considering a semiconductor wafer with a standard electrode pad diameter (20 μm) and a formation pitch (35 μm), the terminals of the semiconductor wafer and the rewiring layer formed Under the premise of ensuring the contact area between the terminals and avoiding the contact between adjacent terminals, it is desirable to suppress it to ±7 μm or less.

不過,將在中介基板等的每個實裝區域於具有對準標記的基板實裝半導體晶片所需的實裝裝置,施予全域辨識方式的設定,在FO-WLP的製程中使用時,實裝精度會產生超過±7μm的實裝誤差,未在每個實裝區域設置對準標記的支持基板無法高精度地實裝半導體晶片。因此,在適用全域辨識方式的FO-WLP的製程中,能以±7μm以下的位置精度實裝半導體晶片的實裝裝置並不存在。However, the mounting device required to mount a semiconductor chip on a substrate with alignment marks in each mounting area of the intermediate substrate, etc., is set to the global recognition method. When used in the FO-WLP process, the actual The mounting accuracy will have a mounting error of more than ±7μm, and a support substrate that does not have an alignment mark on each mounting area cannot mount a semiconductor wafer with high precision. Therefore, in the FO-WLP process using the global recognition method, there is no mounting device that can mount semiconductor wafers with a position accuracy of ±7 μm or less.

若僅使實裝精度提升的話,考慮到在用於FO-WLP的製程的支持基板,預先設置對準標記使其對應各實裝區域,並適用區域辨識方式。不過,FO-WLP的支持基板為在形成擬似晶圓後從擬似晶圓剝離除去者,無法作為製品使用。為了這種支持基板設置形成標記的設備及工程,不只會帶來設備費用、設備的設置空間、工程數等的增加,在實裝工程中也需要在每次實裝半導體晶片時進行辨識區域標記的動作,1個半導體晶片的實裝工程時間也增加。在該點來看,區域辨識方式的適用使半導體封裝的製造成本增加,損及WLP的優點。If only the mounting accuracy is improved, considering that on the support substrate used in the FO-WLP process, alignment marks are preset to correspond to each mounting area, and the area identification method is applied. However, the support substrate of FO-WLP is peeled and removed from the pseudo wafer after the pseudo wafer is formed, and cannot be used as a product. In order to support the substrate installation and marking equipment and process, it will not only increase the equipment cost, equipment installation space, and the number of processes. In the mounting process, it is also necessary to mark the identification area every time a semiconductor wafer is mounted. The time required for the mounting process of one semiconductor chip has also increased. From this point of view, the application of the area identification method increases the manufacturing cost of the semiconductor package, which undermines the advantages of WLP.

又,為了對應半導體晶片的實裝誤差,提案有考慮半導體晶片的實裝誤差而進行再配線層的形成的技術。該技術為在擬似晶圓曝光再配線層的電路圖案時,在曝光前預先個別測定擬似晶圓上的各半導體晶片的實裝誤差(從理想位置的位置偏差),將曝光用的雷射光在每個半導體晶片掃描時,將包含於描繪資料的各電路圖案的位置資訊基於曝光對象的半導體晶片的實裝誤差進行補正者。該技術也可適用於在1個半導體封裝組入1個半導體晶片的單晶片封裝。但是,MCP的情形,因為電路圖案的描繪資料以封裝單位作成,產生相同封裝內的半導體晶片間的相對位置偏差時,僅補正描繪的電路圖案的位置資訊並無法對應。In addition, in order to cope with the mounting error of the semiconductor wafer, a technique of forming a rewiring layer in consideration of the mounting error of the semiconductor wafer has been proposed. In this technology, when the circuit pattern of the rewiring layer is exposed on the pseudo-wafer, the mounting error (the positional deviation from the ideal position) of each semiconductor wafer on the pseudo-wafer is individually measured before exposure, and the laser light for exposure is When scanning each semiconductor wafer, the position information of each circuit pattern included in the drawing data is corrected based on the mounting error of the semiconductor wafer to be exposed. This technology can also be applied to a single-chip package in which one semiconductor chip is assembled in one semiconductor package. However, in the case of MCP, since the circuit pattern drawing data is created by the package unit, when the relative positional deviation between semiconductor chips in the same package occurs, only the correction of the position information of the drawn circuit pattern cannot correspond.

再來,用於FO-WLP的製程的實裝裝置,要求縮短半導體晶片的實裝時間。亦即,疑似晶圓上的再配線層的形成工程,通常對1枚疑似晶圓總括進行,相對於此,對支持基板的半導體晶片的實裝工程,在每1個半導體晶片分別實施。考慮到該等處理時間,因為相較於再配線層的形成工程,半導體晶片的實裝工程需要時間,要求縮短半導體晶片的實裝時間。若僅縮短實裝時間的話,考慮適用具有複數實裝頭的實裝裝置。不過,僅單適用複數實裝頭的話,因為在每個實裝頭產生的移動誤差的影響,會使得半導體晶片的實裝精度更加降低。因此,在用於FO-WLP的製程的實裝裝置,要求使半導體晶片等的電子部件的實裝精度的提升及實裝時間的縮短。Furthermore, the mounting equipment used in the FO-WLP process requires a reduction in the mounting time of semiconductor wafers. That is, the process of forming the rewiring layer on the suspected wafer is generally performed collectively for one suspected wafer, whereas the mounting process of the semiconductor wafer supporting the substrate is performed separately for each semiconductor chip. Considering the processing time, the mounting process of the semiconductor wafer requires time compared to the formation process of the rewiring layer, and it is required to shorten the mounting time of the semiconductor wafer. If only to shorten the mounting time, consider applying a mounting device with multiple mounting heads. However, if only the plural mounting heads are applied, the mounting accuracy of semiconductor wafers will be further reduced due to the influence of the movement error generated in each mounting head. Therefore, in the mounting device used in the FO-WLP process, it is required to improve the mounting accuracy of electronic components such as semiconductor wafers and shorten the mounting time.

此外,FO-WLP的製程,為在稱為「晶圓級」的晶圓基底,也就是在支持基板使用晶圓的製程。相對於此,最近,提案有將用於印刷基板(Printed Circuit Board)的製程的玻璃・環氧(FR-4)基板等有機基板及用於液晶顯示面板的製造的玻璃基板作為支持基板使用的稱為扇出・面板及封裝(FO-PLP)的基板基底的製程。In addition, the FO-WLP process is a process in which wafers are used on a wafer base called "wafer level", which is a support substrate. In contrast to this, recently, it has been proposed to use organic substrates such as glass and epoxy (FR-4) substrates used in the process of printed circuit boards (Printed Circuit Board) and glass substrates used in the manufacture of liquid crystal display panels as supporting substrates. The manufacturing process of the substrate base called fan-out, panel and package (FO-PLP).

在FO-WLP的製程中,如同稱為晶圓級,在支持基板使用矽晶圓。這是因為在再配線層的形成製程,能夠流用矽晶圓的配線層的形成製程所用的設備。同樣地,在印刷基板的製程及液晶顯示面板的製程也一樣使用配線層的形成製程。因此,用於印刷基板的製程及液晶顯示面板的製程的設備,能夠流用於FO-PLP的製程。In the FO-WLP process, as it is called wafer level, silicon wafers are used in the support substrate. This is because in the formation process of the rewiring layer, the equipment used in the formation process of the wiring layer of the silicon wafer can be used. Similarly, the wiring layer formation process is also used in the manufacturing process of the printed circuit board and the manufacturing process of the liquid crystal display panel. Therefore, the equipment used in the manufacturing process of the printed circuit board and the manufacturing process of the liquid crystal display panel can be used in the process of FO-PLP.

在支持基板使用有機基板及玻璃基板時,與使用矽晶圓的情形相比具有能刪減成本的優點。又,具有能使支持基板的大小比矽晶圓還大的優點。因為支持基板越大,一次能生產的MCP等半導體封裝之數就能增大,能夠使生產性提升。因此,預測用於這種FO-PLP的製程適用的電子部件的實裝裝置的要求會產生。When an organic substrate and a glass substrate are used as the support substrate, it has the advantage of being able to cut costs compared with the case of using a silicon wafer. In addition, there is an advantage that the size of the support substrate can be larger than that of the silicon wafer. Because the larger the support substrate, the number of semiconductor packages such as MCP that can be produced at one time can be increased, which can improve productivity. Therefore, it is predicted that the requirements for the mounting device of electronic components applicable to the FO-PLP process will arise.

其中,在印刷基板的製程中,現狀,成為基材的覆銅層積板的尺寸為1020×1020mm或1020×1220mm。將一邊超過1000mm的基板作為支持基板時,因為推測損及處理的便利性,故在FO-PLP的製程中,預測到將覆銅層積板以4分割的程度作為支持基板使用。另一方面,在液晶顯示面板的製程中,難以將使用5代以上(約1000×1200mm以上),特別是現在主要生產所使用的7代以上(約1900×2200mm以上)的玻璃基板(所謂的母玻璃)的製造設備,故推測要流用因液晶顯示面板的大型化而不使用的3代到4代(約550×650mm~680×880mm)的製造設備。因此,在FO-PLP的製程中,對應電子部件的實裝裝置要求的支持基板的大小,與從前的FO-WLP的製程中的支持基板的大小300×300mm相比,預測面積成為約4倍左右的600×600mm左右的大小Among them, in the manufacturing process of the printed circuit board, the size of the copper clad laminate that becomes the base material is currently 1020×1020 mm or 1020×1220 mm. When a substrate with a side exceeding 1000 mm is used as a support substrate, it is estimated that the convenience of handling will be impaired. Therefore, in the FO-PLP process, it is predicted that the copper clad laminate will be used as a support substrate to the extent that it is divided into four. On the other hand, in the manufacturing process of liquid crystal display panels, it is difficult to use the 5th generation or more (about 1000×1200mm or more), especially the 7th generation or more (about 1900×2200mm or more) glass substrates (the so-called Therefore, it is estimated that the production equipment of the third to fourth generation (approximately 550×650 mm to 680×880 mm) that is not used due to the increase in the size of the liquid crystal display panel will be used. Therefore, in the FO-PLP process, the size of the support substrate required by the electronic component mounting device is approximately four times the size of the support substrate in the previous FO-WLP process of 300×300mm. About 600×600mm in size

在具有上述600×600mm的大小的支持基板實裝半導體晶片時,載置支持基板的載台變大,因此使實裝頭的移動距離增大。因此,半導體晶片的搬送所需要的時間變長,預想到半導體晶片的實裝效率會降低。又,MCP的情形,亦即實裝品種不同的複數半導體晶片等的情形,因為根據半導體晶片的大小及用於半導體晶片的實裝的黏接劑的種類等,實裝所需要的時間(加壓時間或加壓・加熱時間)有所不同,在實裝時間長的半導體晶片實裝效率被影響。因此,因為實裝所需要的時間長的半導體晶片而作為封裝全體的實裝效率降低。因此,在用於FO-PLP的製程的實裝裝置中,推測要求在達到半導體晶片等的電子部件的實裝精度的提升的同時,也要求對應支持基板的大型化而更加縮短實裝時間。 [先前技術文獻] [專利文獻]When a semiconductor wafer is mounted on a support substrate having the above-mentioned size of 600×600 mm, the stage on which the support substrate is mounted becomes larger, and therefore the moving distance of the mounting head is increased. Therefore, the time required for the transportation of the semiconductor wafer becomes longer, and it is expected that the mounting efficiency of the semiconductor wafer will decrease. Also, in the case of MCP, that is, the case of mounting a plurality of semiconductor chips of different types, the time required for mounting depends on the size of the semiconductor chip and the type of adhesive used for the mounting of the semiconductor chip. Pressing time or pressing/heating time) are different, and the mounting efficiency of semiconductor wafers with a long mounting time will be affected. Therefore, the mounting efficiency of the entire package is reduced because of the long time required for mounting the semiconductor wafer. Therefore, in the mounting device used in the FO-PLP process, it is estimated that it is required to improve the mounting accuracy of electronic components such as semiconductor wafers, and to further shorten the mounting time corresponding to the increase in the size of the support substrate. [Prior Technical Literature] [Patent Literature]

[專利文獻1] 特開2008-041976號公報 [專利文獻2] 特開2009-259917號公報 [專利文獻3] 國際公開第2007/072714號 [專利文獻4] 特開2013-058520號公報[Patent Document 1] JP 2008-041976 A [Patent Document 2] JP 2009-259917 A [Patent Document 3] International Publication No. 2007/072714 [Patent Document 4] JP 2013-058520 A

[發明所欲解決的問題][The problem to be solved by the invention]

本發明所欲解決的問題為,提供一種電子部件的實裝裝置及實裝方法、及適用該種實裝方法的封裝部件的製造方法,對於未在每個實裝區域形成位置檢出用的標記等的圖案的支持基板,特別是預想成大型化的支持基板,也能在各實裝區域將半導體晶片等電子部件以高精度、且高效率地實裝。 [解決問題的手段]The problem to be solved by the present invention is to provide an electronic component mounting device and mounting method, and a manufacturing method of a package component to which the mounting method is applied. It is used for detection of positions not formed in each mounting area. A support substrate with a pattern such as a mark, particularly a support substrate that is expected to be enlarged, can also mount electronic components such as semiconductor wafers in each mounting area with high precision and efficiency. [Means to solve the problem]

實施形態的電子部件的實裝裝置,為一種在支持基板實裝電子部件的電子部件的實裝裝置,具備:載台部,其具備:載置具有實裝前述電子部件的複數實裝區域的前述支持基板的載台、及在與沿著水平方向的一方向的X方向垂直的Y方向使前述載台移動的載台移動機構;實裝部,其具備:沿著前述X方向配置且分別具有保持前述電子部件的複數實裝工具的第1及第2實裝頭、及藉由前述複數實裝工具使保持前述電子部件的前述第1及第2實裝頭在沿著前述X方向設定的實裝線上移動的實裝頭移動機構;第1辨識部,其辨識載置於前述載台上的前述支持基板的全體位置;第2辨識部,其辨識保持於前述第1及第2實裝頭的前述複數實裝工具的前述電子部件的位置;記憶部,其記憶有:補正前述載台移動機構造成的前述載台的移動位置誤差的載台補正資料、及補正前述實裝頭移動機構造成的前述實裝線上的前述第1及第2實裝頭的在每個前述複數實裝工具的移動位置誤差的工具補正資料;控制部,其基於由前述第1辨識部辨識到的前述支持基板的位置資料、記憶於前述記憶部的前述載台補正資料、由前述第2辨識部辨識到的保持於前述複數實裝工具的前述電子部件的位置資料、及記憶於前述記憶部的前述工具補正資料,以將前述支持基板中的沿著前述X方向的前述實裝區域之列在前述實裝線上依序配置,同時將配置於前述實裝線的複數前述實裝區域的前述電子部件以前述第1及第2實裝頭分擔實裝的方式,控制前述載台移動機構及前述實裝頭移動機構的動作。The electronic component mounting device of the embodiment is an electronic component mounting device that mounts an electronic component on a support substrate, and includes: a stage section including: a mounting area having a plurality of mounting areas for mounting the electronic components The stage supporting the substrate, and a stage moving mechanism that moves the stage in the Y direction perpendicular to the X direction along one direction of the horizontal direction; and a mounting section including: arranged along the X direction and each The first and second mounting heads having plural mounting tools for holding the electronic components, and the first and second mounting heads for holding the electronic components are set along the X direction by the plural mounting tools The mounting head moving mechanism that moves on the mounting line; the first recognition part, which recognizes the entire position of the support substrate placed on the stage; the second recognition part, which recognizes the positions of the first and second parts The position of the electronic component of the plurality of mounting tools of the mounting head; the memory unit, which stores: stage correction data for correcting the movement position error of the stage caused by the stage moving mechanism, and correction of the mounting head movement The tool correction data for the movement position errors of the first and second mounting heads on each of the plurality of mounting tools on the mounting line caused by the mechanism; the control unit is based on the aforementioned recognition by the first recognition unit The position data of the support substrate, the stage correction data memorized in the memory section, the position data of the electronic components held in the plurality of mounting tools recognized by the second recognition section, and the memory memorized in the memory section Tool correction data to sequentially arrange the mounting areas of the supporting board along the X direction on the mounting line, and at the same time arrange the electronic components in the plural mounting areas of the mounting line The operations of the stage moving mechanism and the mounting head moving mechanism are controlled in a manner that the first and second mounting heads share the mounting.

實施形態的電子部件的實裝方法,為一種在支持基板實裝電子部件的電子部件的實裝方法,具備:取得載置具有實裝前述電子部件的複數實裝區域的支持基板的載台的移動位置誤差,將補正前述移動位置誤差的載台補正資料記憶至記憶部的工程;將分別設於沿水平方向的一方向的X方向配置的第1及第2實裝頭,且保持前述電子部件的複數實裝工具的移動位置誤差,在沿著前述X方向設定的實裝線上取得,將補正前述移動位置誤差的工具補正資料記憶至前述記憶部的工程;在前述載台上載置前述支持基板,同時辨識載置於前述載台上的前述支持基板的全體位置的工程;基於由前述支持基板的位置辨識工程得到的前述支持基板的位置資料及前述載台補正資料來補正前述載台的移動,同時以使前述複數實裝區域中沿著前述X方向的前述實裝區域的列依順位於前述實裝線的方式,使前述載台移動的工程;以前述第1及第2實裝頭的前述複數實裝工具交互收授前述電子部件,辨識保持於前述複數實裝工具的前述電子部件的位置,同時基於辨識到的前述電子部件的位置資料及前述工具補正資料來補正前述第1及第2實裝頭的前述複數實裝工具的移動,並使前述第1及第2實裝頭在前述實裝線上移動,藉由前述第1及第2實裝頭的前述複數實裝工具使前述電子部件,在位於前述實裝線的前述實裝區域以前述第1及第2實裝頭分擔實裝的工程。The electronic component mounting method of the embodiment is an electronic component mounting method for mounting an electronic component on a support substrate, and includes: obtaining a stage for mounting a support substrate having a plurality of mounting areas for mounting the electronic component. The movement position error, the process of memorizing the stage correction data for the aforementioned movement position error to the memory unit; the first and second mounting heads arranged in the X direction along the horizontal direction, and the aforementioned electronics The movement position error of the plural mounting tools of the component is obtained on the mounting line set along the aforementioned X direction, and the tool correction data for correcting the movement position error is memorized in the aforementioned memory section; the aforementioned support is placed on the aforementioned stage Substrate, the process of recognizing the entire position of the support substrate placed on the stage; the process of correcting the stage based on the position data of the support substrate and the stage correction data obtained from the position identification process of the support substrate The process of moving the stage so that the rows of the mounting areas along the X-direction in the plural mounting areas are located on the mounting line according to the order; the first and second mounting The plurality of mounting tools of the head interactively accept the electronic components, identify the position of the electronic components held in the plurality of mounting tools, and at the same time correct the first step based on the position data of the recognized electronic components and the tool correction data. And the movement of the plural mounting tools of the second mounting head, and moving the first and second mounting heads on the mounting line, by the plural mounting tools of the first and second mounting heads The first and second mounting heads share the mounting process of the electronic component in the mounting area located on the mounting line.

實施形態的封裝部件的製造方法,具備:在支持基板的複數實裝區域分別實裝電子部件的工程、藉由將實裝於前述複數實裝區域的前述電子部件總括地密封形成疑似晶圓或擬似面板的工程、及藉由在前述疑似晶圓或擬似面板的前述電子部件上形成再配線層來製造封裝部件的工程。在實施形態的封裝部件的製造方法中,前述電子部件的實裝工程,具備:取得載置前述支持基板的載台的移動位置誤差,將補正前述移動位置誤差的載台補正資料記憶至記憶部的工程;將分別設於沿水平方向的一方向的X方向配置的第1及第2實裝頭,且保持前述電子部件的複數實裝工具的移動位置誤差,在沿著前述X方向設定的實裝線上取得,將補正前述移動位置誤差的工具補正資料記憶至前述記憶部的工程;在前述載台上載置前述支持基板,同時辨識載置於前述載台上的前述支持基板的全體位置的工程;基於由前述支持基板的位置辨識工程得到的前述支持基板的位置資料及前述載台補正資料來補正前述載台的移動,同時以使前述複數實裝區域中沿著前述X方向的前述實裝區域的列依順位於前述實裝線的方式,使前述載台移動的工程;以前述第1及第2實裝頭的前述複數實裝工具交互收授前述電子部件,辨識保持於前述複數實裝工具的前述電子部件的位置,同時基於辨識到的前述電子部件的位置資料及前述工具補正資料來補正前述第1及第2實裝頭的前述複數實裝工具的移動,並使前述第1及第2實裝頭在前述實裝線上移動,藉由前述第1及第2實裝頭的前述複數實裝工具使前述電子部件,在位於前述實裝線的前述實裝區域以前述第1及第2實裝頭分擔實裝的工程。The method of manufacturing a packaged component of the embodiment includes a process of separately mounting electronic components in a plurality of mounting areas of a support substrate, and forming a suspected wafer or a pseudo wafer by collectively sealing the electronic components mounted in the plurality of mounting areas The process of pseudo-panel, and the process of manufacturing packaged components by forming a rewiring layer on the aforementioned electronic component of the pseudo-wafer or pseudo-panel. In the manufacturing method of the package component of the embodiment, the mounting process of the electronic component includes: acquiring a movement position error of a stage on which the support substrate is placed, and storing stage correction data for correcting the movement position error in a memory unit The project; The first and second mounting heads are arranged in the X direction along one direction of the horizontal direction, and the movement position error of the plural mounting tools of the aforementioned electronic components is maintained, and the movement position error is set along the aforementioned X direction Obtained on the mounting line, and memorize the tool correction data for correcting the movement position error in the memory section; placing the support substrate on the stage and at the same time recognizing the entire position of the support substrate placed on the stage Process; Based on the position data of the support substrate and the correction data of the stage obtained from the position identification process of the support substrate, the movement of the stage is corrected, and at the same time, the movement of the stage along the X direction in the plural mounting area is corrected. The arrangement of the mounting area follows the process of moving the carrier in the way that it is located on the mounting line; using the plural mounting tools of the first and second mounting heads to interactively accept the electronic components, and the identification remains at the plural The position of the electronic component of the mounting tool is also corrected based on the recognized position data of the electronic component and the tool correction data to correct the movement of the plural mounting tools of the first and second mounting heads, and make the first The first and second mounting heads move on the aforementioned mounting line, and the aforementioned electronic components are moved by the aforementioned plural mounting tools of the aforementioned first and second mounting heads in the aforementioned mounting area on the aforementioned mounting line. The first and second mounting heads share the mounting process.

以下,參照圖式說明有關實施形態的電子部件的實裝裝置及實裝方法。圖式為示意圖,厚度與平面尺寸間的關係、各部的厚度的比例等有與現實不同的情形。說明中的表示上下方向的用語,若沒有特別明記時表示將後述的支持基板的電子部件的實裝面作為上時的相對方向,表示左右的方向的用語,若沒有特別明記時表示將圖2的正視圖作為基準的方向。Hereinafter, the electronic component mounting apparatus and mounting method according to the embodiment will be described with reference to the drawings. The drawing is a schematic diagram, and the relationship between the thickness and the plane size, the ratio of the thickness of each part, etc. may be different from reality. In the description, the terms indicating the up-and-down direction, unless otherwise specified, indicate the relative direction when the mounting surface of the electronic component of the support substrate described later is used as the upper relative direction, and the terms indicating the left-right direction. The front view is used as the reference direction.

[實裝裝置的構成] 圖1為表示實施形態的電子部件的實裝裝置的構成的平面圖,圖2為圖1所示的實裝裝置的正視圖,圖3為圖1所示的實裝裝置的右側面圖,圖4為表示圖1所示的實裝裝置的構成的區塊圖。圖1至圖3中,以圖1為基準,將實裝裝置1中的左右方向設為X方向、前後方向設為Y方向、上下方向設為Z方向。該等圖所示的實裝裝置1具備:供應半導體晶片t等電子部件的部件供應部10、載置支持基板W的載台21的載台部20、從部件供應部10取出半導體晶片t的移載部30、接收移載部30取出的半導體晶片t並實裝至載置於載台21的支持基板W的實裝部40、控制各部10、20、30、40的動作的控制部50。[Configuration of Mounted Device] 1 is a plan view showing the configuration of the electronic component mounting device of the embodiment, FIG. 2 is a front view of the mounting device shown in FIG. 1, and FIG. 3 is a right side view of the mounting device shown in FIG. 4 is a block diagram showing the configuration of the mounting device shown in FIG. 1. In FIGS. 1 to 3, based on FIG. 1, the left-right direction in the mounting device 1 is the X direction, the front-rear direction is the Y direction, and the vertical direction is the Z direction. The mounting apparatus 1 shown in these figures includes: a component supply unit 10 for supplying electronic components such as semiconductor wafers t, a stage unit 20 on which a support substrate W is placed on a stage 21, and a semiconductor wafer t from the component supply unit 10 The transfer section 30, the mounting section 40 that receives the semiconductor wafer t taken out by the transfer section 30 and mounts it on the support substrate W placed on the stage 21, and the control section 50 that controls the operations of the sections 10, 20, 30, and 40 .

(部件供應部10) 部件供應部10配置於實裝裝置1的基底部1a上的正前側中央。部件供應部10供應作為實裝於支持基板W的電子部件的半導體晶片t。部件供應部10具備:保持貼附被個片化成每個半導體晶片t的半導體晶圓T的樹脂片S的晶圓環11、將晶圓環11裝卸自如地保持,藉由未圖示的XY移動機構在XY方向上可移動的晶圓環支架12、藉由移載部30將半導體晶片t取出時,將取出的半導體晶片t從晶圓環11的下側頂起的未圖示的頂起機構。頂起機構固定設置於移載部30進行的半導體晶片t的取出位置。作為頂起機構,能夠使用具有公知構成的機構,例如特開2010-056466號公報記載的機構。(Parts Supply Department 10) The component supply unit 10 is arranged in the center of the front side of the base portion 1 a of the mounting device 1. The component supply unit 10 supplies a semiconductor wafer t as an electronic component mounted on the support substrate W. The component supply unit 10 is provided with: a wafer ring 11 for holding and attaching the resin sheet S of the semiconductor wafer T into each semiconductor wafer t, and the wafer ring 11 is detachably held by XY (not shown) The wafer ring holder 12 whose moving mechanism is movable in the XY direction. When the semiconductor wafer t is taken out by the transfer part 30, the taken-out semiconductor wafer t is lifted from the lower side of the wafer ring 11. Up the organization. The jack-up mechanism is fixedly installed at the position where the semiconductor wafer t is taken out by the transfer unit 30. As the jacking-up mechanism, a mechanism having a well-known structure can be used, for example, a mechanism described in JP 2010-056466 A.

部件供應部10又具備未圖示的晶圓環11的交換裝置。交換裝置具備:設於基底部1a的前面的收納部(在上下方向具備複數收容晶圓環11的構部者,也稱為匣。)、導引在晶圓環支架12與收納部之間搬送的晶圓環11的導引部。交換裝置,將未使用的晶圓環11供應至晶圓環支架12上,將半導體晶片t的取出結束後的晶圓環11收納至收納部,將新的晶圓環11供應至晶圓環支架12。此外,在該晶圓環11的供應及收納,使用後述的移載部30具備的晶圓環保持裝置32。The component supply unit 10 further includes a wafer ring 11 exchange device not shown. The exchange device is provided with: a storage section (the one provided with a plurality of structures for accommodating the wafer ring 11 in the vertical direction, also called a cassette) provided on the front surface of the base portion 1a, and is guided between the wafer ring holder 12 and the storage section The guide part of the wafer ring 11 being transported. The exchange device supplies the unused wafer ring 11 to the wafer ring holder 12, stores the wafer ring 11 after the removal of the semiconductor wafer t is completed in the storage part, and supplies the new wafer ring 11 to the wafer ring Bracket 12. In addition, for the supply and storage of the wafer ring 11, a wafer ring holding device 32 provided in the transfer unit 30 described later is used.

實裝於支持基板W的電子部件,不限於1種類的半導體晶片t,是複數種類的半導體晶片、還有半導體晶片與二極體及電容等也可以。實施形態的實裝裝置1,將包含半導體晶片、二極體、電容等複數種類的電子部件實裝於支持基板W上製造MCP時較適用。作為MCP的構成例,有具備複數種類的半導體晶片、具備1種類的半導體晶片與二極體及電容等、還有備複數種類的半導體晶片與二極體及電容等。The electronic components mounted on the support substrate W are not limited to one type of semiconductor wafer t, but may be plural types of semiconductor wafers, semiconductor wafers, diodes, and capacitors. The mounting device 1 of the embodiment is suitable for mounting multiple types of electronic components including semiconductor wafers, diodes, capacitors, etc., on a support substrate W to manufacture MCP. Examples of the configuration of the MCP include plural types of semiconductor wafers, one type of semiconductor wafers, diodes, and capacitors, and plural types of semiconductor chips, diodes, and capacitors.

(載台部20) 載台部20配置於基底部1a上的後方中央。載台部20,具備:載置具有複數實裝區域的支持基板W的載台21、及在XY方向上使載台21移動的作為載台移動裝置的XY移動機構22。XY移動機構22,使得沿著載置於載台21上的支持基板W的X方向的實裝區域的各行,依序位於之後詳述的設定於沿著X方向的一直線上的一定的實裝線的方式,使載台21移動。XY移動機構22,具有能使載置於載台21的最大的支持基板W,在X方向以能比支持基板W的X方向的尺寸的2分之1還大一點(1/2X+α)的範圍移動的移動行程,在Y方向以能比支持基板W的Y方向的尺寸還大一點(Y+α)的範圍移動的移動行程。載台21藉由未圖示的吸引吸附機構,能將載置的支持基板W吸附保持。(Carrier 20) The stage part 20 is arrange|positioned at the back center of the base part 1a. The stage section 20 includes a stage 21 on which a support substrate W having a plurality of mounting regions is placed, and an XY moving mechanism 22 as a stage moving device that moves the stage 21 in the XY direction. The XY moving mechanism 22 makes the rows of the mounting area along the X direction of the support substrate W placed on the stage 21 sequentially positioned on a certain mounting area set on a straight line along the X direction as described in detail later The line method moves the stage 21. The XY moving mechanism 22 has the largest support substrate W that can be placed on the stage 21, and can be a little larger than 1/2 of the size of the support substrate W in the X direction in the X direction (1/2X+α) The movement stroke of the range of movement is a movement stroke that can move in the Y direction in a range that is a little larger (Y+α) than the size of the support substrate W in the Y direction. The stage 21 can suck and hold the supporting substrate W placed on it by a suction suction mechanism not shown.

載置於載台21上的支持基板W,例如為適用於FO-PLP的製造時的,以擬似晶圓為準的擬似面板的形成所用的基板,為玻璃基板、有機基板(玻璃・環氧(FR-4)基板等)、矽基板、不銹鋼這種金屬基板等,但不以此為限。使用FO-WLP的製造時適用的擬似晶圓的形成的基板也可以。擬似面板,與FO-WLP的製造時適用的擬似晶圓一樣,為將個片化的複數半導體晶片等電子部件以平面配置,將配置的電子部件間以樹脂密封成形成1枚板狀的狀態者。因此,擬似面板的形成所用的支持基板W的形狀不限於圓形,也可以是四角形或其以外的多角形、橢圓形等,其形狀並沒有特別限定。作為支持基板W,較佳為適用以上述FO-PLP製程製造MCP時所用的基板,亦即在各實裝區域實裝複數半導體晶片及電容等電子部件的基板。The support substrate W placed on the stage 21 is, for example, a substrate used for the formation of a pseudo panel based on a pseudo wafer, which is suitable for the manufacture of FO-PLP, and is a glass substrate, an organic substrate (glass and epoxy) (FR-4) substrates, etc.), silicon substrates, metal substrates such as stainless steel, etc., but not limited to this. It is also possible to use a pseudo-wafer-formed substrate suitable for the manufacture of FO-WLP. The pseudo-panel is the same as the pseudo-wafer used in the manufacture of FO-WLP. In order to arrange the individual electronic components such as multiple semiconductor chips in a plane, the electronic components are sealed with resin to form a single plate state. By. Therefore, the shape of the support substrate W used for forming the pseudo-panel is not limited to a circular shape, and may be a quadrangular shape or other polygonal shapes, an elliptical shape, etc., and the shape is not particularly limited. As the support substrate W, it is preferable to apply the substrate used when manufacturing the MCP by the above-mentioned FO-PLP process, that is, a substrate on which a plurality of semiconductor chips and electronic components such as capacitors are mounted in each mounting area.

支持基板W具有實裝半導體晶片t等電子部件的複數實裝區域。但是,複數實裝區域為在支持基板W上假想設定的區域,並未形成表示各實裝區域的標記及圖案等。支持基板W也可具備表示基板全體的位置的全域辨識用的對準標記,但並不具備表示各個實裝區域的位置的區域辨識用的對準標記。全域辨識方式,指的是在支持基板W的複數實裝區域分別實裝電子部件時,以1次的基板的位置檢出對基板上的複數實裝區域進行電子部件的實裝的方式。區域辨識方式,指的是在支持基板W上的複數實裝區域分別實裝電子部件時,在每次實裝電子部件時都進行電子部件的實裝區域的位置檢出的方式。又,支持基板W其大小為300×300mm以上較佳。在本實施形態中,600×600mm的支持基板W作為一例使用。也就是說,在本實施形態的實裝裝置1中,載台21具有可載置600×600mm的支持基板W的大小。The support substrate W has a plurality of mounting areas for mounting electronic components such as semiconductor wafer t. However, the plural mounting regions are imaginary regions set on the support substrate W, and marks, patterns, etc., indicating the mounting regions are not formed. The support substrate W may include an alignment mark for global recognition that indicates the position of the entire substrate, but it does not include an alignment mark for area recognition that indicates the position of each mounting area. The global recognition method refers to a method in which electronic components are mounted on the multiple mounting regions on the substrate with a single substrate position detection when the electronic components are mounted on the multiple mounting regions of the support substrate W. The area recognition method refers to a method in which the position of the electronic component mounting area is detected every time the electronic component is mounted when the electronic components are mounted on the plurality of mounting areas on the support substrate W. In addition, the size of the supporting substrate W is preferably 300×300 mm or more. In this embodiment, a 600×600 mm supporting substrate W is used as an example. That is, in the mounting apparatus 1 of this embodiment, the stage 21 has a size that can mount a support substrate W of 600×600 mm.

(移載部30) 移載部30具備:左右一對移載部30A、30B、中間載台31、晶圓環保持裝置32,將2個移載部30A、30B以左右反轉的狀態配置。2個移載部30A、30B以包夾部件供應部10的方式於基底部1a上的前方兩側分開配置,除了左右反轉以外,具有相同構成。在以下,說明左側移載部30A的構成,省略右側移載部30B的構成的說明。(Transfer section 30) The transfer unit 30 includes a pair of left and right transfer units 30A, 30B, an intermediate stage 31, and a wafer ring holding device 32, and the two transfer units 30A, 30B are arranged in a left-right reversed state. The two transfer parts 30A and 30B are arranged separately on the front two sides of the base part 1a so as to sandwich the component supply part 10, and have the same configuration except that they are reversed left and right. In the following, the configuration of the left transfer portion 30A will be described, and the description of the configuration of the right transfer portion 30B will be omitted.

移載部30A具備:在基底部1a的前方左側沿著Y方向從基底部1a的前端部到中央附近延設的Y方向移動裝置33。在該Y方向移動裝置33,Y方向移動區塊34在Y方向以移動自如的方式被支持。Y方向移動區塊34的上端側的背面,設有從Y方向移動區塊34沿著X方向的水平方向即圖示右方向延設的矩形板狀的支持體35。該支持體35的背面側,設有藉由未圖示的X方向移動裝置而以能沿X方向移動的方式支持的,俯視時呈概略曲柄形狀的X方向移動體36。在X方向移動體36的圖示右方向的端部,支持有移載頭37。又,在X方向移動體36的圖示右方向的端部,與支持移載頭37的面相反側的面,設有晶圓辨識攝影機38。The transfer portion 30A includes a Y-direction moving device 33 extending from the front end of the base portion 1a to the vicinity of the center in the Y direction on the front left side of the base portion 1a. In the Y-direction moving device 33, the Y-direction moving block 34 is supported so as to move freely in the Y direction. On the back surface of the upper end side of the Y-direction moving block 34, a rectangular plate-shaped support 35 extending from the Y-direction moving block 34 in the horizontal direction of the X direction, that is, to the right in the figure is provided. The back side of the support 35 is provided with an X-direction moving body 36 that is supported to be movable in the X-direction by an X-direction moving device not shown, and has a rough crank shape in a plan view. The transfer head 37 is supported at the end of the X-direction movable body 36 in the right direction in the figure. In addition, at the end of the X-direction movable body 36 in the right direction in the figure, a wafer recognition camera 38 is provided on the surface opposite to the surface supporting the transfer head 37.

於移載頭37中,在X方向,左右2個吸附噴嘴(移載噴嘴)37a、37b以分別藉由Z(上下)方向移動裝置37c、37d在上下方向移動自如方式設置。移載頭37藉由反轉機構37e、37f以能將各吸附噴嘴37a、37b個別地上下反轉的方式支持。藉此,吸附噴嘴37a、37b,其姿勢能夠被選擇地切換成吸附保持半導體晶片t的吸附面向下的狀態與吸附面向上的狀態。晶圓辨識攝影機38用於保持在部件供應部10的晶圓環11的半導體晶片t的位置辨識。In the transfer head 37, in the X direction, the left and right two suction nozzles (transfer nozzles) 37a, 37b are provided so as to be freely movable in the vertical direction by the Z (vertical) direction moving devices 37c, 37d, respectively. The transfer head 37 is supported by the reversing mechanisms 37e, 37f so as to be able to individually reverse the suction nozzles 37a, 37b up and down. Thereby, the postures of the suction nozzles 37a and 37b can be selectively switched between the state where the suction surface of the semiconductor wafer t is held downward and the state where the suction surface is upward. The wafer recognition camera 38 is used to recognize the position of the semiconductor wafer t held in the wafer ring 11 of the component supply unit 10.

此外,在左側的移載部30A,將位於外側(圖示左側)的吸附噴嘴的部件編號設為37a、又將位於外側的Z方向移動裝置的部件編號設為37c、將位於外側的反轉機構的部件編號設為37e。但是,左右的移載部30A、30B以左右反轉的狀態配置。在這裡,在右側的移載部30B,因為圖示右側成為外側,故將位於右側的吸附噴嘴的部件編號設為37a、又將位於右側的Z方向移動裝置的部件編號設為37c、將位於右側的反轉機構的部件編號設為37e。其中,左側的移載頭37為第1移載頭,右側的移載頭37為第2移載頭。In addition, in the transfer section 30A on the left, the part number of the suction nozzle located on the outer side (left side in the figure) is set to 37a, and the part number of the Z-direction moving device located on the outer side is set to 37c, and the inverted position on the outer side The part number of the mechanism is set to 37e. However, the left and right transfer parts 30A and 30B are arranged in a state where they are reversed left and right. Here, in the transfer section 30B on the right side, since the right side of the figure is the outer side, the part number of the suction nozzle on the right side is set to 37a, and the part number of the Z-direction moving device on the right side is set to 37c. The part number of the reversing mechanism on the right is set to 37e. Among them, the transfer head 37 on the left is the first transfer head, and the transfer head 37 on the right is the second transfer head.

中間載台31用以暫時載置由左右的移載頭37的吸附噴嘴37a、37b取出的半導體晶片t,設於部件供應部10與載台部20之間的基底部1a的略中央位置。中間載台31一致於左右的移載部30A、30B的移載頭37各者的2個吸附噴嘴37a、37b的配置,具備4個載置部31a~31d。The intermediate stage 31 is used to temporarily place the semiconductor wafer t taken out by the suction nozzles 37 a and 37 b of the left and right transfer heads 37, and is provided at a substantially central position of the base portion 1 a between the component supply section 10 and the stage section 20. The intermediate stage 31 corresponds to the arrangement of the two suction nozzles 37a, 37b of the transfer heads 37 of the left and right transfer sections 30A, 30B, and includes four mounting sections 31a to 31d.

晶圓環保持裝置32在將晶圓環11供應及收納至部件供應部10的晶圓環支架12時使用。晶圓環保持裝置32設於左側的移載部30A的支持體35的右方向的端部的,與設置X方向移動體36的面相反側的面,也就是前面。晶圓環保持裝置32具備:藉由空氣汽缸等未圖示的X方向移動裝置以在X方向進退自如的方式設置的棒狀支持臂32a、設於該支持臂32a的圖示右方向的前端,把持晶圓環11的夾持部32b。The wafer ring holding device 32 is used when the wafer ring 11 is supplied and stored in the wafer ring holder 12 of the component supply unit 10. The wafer ring holding device 32 is provided on the right end of the support 35 of the transfer portion 30A on the left side, and the surface on the opposite side to the surface on which the X-direction movable body 36 is provided, that is, the front surface. The wafer ring holding device 32 is provided with: a rod-shaped support arm 32a installed in the X direction by an X-direction moving device not shown such as an air cylinder, and a front end of the support arm 32a in the right direction of the figure. , Hold the clamping portion 32b of the wafer ring 11.

這樣的移載部30從部件供應部10將半導體晶片t依序取出,向實裝部40移載。移載部30在將半導體晶片t以面朝上實裝(將半導體晶片t的電極面朝上實裝至基板)時,將從部件供應部10取出的半導體晶片t藉由中間載台31收授至實裝部40,在將半導體晶片t面朝下實裝(將半導體晶片t的電極面朝下實裝至基板)時,將從部件供應部10取出的半導體晶片t以使吸附噴嘴37a、37b上下反轉而讓半導體晶片t表裏面反轉的狀態收授至實裝部40。Such a transfer unit 30 sequentially takes out the semiconductor wafers t from the component supply unit 10 and transfers them to the mounting unit 40. When the transfer section 30 mounts the semiconductor wafer t face up (mounting the electrode surface of the semiconductor wafer t to the substrate), the semiconductor wafer t taken out from the component supply section 10 is received by the intermediate stage 31 When the semiconductor wafer t is mounted face down (the electrode surface of the semiconductor wafer t is mounted on the substrate), the semiconductor wafer t taken out from the component supply part 10 is attached to the nozzle 37a. , 37b is inverted up and down, and the state where the front and back sides of the semiconductor wafer t are reversed is transferred to the mounting section 40.

(實裝部40) 實裝部40與左右一對移載部30A、30B一樣,具備有相同構成的2個實裝部40A、40B。2個實裝部40A、40B以包夾載台部20的方式分別於基底部1a上的後方兩側以左右反轉的狀態分開配置。以下,關於左右一對實裝部40,也僅說明左側的實裝部40A的構成,省略右側的實裝部40B的構成的說明。(Installation Department 40) The mounting section 40 is provided with two mounting sections 40A, 40B having the same configuration as the pair of left and right transfer sections 30A, 30B. The two mounting parts 40A and 40B are arranged separately on the rear sides of the base part 1a in a state of being reversed left and right so as to sandwich the stage part 20. Hereinafter, regarding the pair of left and right mounting portions 40, only the configuration of the mounting portion 40A on the left will be described, and the description of the configuration of the mounting portion 40B on the right will be omitted.

實裝部40A具備:在基底部1a的後方左側沿著Y方向從基底部1a的後端部至中央部延設的,於側面視時呈門型的支持框架41。在該支持框架41的右側的側面,藉由Y方向移動裝置41a以在Y方向移動自如的方式支持頭支持體42。頭支持體42朝向沿X方向的水平方向即圖示右方向延伸至基底部1a的中央附近。在頭支持體42的前面,藉由能在X方向移動的X方向移動裝置42a設置實裝頭43。The mounting portion 40A includes a support frame 41 that extends from the rear end to the center of the base portion 1a in the Y direction on the rear left side of the base portion 1a and has a gate shape in a side view. On the right side of the support frame 41, the head support 42 is supported by the Y-direction moving device 41a so as to be freely movable in the Y direction. The head support 42 extends to the vicinity of the center of the base portion 1a toward the horizontal direction along the X direction, that is, the right direction in the figure. In front of the head support body 42, the mounting head 43 is provided by an X-direction moving device 42a that can move in the X direction.

實裝頭43具備:在X方向(圖示左右)排列設置,將半導體晶片t吸附保持並實裝於支持基板W的2個實裝工具43a、43b、使2個實裝工具43a、43b個別地在Z方向移動的Z方向移動裝置43c、43d。其中,以Y方向移動裝置41a與X方向移動裝置42a與Z方向移動裝置43c、43d構成實裝頭移送機構。再來,實裝部40具備用來攝像保持於實裝工具43a、43b的半導體晶片t的攝像單元44。The mounting head 43 is provided with two mounting tools 43a, 43b arranged in the X direction (left and right in the figure), holding and mounting the semiconductor wafer t on the support substrate W, and two mounting tools 43a, 43b separately Z-direction moving devices 43c and 43d that move in the Z direction. Among them, the Y-direction moving device 41a, the X-direction moving device 42a, and the Z-direction moving devices 43c, 43d constitute a mounting head transfer mechanism. Furthermore, the mounting section 40 includes an imaging unit 44 for imaging the semiconductor wafer t held by the mounting tools 43a and 43b.

實裝工具43a、43b以與移載頭37的吸附噴嘴37a、37b相同的配置間隔設置。又,實裝工具43a、43b,其將半導體晶片t吸附保持的部分,係藉由能透視上下方向的構件構成。藉此,能從實裝工具43a、43b的上側觀察吸附保持於實裝工具43a、43b的半導體晶片t。實裝工具43a、43b具備未圖示的水平轉動裝置,能使被吸附保持的半導體晶片t在水平面內轉動。再來,實裝工具43a、43b之中,位於內側(基底部1a的中央側)的實裝工具43b,安裝有作為第1辨識部的基板辨識攝影機43f。基板辨識攝影機43f用來攝像載置於載台21的支持基板W的對準標記(全域標記)。The mounting tools 43 a and 43 b are provided at the same arrangement interval as the suction nozzles 37 a and 37 b of the transfer head 37. In addition, the mounting tools 43a and 43b, which suck and hold the semiconductor wafer t, are constituted by members that can see through the vertical direction. Thereby, the semiconductor wafer t sucked and held by the mounting tools 43a, 43b can be viewed from the upper side of the mounting tools 43a, 43b. The mounting tools 43a and 43b are equipped with a horizontal rotation device (not shown), and can rotate the semiconductor wafer t held by suction in a horizontal plane. Furthermore, among the mounting tools 43a and 43b, the mounting tool 43b located on the inner side (the center side of the base portion 1a) is equipped with a board recognition camera 43f as a first recognition unit. The substrate recognition camera 43f is used to image the alignment mark (global mark) of the support substrate W placed on the stage 21.

此外,與移載部30一樣,在實裝部40中左右實裝部40A、40B也以左右反轉的狀態配置。因此,在左右的實裝部40A、40B中,將位於各自的外側(在左側的實裝部40A為左側、在右側的實裝部40B為右側)的實裝工具的部件編號設為43a、將位於外側的Z方向移動裝置的部件編號設為43c。其中,左側的實裝頭43為第1實裝頭,右側的實裝頭43為第2實裝頭。In addition, like the transfer part 30, the left and right mounting parts 40A and 40B in the mounting part 40 are also arranged in a left-right reversed state. Therefore, in the left and right mounting parts 40A and 40B, the part numbers of the mounting tools located on the outer sides (the mounting part 40A on the left side is the left side, and the mounting part 40B on the right side is the right side) are set to 43a, Set the part number of the Z-direction moving device located on the outside to 43c. Among them, the mounting head 43 on the left is the first mounting head, and the mounting head 43 on the right is the second mounting head.

攝像單元44,在中間載台31的4個載置部31a~31d的上方的位置,對應4個載置部31a~31d具備作為第2辨識部的4個晶片辨識攝影機44a~44d。晶片辨識攝影機44a~44d在能攝像載置於載置部31a~31d的半導體晶片t的同時,能透過實裝工具43a、43b攝像保持於移動至晶片辨識攝影機44a~44d的下方的實裝工具43a、43b的半導體晶片t。該等晶片辨識攝影機44a~44d藉由一對XY移動裝置44e、44f,以2個一組以在XY方向可移動的方式支持。成組的2個晶片辨識攝影機(44a與44b及44c與44d),以與實裝工具43a、43b及吸附噴嘴37a、37b相同的配置間隔設置。一對XY移動裝置44e、44f被支持於在X方向延設的以圖示正面視呈門型的攝影機支持框架44g的樑的部分的下側。攝影機支持框架44g在實裝部40的左右支持框架41的上面的前側端部,架橋至左右的支持框架41而設置。The imaging unit 44 is provided with four wafer recognition cameras 44a to 44d as second recognition sections corresponding to the four mounting sections 31a to 31d at positions above the four mounting sections 31a to 31d of the intermediate stage 31. The wafer recognition cameras 44a to 44d can image the semiconductor wafer t placed on the mounting portions 31a to 31d, and can image the mounting tools moved below the wafer recognition cameras 44a to 44d through the mounting tools 43a, 43b. 43a, 43b semiconductor wafer t. The chip recognition cameras 44a to 44d are supported by a pair of XY moving devices 44e and 44f in a group of two to be movable in the XY direction. The two wafer recognition cameras (44a and 44b and 44c and 44d) are arranged at the same arrangement interval as the mounting tools 43a and 43b and the suction nozzles 37a and 37b. The pair of XY moving devices 44e and 44f are supported on the lower side of the beam part of the camera support frame 44g extending in the X direction and having a gate shape in the front view. The camera support frame 44g is provided at the front end portions of the upper surface of the left and right support frames 41 of the mounting part 40, bridged to the left and right support frames 41.

這樣的實裝部40,收授由移載部30而從部件供應部10取出的半導體晶片t,並將收授的半導體晶片t實裝至載置於載台21的支持基板W上。此時,左右的實裝頭43的實裝工具43a、43b在一定的實裝線上實裝半導體晶片t。該實裝線,為在載台21的Y方向的移動範圍內,沿X方向假想設定的直線,藉由用於載台21及實裝工具43a、43b的移動的座標來管理。也就是說,實裝線為位於一定的Y軸上的X軸上的座標點的集合。在支持基板W,通常,沿XY方向以行列狀設定實裝區域。因此,在支持基板W上實裝半導體晶片t時,載台21以沿著欲實裝半導體晶片t的X方向的實裝區域的行位於實裝線上的方式被移動控制。實裝工具43a、43b,在位於實裝線上的實裝區域之中,以在預定的實裝區域上實裝半導體晶片t的方式被移動控制。Such a mounting unit 40 receives the semiconductor wafer t taken out from the component supply unit 10 by the transfer unit 30 and mounts the received semiconductor wafer t on the support substrate W placed on the stage 21. At this time, the mounting tools 43a and 43b of the left and right mounting heads 43 mount the semiconductor wafer t on a fixed mounting line. This mounting line is a straight line imaginarily set in the X direction within the movement range of the stage 21 in the Y direction, and is managed by the coordinates used for the movement of the stage 21 and the mounting tools 43a and 43b. In other words, the mounting line is a collection of coordinate points on the X axis on a certain Y axis. In the support substrate W, usually, mounting areas are set in rows and columns along the XY direction. Therefore, when the semiconductor wafer t is mounted on the support substrate W, the stage 21 is moved and controlled so that the row of the mounting area along the X direction where the semiconductor wafer t is to be mounted is located on the mounting line. The mounting tools 43a and 43b are moved and controlled so as to mount the semiconductor wafer t on a predetermined mounting area among the mounting areas on the mounting line.

左右的實裝部40A、40B的實裝頭43、43,各自在實裝線上,將支持基板W上的實裝區域在X方向2等分,也就是左右2等分,將左側的區域以左側的實裝頭43,右側的區域以右側的實裝頭43分擔同時並行地進行半導體晶片t的實裝。此時,為了防止實裝頭43彼此的物理干擾,將2個實裝頭43、43能接近的最小距離,以軟體地或機械地限制。將該能接近的最小距離稱為「最接近距離」。又,左右的實裝頭43、43位於最接近距離的狀態,將位於外側的實裝工具彼此,亦即左側的實裝頭43的左實裝工具43a與右側的實裝頭43的右實裝工具43a的離間距離稱為「近接間隔」。假如,支持基板W的X方向的尺寸未滿近接間隔的2倍長度時,將左右的實裝頭43進行的半導體晶片t的實裝,在支持基板W的X方向全域同時並行地進行是困難的。The mounting heads 43, 43 of the left and right mounting parts 40A, 40B are on the mounting line, respectively, and divide the mounting area on the support substrate W into two equal parts in the X direction, that is, two equal parts left and right, and divide the left area by The mounting head 43 on the left and the area on the right are shared by the mounting head 43 on the right while mounting the semiconductor wafer t in parallel. At this time, in order to prevent physical interference between the mounting heads 43, the minimum distance between the two mounting heads 43 and 43 can be limited by software or mechanically. The minimum distance that can be approached is called the "closest distance". In addition, the left and right mounting heads 43, 43 are positioned at the closest distance, and the mounting tools located on the outer side are connected to each other, that is, the left mounting tool 43a of the mounting head 43 on the left and the right mounting tool 43a of the mounting head 43 on the right. The distance between the mounting tools 43a is called "proximity interval". If the size of the support substrate W in the X direction is less than twice the length of the proximity interval, it is difficult to mount the semiconductor wafer t by the left and right mounting heads 43 simultaneously in the X direction of the support substrate W. of.

在左右的實裝頭43、43,同時進行實裝的實裝工具43a、43b的組合如圖5所示有4組。第1例為如圖5(A)所示,為以左側的實裝頭43的右實裝工具43b與右側的實裝頭43的左實裝工具43b同時將半導體晶片t實裝的組合。第2例為如圖5(B)所示,為以左側的實裝頭43的右實裝工具43b與右側的實裝頭43的右實裝工具43a同時將半導體晶片t實裝的組合。第3例為如圖5(C)所示,為以左側的實裝頭43的左實裝工具43a與右側的實裝頭43的左實裝工具43b同時將半導體晶片t實裝的組合。第4例如圖5(D)所示,為以左側的實裝頭43的左實裝工具43a與右側的實裝頭43的右實裝工具43a同時將半導體晶片t實裝的組合。As shown in FIG. 5, there are four sets of combinations of the mounting heads 43, 43 on the left and right, and mounting tools 43a, 43b that are simultaneously mounted. The first example is a combination of the right mounting tool 43b of the mounting head 43 on the left side and the left mounting tool 43b of the mounting head 43 on the right side simultaneously mounting the semiconductor wafer t as shown in FIG. 5(A). The second example is a combination of the right mounting tool 43b of the mounting head 43 on the left side and the right mounting tool 43a of the mounting head 43 on the right side simultaneously mounting the semiconductor wafer t as shown in FIG. 5(B). The third example is a combination of the left mounting tool 43a of the mounting head 43 on the left side and the left mounting tool 43b of the mounting head 43 on the right side simultaneously mounting the semiconductor wafer t as shown in FIG. 5(C). The fourth example shown in FIG. 5(D) is a combination in which the left mounting tool 43a of the mounting head 43 on the left and the right mounting tool 43a of the mounting head 43 on the right simultaneously mount the semiconductor wafer t.

其中,同時進行實裝的實裝工具43a、43b彼此的離間距離L為最長的組合,為以如圖5(D)所示的位於左右實裝頭43的外側的實裝工具43a彼此來進行實裝的組合。接著,在該組合中,左右實裝頭43位於最接近距離的狀態的實裝工具43a彼此的離間距離L為上述的「近接間隔」。因此,支持基板W的X方向的長度未滿近接間隔的2倍時,在圖5(D)的組合中於支持基板W的X方向的全域,變得無法將半導體晶片t同時實裝。此外,在本實施形態中,近接間隔為150mm。也就是說,圖5(D)所示的實裝工具43a、43b彼此的離間距離L為150mm。Among them, the combination with the longest distance L between the mounting tools 43a and 43b that are mounted at the same time is performed by the mounting tools 43a located outside the left and right mounting heads 43 as shown in FIG. 5(D) The combination of actual installation. Next, in this combination, the distance L between the mounting tools 43a in the state where the left and right mounting heads 43 are located at the closest distance is the above-mentioned "proximity interval". Therefore, when the length of the support substrate W in the X direction is less than twice the proximity interval, in the combination of FIG. 5(D), it becomes impossible to mount the semiconductor wafer t at the same time in the entire X direction of the support substrate W. In addition, in this embodiment, the proximity interval is 150 mm. That is, the distance L between the mounting tools 43a and 43b shown in FIG. 5(D) is 150 mm.

此外,作為實裝頭43的動作程序,同時進行實裝的實裝工具43a、43b的組合,限於圖5(A)~(C)的組合,不存在圖5(D)的組合時,「近接間隔」成為如圖5(B)所示的那種,左右實裝頭43於最接近距離的狀態的左側的實裝頭43的右實裝工具43b與右側的實裝頭43的右實裝工具43a的離間距離、或圖5(C)所示的那種,左右實裝頭43於最接近距離的狀態的左側的實裝頭43的左實裝工具43a與右側的實裝頭43的左實裝工具43b的離間距離。In addition, as the operation program of the mounting head 43, the combination of mounting tools 43a and 43b that are simultaneously mounted is limited to the combination of Figs. 5(A) to (C). When the combination of Fig. 5(D) does not exist, " The "close distance" is as shown in FIG. 5(B). The right mounting tool 43b of the left mounting head 43 and the right mounting tool 43b of the right mounting head 43 in the state where the left and right mounting heads 43 are at the closest distance The distance between the mounting tools 43a, or as shown in FIG. 5(C), the left and right mounting heads 43 are at the closest distance between the left mounting tool 43a of the left mounting head 43 and the right mounting head 43 The distance between the left mounting tool 43b.

(控制部50) 控制部50,基於記憶於記憶部51的控制資訊,控制部件供應部10、載台部20、移載部30、實裝部40的動作,將包含半導體晶片t的電子部件在支持基板W的各實裝區域依序實裝。在記憶部51中,記憶有:補正由後述的載台21的移動位置誤差的取得工程得到的載台21的移動位置誤差的載台補正資料、及補正由實裝工具43a、43b的移動位置誤差的取得工程得到的實裝工具43a、43b的移動位置誤差的工具補正資料,基於該等補正資料控制載台21及實裝部40的移動。又,在記憶部51中,也記憶有:用以對支持基板W實裝半導體晶片t的,對移載部30及實裝部40等的動作程式等。(Control part 50) The control section 50 controls the operations of the component supply section 10, the stage section 20, the transfer section 30, and the mounting section 40 based on the control information stored in the memory section 51, and places the electronic components including the semiconductor chip t on the support substrate W Each installation area is installed in order. In the memory 51, there are stored: stage correction data for correcting the movement position error of the stage 21 obtained by the acquisition process of the movement position error of the stage 21 described later, and correction of the movement positions of the mounting tools 43a, 43b The tool correction data of the movement position error of the mounting tools 43a, 43b obtained by the error acquisition process controls the movement of the stage 21 and the mounting part 40 based on the correction data. In addition, the memory unit 51 also stores operation programs for mounting the semiconductor chip t on the support substrate W, the transfer unit 30, the mounting unit 40, and the like.

[實裝裝置的動作(電子部件的實裝)] 接著,說明關於利用實裝裝置1的半導體晶片t等的電子部件的實裝工程。當在支持基板W的各實裝區域實裝半導體晶片t等電子部件時,僅適用全域辨識方式時,因為不進行實裝區域的位置辨識,對各實裝區域的半導體晶片t的定位精度,依賴於支持基板W的全域標記等的辨識精度與載台21的XY移動機構22的機械加工精度等、以及實裝工具43a、43b的X方向移動裝置42a、Y方向移動裝置41a、Z方向移動裝置43c、43d的機械加工精度等。但是,將導引載台21或實裝工具43a、43b的移動的導引軌道等,在所期望的範圍以±7μm以下的精度完成,實質上在金屬加工上不可能。更甚於此,將具有所期望的長度的導引軌道於金屬框架等以±7μm以下的直進性地蜿蜓組裝更加不可能。在這裡,測定載台21的移動位置誤差,取得(校正)補正載台21的移動的資料。又,將實裝工具43a、43b的移動位置誤差在實裝線上進行測定,取得(校正)補正實裝工具43a、43b的移動的資料。[The operation of the mounting device (the mounting of electronic parts)] Next, the mounting process of electronic components such as the semiconductor wafer t using the mounting apparatus 1 will be described. When electronic components such as semiconductor wafer t are mounted on each mounting area of the support substrate W, when only the global recognition method is applied, because the position of the mounting area is not recognized, the positioning accuracy of the semiconductor wafer t in each mounting area is Depends on the recognition accuracy of the global mark of the support substrate W, the machining accuracy of the XY moving mechanism 22 of the stage 21, etc., and the X-direction moving device 42a, Y-direction moving device 41a, and Z-direction movement of the mounting tools 43a, 43b The machining accuracy of the devices 43c, 43d, etc. However, the guide rails that guide the movement of the stage 21 or the mounting tools 43a, 43b are completed within a desired range with an accuracy of ±7 μm or less, which is substantially impossible in metal processing. More than this, it is even more impossible to assemble a guide rail with a desired length to a metal frame or the like in a straight manner of ±7 μm or less. Here, the movement position error of the stage 21 is measured, and data for correcting the movement of the stage 21 is acquired (corrected). In addition, the movement position error of the mounting tools 43a, 43b is measured on the mounting line, and data for correcting the movement of the mounting tools 43a, 43b is acquired (calibrated).

[載台21的移動位置誤差(載台補正資料)的取得工程(校正工程(1))] 補正載台21的移動位置誤差的資料,使用圖6及圖7所示的那種校正基板71來取得。校正基板71為例如在玻璃製的基板以預先設定位置辨識用的點標記72的間隔設成行列狀者。校正基板71的點標記72例如在縱600mm×橫600mm的範圍內以3mm間隔設置。點標記72以金屬薄膜等形成,能夠利用蝕刻及濺鍍等成膜技術形成。點標記的直徑例如為0.2mm。將這樣的校正基板71在載台21上正確地設定。校正基板71的設定方法雖不特別地限定,但例如藉由以下所示的方法實施。其中,校正基板71具有與支持基板W相同的大小,設置點標記的範圍被設為與包含支持基板W上的所有實裝區域的範圍相同的大小。[Acquisition process (correction process (1)) of movement position error of stage 21 (stage correction data)] The data for correcting the movement position error of the stage 21 is obtained using the correction board 71 shown in FIGS. 6 and 7. The calibration substrate 71 is, for example, a substrate made of glass that is arranged in rows and columns at intervals of dot marks 72 for position recognition in advance. The dot marks 72 of the calibration substrate 71 are provided at intervals of 3 mm, for example, within a range of 600 mm in length×600 mm in width. The dot mark 72 is formed of a metal thin film or the like, and can be formed by film forming techniques such as etching and sputtering. The diameter of the dot mark is 0.2 mm, for example. The calibration board 71 is accurately set on the stage 21. Although the setting method of the calibration board 71 is not specifically limited, it implements by the method shown below, for example. Here, the calibration substrate 71 has the same size as the support substrate W, and the range where the dot marks are set is the same size as the range including all the mounting regions on the support substrate W.

(校正基板71的設定) 將上述那種校正基板71藉由作業者的手工在載台21上設定。校正基板71的設定,在將校正基板71載置於載台21上後,藉由進行校正基板71的平行調整(使點標記72的排列方向一致於XY方向的調整)來實施。平行調整,在用於支持基板W的全域標記的攝像的基板辨識攝影機43f之中,例如利用左實裝頭43的基板辨識攝影機43f來進行。首先,在載置於載台21上的校正基板71上,如圖6所示,以位於校正基板71的左前方的角部的點標記72成為基板辨識攝影機43f的攝像視野V的中心的方式調整載台21的位置。(Setting of calibration board 71) The above-mentioned calibration board 71 is manually set on the stage 21 by the operator. The setting of the calibration board 71 is performed by performing parallel adjustment of the calibration board 71 (adjustment to make the arrangement direction of the dot marks 72 match the XY direction) after the calibration board 71 is placed on the stage 21. The parallel adjustment is performed by, for example, the board recognition camera 43f of the left mounting head 43 among the board recognition camera 43f for supporting imaging of the global mark of the board W. First, on the calibration substrate 71 placed on the stage 21, as shown in FIG. 6, the dot mark 72 located at the front left corner of the calibration substrate 71 becomes the center of the imaging field of view V of the substrate recognition camera 43f. Adjust the position of the stage 21.

從該狀態使載台21以低速(將攝影機22的視野V內以點標記72慢慢地移動的程度的速度)向X方向左側移動。此時,作業者以監視器監視基板辨識攝影機43f的攝像影像,若以基板辨識攝影機43f攝像的點標記72的位置相對於攝像視野V向上側或下側偏差的話,使載台21的移動停止,以手動將校正基板71的傾斜向沒有偏差的方向調整。圖6的攝像視野V,示出伴隨著載台21的移動在攝像視野V內出現的點標記72的位置慢慢地向下側偏差的狀態之例。From this state, the stage 21 is moved to the left in the X direction at a low speed (speed at which the dot mark 72 is slowly moved in the field of view V of the camera 22). At this time, the operator monitors the captured image of the board recognition camera 43f with a monitor, and stops the movement of the stage 21 if the position of the dot mark 72 captured by the board recognition camera 43f is shifted upward or downward from the imaging field of view V. , Manually adjust the inclination of the correction substrate 71 to a direction without deviation. The imaging field of view V in FIG. 6 shows an example of a state where the position of the dot mark 72 appearing in the imaging field of view V gradually shifts downward along with the movement of the stage 21.

調整校正基板71的傾斜後,又以位於左前方的角部的點標記72成為基板辨識攝影機43f的攝像視野V中心的方式調整載台21的位置,使載台21以低速向X方向左側移動。作業者同樣以監視器監視點標記72的位置是否有偏差。接著,若位置有偏差則使載台21的移動停止,調整校正基板71的傾斜。將這樣的動作,在載台21的X方向的可移動範圍的全域,重複進行到點標記71不超出攝像視野V外而映出在監視器畫面為止。這種作業者所進行的載台21的移動,藉由觸控面板與搖桿的操作等進行。After adjusting and calibrating the inclination of the substrate 71, the position of the stage 21 is adjusted so that the point mark 72 located at the front left corner becomes the center of the imaging field of view V of the substrate recognition camera 43f, and the stage 21 is moved to the left in the X direction at a low speed . The operator also monitors whether there is a deviation in the position of the point mark 72 with a monitor. Next, if there is a deviation in the position, the movement of the stage 21 is stopped, and the tilt of the correction substrate 71 is adjusted. Such an operation is repeated over the entire range of the movable range in the X direction of the stage 21 until the dot mark 71 does not exceed the imaging field of view V and is reflected on the monitor screen. The movement of the stage 21 by the operator is performed by the operation of the touch panel and the joystick.

(載台21的移動位置誤差(補正資料)的取得) 接著,以上述方法將在載台21上設定的校正基板71的點標記72的位置,利用左右實裝頭43具備的基板辨識攝影機43f進行辨識,取得載台21的移動位置誤差及基於其的補正資料。點標記72的辨識,以使左右基板辨識攝影機43f分別在預定的位置停止的狀態使校正基板71移動來進行。校正基板71上的點標記72的攝像,例如如圖7所示,從位於校正基板71的後方(位於基底部1a的後方側之側)左端的點標記72朝向X方向右側以點標記72的配置間隔3mm的間距開始間距移動,朝向前方(位於基底部1a的前方側之側)依序折返同時進行。此時,校正基板71上的點標記72之中,將設於左半分的區域的點標記72利用左側的基板辨識攝影機43f進行攝像,將設於右半分的區域的點標記72利用右側的基板辨識攝影機43f進行攝像。(Acquisition of movement position error (correction data) of stage 21) Next, the position of the dot mark 72 of the calibration substrate 71 set on the stage 21 is recognized by the above-mentioned method using the substrate recognition cameras 43f of the left and right mounting heads 43 to obtain the movement position error of the stage 21 and the corresponding Correct the information. The recognition of the dot mark 72 is performed by moving the calibration board 71 in a state where the left and right board recognition cameras 43f are stopped at predetermined positions. The imaging of the dot mark 72 on the calibration substrate 71, for example, as shown in FIG. 7, from the dot mark 72 at the left end of the calibration substrate 71 (located on the rear side of the base portion 1a) toward the right side in the X direction with the dot mark 72 The placement interval of 3mm starts to move in pitch, and turns back in sequence toward the front (on the side of the front side of the base portion 1a) simultaneously. At this time, among the dot marks 72 on the calibration board 71, the dot mark 72 provided in the left half area is captured by the board recognition camera 43f on the left, and the dot mark 72 provided in the right half area is captured by the right board. The recognition camera 43f performs imaging.

具體來說,以使載台21位於XY移動機構22的XY方向的移動行程的中央(將該位置稱為原點位置。)的狀態,使左側的基板辨識攝影機43f位於校正基板71上的左半分的點標記群的中央(圖7以符號71A所示的位置),使右側的基板辨識攝影機43f位於校正基板71上的右半分的點標記群的中央(圖7以符號71B所示的位置)。從該狀態開始,在使左右的基板辨識攝影機43f維持停止的狀態下,作業者觀察監視器同時操作XY移動機構22,以左半分的點標記群的左上的點標記72位於左側的基板辨識攝影機43f的攝像視野V的中心的方式,使校正基板71移動。藉此,右半分的點標記群的左上的點標記72會位於右側的基板辨識攝影機43f的攝像視野V內。在左右各點標記群中,左上的點標記72成為第1個點標記72。Specifically, in a state where the stage 21 is positioned at the center of the movement stroke in the XY direction of the XY movement mechanism 22 (this position is referred to as the origin position), the board recognition camera 43f on the left is positioned on the left side of the calibration board 71. The center of the half-minute dot mark group (the position shown by the symbol 71A in FIG. 7), and the board recognition camera 43f on the right side is positioned at the center of the right half-minute dot mark group on the calibration board 71 (the position shown by the symbol 71B in FIG. ). From this state, while keeping the left and right board recognition cameras 43f in a stopped state, the operator observes the monitor while operating the XY moving mechanism 22 to mark the left half of the dot mark group with the upper left dot mark 72 on the left side board recognition camera The center of the imaging field of view V of 43f moves the correction board 71. Thereby, the upper left point mark 72 of the point mark group on the right half is located within the imaging field of view V of the board recognition camera 43f on the right. Among the left and right dot mark groups, the dot mark 72 on the upper left becomes the first dot mark 72.

以使第1個點標記72位於基板辨識攝影機43f的攝像視野V中心後,開始左右基板辨識攝影機43f進行的點標記72的檢出動作。在此之後,先以控制部50的自動控制進行。檢出動作藉由作業者按下(觸碰)顯示於觸控面板的檢出動作的開始按鍵而開始。點標記72的檢出動作開始後,首先攝像第1個點標記72。攝像到的第1個點標記72的影像,利用公知的影像辨識技術進行處理,檢出相對於基板辨識攝影機43f的攝像視野V中心的點標記72的位置偏差。檢出的位置偏差,作為與載台21的移動位置(XY座標)成對的資訊記憶於記憶部51。點標記72的位置辨識結束後,依前述的移動順序,為了使下個(第2個)點標記72位於攝影機的視野內而移動載台21。在圖7之例中,因為第2個點標記72位於第1個點標記72的右鄰,使載台21向X方向左側移動3mm。After the first dot mark 72 is positioned at the center of the imaging field of view V of the board recognition camera 43f, the detection operation of the dot mark 72 by the left and right board recognition cameras 43f is started. After that, the automatic control of the control unit 50 is performed first. The detection operation is started by the operator pressing (touching) the start button of the detection operation displayed on the touch panel. After the detection operation of the dot mark 72 is started, first, the first dot mark 72 is captured. The captured image of the first dot mark 72 is processed by a known image recognition technique, and the positional deviation of the dot mark 72 with respect to the center of the imaging field of view V of the substrate recognition camera 43f is detected. The detected positional deviation is stored in the storage unit 51 as information paired with the moving position (XY coordinates) of the stage 21. After the position recognition of the dot mark 72 is completed, the stage 21 is moved in order to place the next (second) dot mark 72 within the field of view of the camera in accordance with the aforementioned movement sequence. In the example of FIG. 7, because the second dot mark 72 is located on the right side of the first dot mark 72, the stage 21 is moved 3 mm to the left in the X direction.

載台21的移動基於設在載台21的XY移動機構的線性編碼器的讀取值而進行。線性編碼器的刻度計,作為熱對策較佳為使用熱膨漲係數小的玻璃製刻度計。載台21的移動結束後,與第1個點標記72a一樣,檢出第2個點標記72的位置偏差,作為與此時的載台21的XY座標成對的資訊記憶至記憶部51。點標記72的攝像,在使載台21停止後,在僅等待載台21的停止時產生的振動平息的時間後進行。對校正基板71上的所有點標記72進行這種動作,取得對應各別的位置的點標記72的移動位置偏差資料,作為載台補正資料記憶於記憶部51。The movement of the stage 21 is performed based on the read value of the linear encoder of the XY movement mechanism provided on the stage 21. The scale meter of the linear encoder preferably uses a glass scale meter with a small thermal expansion coefficient as a thermal countermeasure. After the movement of the stage 21 is completed, the position deviation of the second point mark 72 is detected as with the first point mark 72a, and is stored in the memory 51 as information paired with the XY coordinates of the stage 21 at this time. The imaging of the dot mark 72 is performed after the stage 21 is stopped, and then after waiting for a time for the vibration generated when the stage 21 is stopped to subside. This operation is performed on all the dot marks 72 on the calibration substrate 71, and the movement position deviation data of the dot marks 72 corresponding to the respective positions are acquired, and stored in the memory unit 51 as stage correction data.

(伴隨著支持基板W的熱膨脹的補正資料的取得) 為了使用於半導體晶片t的接合黏晶薄膜的接合性提升,有在載台21設置加熱器將支持基板W加熱的情形。在此情形時,因為載置於載台21之前及之後,支持基板W的溫度會改變(上升),支持基板W因此而熱膨脹。支持基板W若發生熱膨脹,即便使載台21與實裝頭55高精度地移動,支持基板W的延展也會使實裝位置發生偏差。(Acquisition of correction data accompanying the thermal expansion of substrate W) In order to improve the bondability of the bonding die-bonding film used for the semiconductor wafer t, there is a case where a heater is provided on the stage 21 to heat the support substrate W. In this case, because the temperature of the support substrate W changes (rises) before and after the mounting on the stage 21, the support substrate W thermally expands due to this. If the support substrate W undergoes thermal expansion, even if the stage 21 and the mounting head 55 are moved with high precision, the extension of the support substrate W will cause a deviation in the mounting position.

在這裡,預先測定因加熱器的加熱產生的支持基板W的熱膨脹量等而事先掌握,在支持基板W實裝半導體晶片t時,將因應預先掌握的熱膨脹量的係數(百分比)乘上補正資料並控制載台21的移動較佳。此時,因為加熱器的形狀及配置、載台21的構造等要因,支持基板W全體並不一定會均勻地熱膨脹,也可以一併掌握熱膨脹的分佈。例如,將支持基板W上的區域分割成10行×10列等的格子狀的複數區域,在每個分割的區域測定熱膨脹量(各測定點的熱膨脹造成的變位)。接著,切換在個區域乘上載台21的補正資料的係數也可以。Here, the amount of thermal expansion of the support substrate W caused by the heating of the heater is measured in advance and known in advance. When the semiconductor wafer t is mounted on the support substrate W, the coefficient (percentage) corresponding to the amount of thermal expansion obtained in advance is multiplied by the correction data And it is better to control the movement of the carrier 21. At this time, due to factors such as the shape and arrangement of the heater and the structure of the stage 21, the entire supporting substrate W does not necessarily expand uniformly, and the distribution of the thermal expansion can also be grasped. For example, the area on the support substrate W is divided into grid-like plural areas such as 10 rows×10 columns, and the thermal expansion amount (displacement due to thermal expansion at each measurement point) is measured for each divided area. Next, the coefficient of the correction data on the stage 21 may be switched to each area.

又,在從將支持基板W載置於載台21後到支持基板W的熱膨脹相對於載台21的溫度呈飽和為止的期間的每個預定經過時間測定支持基板W的熱膨脹量,預先求出因應每個預定的經過時間的熱膨脹量的係數也可以。此時,在將支持基板W上分割成複數區域的每個區域,求出因應熱膨脹量的係數也可以。接著,在進行半導體晶片t的實裝時,在從支持基板W載置於載台21上後的每個經過時間,切換成因應該經過時間的係數,將該係數乘上補正資料使載台21移動。藉此,不用等待到支持基板W的熱膨脹相對於載台21的溫度成為飽和狀態,就能對該支持基板W開始半導體晶片t的實裝,能將半導體晶片t的實裝以高效率,且高精度實施。In addition, the amount of thermal expansion of the support substrate W is measured at each predetermined elapsed time after the support substrate W is placed on the stage 21 until the thermal expansion of the support substrate W becomes saturated with respect to the temperature of the stage 21, and is calculated in advance The coefficient of thermal expansion corresponding to each predetermined elapsed time may also be used. In this case, the coefficient corresponding to the amount of thermal expansion may be obtained for each area divided into a plurality of areas on the support substrate W. Next, when the semiconductor wafer t is mounted, at each elapsed time after the support substrate W is placed on the stage 21, the coefficient of the elapsed time is switched, and the coefficient is multiplied by the correction data to make the stage 21 mobile. Thereby, without waiting until the thermal expansion of the support substrate W becomes saturated with respect to the temperature of the stage 21, the semiconductor wafer t can be mounted on the support substrate W, and the semiconductor wafer t can be mounted with high efficiency, and High-precision implementation.

(載台21的移動位置的補正) 在使載台21移動時,在以載台21的移動位置誤差的取得工程求出的載台補正資料之中,參照利用左側的實裝頭43具備的基板辨識攝影機43f取得到的載台補正資料,補正載台21的移動位置。控制部50,以使沿著載置於載台21的支持基板W上的X方向的實裝區域的各行依序位於實裝線上的方式控制XY移動機構22。此時,控制部50參照記憶於記憶部51的實裝區域的位置資訊(XY座標)與上述的載台補正資料,算出使實裝區域的行位於實裝線上時所需的補正值。接著,將使實裝區域的行位於實裝線上時的載台21的移動位置,僅以算出的補正值的分進行補正。載台21具有加熱器時,將基於上述支持基板W的熱膨脹量的係數,乘以載台21的補正資料較佳。(Correction of the moving position of the stage 21) When the stage 21 is moved, among the stage correction data obtained by the acquisition process of the movement position error of the stage 21, refer to the stage correction obtained by the board recognition camera 43f provided with the mounting head 43 on the left. Data, the movement position of the stage 21 is corrected. The control unit 50 controls the XY moving mechanism 22 so that the rows of the mounting area along the X direction on the support substrate W placed on the stage 21 are sequentially positioned on the mounting line. At this time, the control unit 50 refers to the position information (XY coordinates) of the mounting area stored in the memory unit 51 and the above-mentioned stage correction data, and calculates the correction value required when the row of the mounting area is located on the mounting line. Next, the movement position of the stage 21 when the row of the mounting area is positioned on the mounting line is corrected only by the points of the calculated correction value. When the stage 21 has a heater, it is better to multiply the coefficient based on the amount of thermal expansion of the support substrate W by the correction data of the stage 21.

此外,利用右側的實裝頭43具備的基板辨識攝影機43f取得到的載台補正資料,被用於右側的實裝頭43的移動位置的補正。亦即,因為左右實裝頭43的基板辨識攝影機43f,攝像在相同校正基板71以一定的配置間隔設置的點標記72,只要載台21(校正基板71)平行移動,從左右基板辨識攝影機43f的攝像影像辨識到的點標記72的位置偏差應該是一致。但是,載台21在移動時,會有在水平面內產生微小的回動,即偏搖的情形。在此情形中,即便使用由左側的基板辨識攝影機43f取得到的載台補正資料補正載台21的移動誤差而使其移動,推測右側的實裝頭43的實裝工具43a、43b進行的實裝精度也可能不夠充分。在此,將右側的實裝頭43的移動位置,基於由左側的基板辨識攝影機43f取得到的載台補正資料與由右側的基板辨識攝影機43f取得到的載台補正資料之間的差來進行補正。藉此,即便在載台21產生偏搖時,也能夠確保左右的實裝頭43的實裝精度。In addition, the stage correction data obtained by the board recognition camera 43f provided in the mounting head 43 on the right side is used to correct the movement position of the mounting head 43 on the right side. That is, because the board recognition cameras 43f of the left and right mounting heads 43 capture the dot marks 72 arranged on the same calibration board 71 at regular intervals, as long as the stage 21 (calibration board 71) moves in parallel, the left and right board recognition cameras 43f The position deviations of the point markers 72 recognized by the camera images should be consistent. However, when the stage 21 is moving, there may be a slight backlash in the horizontal plane, that is, a sway. In this case, even if the stage 21 is moved by correcting the movement error of the stage 21 using the stage correction data obtained by the board recognition camera 43f on the left, it is estimated that the mounting tools 43a, 43b of the mounting head 43 on the right are performed The installation accuracy may also be insufficient. Here, the movement position of the mounting head 43 on the right is based on the difference between the stage correction data obtained by the board recognition camera 43f on the left and the stage correction data obtained by the board recognition camera 43f on the right. Correction. Thereby, even when the stage 21 skews, the mounting accuracy of the left and right mounting heads 43 can be ensured.

[實裝工具43a、43b的移動位置誤差(第1的工具補正資料)的取得工程(校正工程(2))] 補正實裝工具43a、43b的XY方向的移動位置誤差的資料(第1工具補正資料),與載台21的校正一樣,使用校正基板71取得。因此,與上述校正工程(1)連續進行即可。該補正資料的取得,在使載台21例如停止在原點位置的狀態,將位於在以實裝線為中央的Y方向有預定寬度的區域(圖7以虛線的斜線表示區域,以下稱為「補正資料取得區域Dt」。)內的位置點標記72的位置,在使左右實裝頭43具備的基板辨識攝影機43f個別移動的同時進行辨識。各個實裝頭43的基板辨識攝影機43f,關於X方向以實裝頭43的X方向的可移動範圍的全域,關於Y方向以設定的預定寬度的範圍內進行補正資料取得區域Dt內的點標記72的攝像。[Acquisition process (correction process (2)) of movement position error of mounting tools 43a, 43b (the first tool correction data)] The data (first tool correction data) for correcting the movement position error in the XY directions of the mounting tools 43a and 43b is obtained using the correction board 71 in the same way as the correction of the stage 21. Therefore, it is sufficient to continue with the above-mentioned calibration process (1). The acquisition of this correction data is to be located in a region with a predetermined width in the Y direction centered on the mounting line in a state where the stage 21 is stopped at the origin position (Figure 7 shows the region with a dashed diagonal line, which is hereinafter referred to as " The position of the position point mark 72 in the correction data acquisition area Dt".) is recognized while individually moving the board recognition cameras 43f provided in the left and right mounting heads 43. The board recognition camera 43f of each mounting head 43 performs correction data within the range of a predetermined width set in the X direction in the X direction of the mounting head 43 for the entire movable range of the mounting head 43 in the X direction. The point mark in the area Dt is obtained. 72's camera.

具體來說,首先使左側的實裝頭43的基板辨識攝影機43f,移動至左側的實裝頭43的X方向的可移動範圍的左端,即補正資料取得區域Dt的後方側,使在該位置的點標記72位於基板辨識攝影機43f的攝像視野V的中心。在該狀態下,檢出動作藉由作業者按下(觸碰)顯示於觸控面板的檢出動作的開始按鍵而開始。Specifically, first, the board recognition camera 43f of the mounting head 43 on the left is moved to the left end of the movable range of the mounting head 43 on the left in the X direction, that is, behind the correction data acquisition area Dt. The dot mark 72 of is located at the center of the imaging field of view V of the board recognition camera 43f. In this state, the detection operation is started by the operator pressing (touching) the start button of the detection operation displayed on the touch panel.

檢出動作開始後,基板辨識攝影機43f朝向X方向的右側以點標記72的配置間隔開始間距移動,在X方向於可移動的範圍內,向前方折返同時依序攝像補正資料取得區域Dt內的點標記72。接著,基板辨識攝影機43f與上述載台補正資料的取得一樣辨識點標記72的位置,取得作為補正實裝工具43a、43b的移動位置的補正資料的第1工具補正資料並記憶至記憶部51。也在右側的實裝頭43的基板辨識攝影機43f進行一樣的動作,取得右側的實裝頭43的實裝工具43a、43b的第1工具補正資料並記憶至記憶部51。此外,補正資料取得區域Dt的預定的寬度,雖可以因應實裝於支持基板W的電子部件的大小進行適宜設定,但概略在30mm~100mm的範圍內設定即可。又,為電子部件1個分的寬度也可以。After the detection operation starts, the board recognition camera 43f starts to move to the right in the X direction at the interval of the dot marks 72, and then turns back forward within the movable range in the X direction while sequentially imaging the correction data acquisition area Dt. Point mark 72. Next, the board recognition camera 43f recognizes the position of the point mark 72 in the same way as the above-mentioned acquisition of the stage correction data, and acquires the first tool correction data that is the correction data for correcting the movement positions of the mounting tools 43a, 43b, and stores it in the memory 51. The board recognition camera 43f of the mounting head 43 on the right also performs the same operation, and the first tool correction data of the mounting tools 43a, 43b of the mounting head 43 on the right are acquired and stored in the memory 51. In addition, the predetermined width of the correction data acquisition area Dt can be appropriately set in accordance with the size of the electronic component mounted on the support substrate W, but it is generally set within the range of 30 mm to 100 mm. In addition, the width of one minute of the electronic component may be sufficient.

上述載台補正資料與工具補正資料的取得工程,基本上在使實裝裝置1運轉時實施,基於該測定結果來控制載台21及實裝頭43的移動即可。但是,在載台21及實裝頭43,有組入補助半導體晶片t的實裝的加熱器等的情形。在該情況下,會有裝置各部的溫度上升而因熱膨脹造成機械精度降低的情形。又,隨著實裝裝置1的半導體晶片t的實裝工程的進行,因使實裝頭43移動的移動裝置的馬達等的發熱,也會有裝置各部的機械精度降低情形發生。考慮到這種因溫度上升造成的移動誤差,不限於裝置運轉時的1次,定期實施也可以。The acquisition process of the stage correction data and tool correction data is basically carried out when the mounting device 1 is operated, and the movement of the stage 21 and the mounting head 43 may be controlled based on the measurement result. However, in the stage 21 and the mounting head 43, a heater or the like that assists the mounting of the semiconductor wafer t may be incorporated. In this case, the temperature of each part of the device may rise and the mechanical accuracy may decrease due to thermal expansion. In addition, as the mounting process of the semiconductor wafer t of the mounting device 1 progresses, the mechanical accuracy of each part of the device may be reduced due to heat generated by the motor of the moving device that moves the mounting head 43. Taking into account the movement error caused by the temperature rise, it is not limited to one time during the operation of the device, and it may be implemented regularly.

(實裝工具43a、43b的移動位置的補正) 說明關於使左右實裝頭43移動時的移動位置的補正。首先,在使左側的實裝頭43移動至實裝線上的實裝位置時,以實裝工具43a、43b的移動位置誤差的取得工程求出的第1工具補正資料之中,參照利用左側實裝頭43具備的基板辨識攝影機43f取得到的工具補正資料,補正實裝工具43a、43b的移動位置。控制部50,在使保持於實裝工具43a、43b的半導體晶片t位於實裝線上的實裝區域的行之中,為了在預定的實裝區域實裝而控制實裝頭43的X方向移動裝置42a及Y方向移動裝置41a。此時,控制部50參照記憶於記憶部51的該實裝區域的位置資訊(XY座標)與上述第1工具補正資料,算出以半導體晶片t的中心一致於該實裝區域的中心的方式來定位所需要的補正值。接著,將使半導體晶片t實裝於實裝區域時的實裝工具43a、43b的移動位置,僅以算出的補正值的分進行補正。(Correction of the moving position of mounting tools 43a, 43b) The correction of the moving position when the left and right mounting heads 43 are moved will be described. First, when the left mounting head 43 is moved to the mounting position on the mounting line, among the first tool correction data obtained by the acquisition process of the movement position error of the mounting tools 43a, 43b, refer to the use of the left side The tool correction data acquired by the board recognition camera 43f of the mounting head 43 corrects the movement positions of the mounting tools 43a and 43b. The control unit 50 controls the movement of the mounting head 43 in the X direction in order to mount the semiconductor wafer t held by the mounting tools 43a, 43b in the mounting area on the mounting line in the row of the mounting area on the mounting line The device 42a and the Y-direction moving device 41a. At this time, the control unit 50 refers to the position information (XY coordinates) of the mounting area stored in the memory unit 51 and the first tool correction data, and calculates that the center of the semiconductor chip t coincides with the center of the mounting area The correction value required for positioning. Next, the movement positions of the mounting tools 43a and 43b when the semiconductor wafer t is mounted on the mounting area are corrected only by the calculated correction value.

又,右側的實裝頭43的情形也與左側的實裝頭43一樣,參照利用右側實裝頭43具備的基板辨識攝影機43f取得到的第1工具補正資料,補正實裝工具43a、43b的移動位置。此外,在本實施形態中,於各實裝頭43,2個實裝工具43a、43b與基板辨識攝影機43f的相對位置關係,藉由夾具等在一定的精度內組裝較佳。藉此,能夠更加提升半導體晶片t等的定位精度。In addition, the situation of the mounting head 43 on the right is also the same as the mounting head 43 on the left. Refer to the first tool correction data obtained by the board recognition camera 43f provided in the mounting head 43 on the right to correct the mounting tools 43a, 43b. move Place. In addition, in the present embodiment, in each mounting head 43, the relative positional relationship between the two mounting tools 43a, 43b and the board recognition camera 43f is preferably assembled within a certain accuracy by a jig or the like. Thereby, the positioning accuracy of the semiconductor wafer t and the like can be further improved.

[實裝工具43a、43b的移動位置誤差(第2的工具補正資料)的取得工程(校正工程(3))] 補正實裝工具43a、43b的Z方向的移動位置誤差的資料(第2工具補正資料),在校正工程(1)、(2)之後,在適用載台補正資料及第1工具補正資料的狀態下,對支持基板W或試驗用的支持基板Ws,在實裝線上以預定的間距實裝半導體晶片t或試驗用的晶片ts,藉由測定相對於實裝的晶片的目標位置的位置偏差而取得。[Acquisition process (correction process (3)) of movement position error of mounting tools 43a, 43b (second tool correction data)] Data for correcting the movement position error of the mounting tools 43a, 43b in the Z direction (the second tool correction data), after the correction process (1), (2), the state of the application stage correction data and the first tool correction data Next, with respect to the support substrate W or the test support substrate Ws, the semiconductor wafer t or the test wafer ts is mounted on the mounting line at a predetermined pitch, and the positional deviation from the target position of the mounted wafer is measured. Obtained.

具體來說,在載台21上載置試驗用的支持基板Ws。試驗用的支持基板Ws,雖也可以是用於製造的支持基板W,但因若至少在實裝線上能夠確保實裝區域即可,與如圖7所示的補正資料取得區域Dt同程度的大小的基板也可以。若在載台21載置支持基板Ws的話,以與後述的半導體晶片t的移載工程及半導體晶片t的實裝工程同樣的動作,作為補正資料取得用沿著實裝線預先設定的實裝間隔,例如以1mm間隔,將試驗用的晶片ts藉由黏著膠來實裝。黏著膠預先貼附於支持基板Ws即可。該實裝以全域辨識方式進行。Specifically, the supporting substrate Ws for testing is placed on the stage 21. Although the supporting substrate Ws for testing may be the supporting substrate W for manufacturing, it is sufficient if at least the mounting area can be secured on the mounting line, which is about the same as the correction data acquisition area Dt shown in FIG. 7 The size of the substrate is also possible. If the support substrate Ws is placed on the stage 21, the same operation as the transfer process of the semiconductor wafer t and the mounting process of the semiconductor wafer t described later will be used as a correction data acquisition along the mounting line preset mounting interval For example, the test chip ts is mounted with adhesive at intervals of 1 mm. The adhesive glue may be attached to the supporting substrate Ws in advance. The installation is carried out by means of global identification.

試驗用的晶片ts的實裝結束的話,將支持基板Ws從載台21卸下,以未圖示的檢查裝置測定相對於各晶片ts的目標位置的實裝位置偏差。將以此方式取得到的,表示實裝線上的目標位置與相對於該目標位置的實裝位置偏差間的關係的相關資料,作為第2工具補正資料記憶於記憶部51。將該動作在左右實裝頭43的各實裝工具43a、43b個別進行,在每個實裝工具43a、43b取得第2工具補正資料。When the mounting of the test wafer ts is completed, the support substrate Ws is removed from the stage 21, and the mounting position deviation with respect to the target position of each wafer ts is measured by an inspection device not shown. The relevant data obtained in this way and indicating the relationship between the target position on the mounting line and the mounting position deviation with respect to the target position is stored in the memory 51 as the second tool correction data. This operation is performed individually for each mounting tool 43a, 43b of the left and right mounting heads 43, and the second tool correction data is acquired for each mounting tool 43a, 43b.

此外,設定的實裝間隔比晶片t的X方向尺寸還小時,例如實裝間隔為1mm,晶片ts的尺寸為4×4mm時,無法在實裝線上將晶片ts連續配置。在這種情形中,使支持基板Ws的位置在Y方向偏移,同時分為複數次將晶片ts沿著實裝線實裝即可。亦即,首先以比4mm還大的間隔將晶片ts沿著實裝線實裝。之後,使支持基板Ws的位置在Y方向以比4mm還大的距離移動。在該位置,相對於前次在X方向以每1mm的位置偏移,將晶片ts沿著實裝線實裝。重複該動作直到實裝間隔被填補完為止。In addition, the set mounting interval is smaller than the size of the wafer t in the X direction. For example, when the mounting interval is 1 mm and the size of the wafer ts is 4×4 mm, the wafer ts cannot be continuously arranged on the mounting line. In this case, the position of the support substrate Ws is shifted in the Y direction, and the wafer ts is mounted along the mounting line in plural times. That is, first, the wafer ts is mounted along the mounting line at an interval larger than 4 mm. After that, the position of the supporting substrate Ws is moved in the Y direction by a distance greater than 4 mm. At this position, the wafer ts is mounted along the mounting line with a position shift of 1 mm in the X direction from the previous time. Repeat this action until the installation gap is filled.

又,對於附有區域標記的試驗用的支持基板Ws以全域辨識方式實裝試驗用的晶片ts,利用基板辨識攝影機43f,辨識相對於實裝的晶片ts的實裝位置的位置偏差也可以。In addition, the test wafer ts may be mounted on the test support substrate Ws with the area mark by the global recognition method, and the position deviation with respect to the mounting position of the mounted wafer ts may be recognized by the substrate recognition camera 43f.

(實裝工具43a、43b的移動位置的補正) 說明關於實裝工具43a、43b的移動位置的補正。使各實裝工具43a、43b在實裝線上的實裝區域移動時,參照表示記憶於記憶部51的第2工具補正資料即實裝線上的目標位置與相對於該目標位置的實裝位置偏差之間的關係的相關資料,從對應該實裝區域的實裝位置偏差之值算出補正值。接著,僅以算出使實裝工具43a、43b移動至實裝區域時的實裝頭43的移動位置的補正值的分進行補正。此外,在第2工具補正資料之中,不存在一致於實裝區域的位置的目標位置時,將例如在實裝區域的位置鄰接的2個目標位置的實裝位置偏差,藉由一次式或多項式進行內插,算出對應實裝區域的位置的實裝位置偏差的補正值也可以。(Correction of the moving position of mounting tools 43a, 43b) The correction of the moving positions of the mounting tools 43a and 43b will be described. When moving each mounting tool 43a, 43b on the mounting area on the mounting line, refer to the second tool correction data stored in the memory unit 51, that is, the target position on the mounting line and the mounting position relative to the target position. Based on the data related to the relationship between the two, the correction value is calculated from the value of the mounting position deviation corresponding to the mounting area. Then, only the points for calculating the correction value of the movement position of the mounting head 43 when the mounting tools 43a, 43b are moved to the mounting area are corrected. In addition, in the second tool correction data, when there is no target position that coincides with the position of the mounting area, for example, the mounting position deviation of two target positions adjacent to the position of the mounting area is calculated by linear or The polynomial interpolation can be used to calculate the correction value of the mounting position deviation corresponding to the position of the mounting area.

[電子元件的實裝工程] 上述校正工程(1)~(3)之後,實施半導體晶片t等的電子部件的向支持基板W的實裝工程。[Installation process of electronic components] After the above-mentioned calibration process (1) to (3), the process of mounting electronic components such as the semiconductor wafer t on the support substrate W is performed.

(1)晶圓環11的搬入工程 首先,從未圖示的收納部將未使用的晶圓環11搬入晶圓環支架12,將晶圓環11固定至晶圓環支架12上。此時,如圖8所示,使設於左側的移載部30A的晶圓環保持裝置32的支持臂32a向圖示右方向移動,使夾持部32b向晶圓環11的保持位置移動。以該狀態,移動至2點鏈線所示的位置,把持收納部內的晶圓環11的後端部,使其移動至以實線所示的位置,藉此從收納部將晶圓環11拉出,使晶圓環11移動至晶圓環支架12上。若使晶圓環11位於晶圓環支架12上的話,解除夾盤部32b進行的晶圓環11的把持,使支持臂32a向圖示左方向移動而使夾持部32b向待機位置移動。位於晶圓環支架12上的晶圓環11,藉由部件供應部10具備的未圖示的伸展機構,將樹脂片S以拉伸的狀態保持。(1) Import process of wafer ring 11 First, the unused wafer ring 11 is carried into the wafer ring holder 12 from a storage portion not shown, and the wafer ring 11 is fixed to the wafer ring holder 12. At this time, as shown in FIG. 8, the support arm 32a of the wafer ring holding device 32 provided in the transfer portion 30A on the left side is moved to the right in the figure, and the clamping portion 32b is moved to the holding position of the wafer ring 11. . In this state, move to the position shown by the two-dot chain line, grasp the rear end of the wafer ring 11 in the storage portion, and move it to the position shown by the solid line, thereby removing the wafer ring 11 from the storage portion Pull out to move the wafer ring 11 to the wafer ring holder 12. If the wafer ring 11 is positioned on the wafer ring holder 12, the grip of the wafer ring 11 by the chuck portion 32b is released, the support arm 32a is moved to the left in the figure, and the clamp portion 32b is moved to the standby position. The wafer ring 11 located on the wafer ring holder 12 is held by a stretch mechanism (not shown) provided in the component supply unit 10 in a stretched state.

(2)支持基板W的設定工程 (2-1:支持基板W的供應) 藉由未圖示的搬送機器人保持的支持基板W被供應至載台21。未圖示的搬送機器人具備載置支持基板W並保持的搬送臂,讓支持基板W從實裝裝置1的左側通過左側的實裝部40A的支持框架41的門之下的空間搬入載台21上。將支持基板W供應至載台21上後,搬送臂從實裝裝置1上退避。支持基板W的供應工程與晶圓環11的搬入工程(1)並行地進行也可以,個別進行也可以。(2) Support the setting process of substrate W (2-1: Support the supply of substrate W) The support substrate W held by a transport robot (not shown) is supplied to the stage 21. The transport robot, not shown, is equipped with a transport arm for placing and holding a supporting substrate W, and the supporting substrate W is transferred from the left side of the mounting device 1 through the space under the door of the support frame 41 of the left mounting section 40A onto the stage 21 . After the support substrate W is supplied to the stage 21, the transfer arm is retracted from the mounting device 1. The supply process of the support substrate W and the loading process (1) of the wafer ring 11 may be performed in parallel, or may be performed separately.

(2-2:全域標記的檢出) 檢出載置於載台21上的支持基板W的全域標記,辨識支持基板W的位置。例如如圖9所示,支持基板W的4角部之中,將設於3個角部的全域標記A、B、C,依序利用左右的實裝頭43具備的基板辨識攝影機43進行攝像。具體來說,以位於支持基板W的左後方(圖9為左上)的全域標記A位在左側的實裝頭43的基板辨識攝影機43f的正下方的方式,使左側的實裝頭43與載台21相對移動,攝像全域標記A。接著,以位於支持基板W的右後方(圖9為右上)的全域標記B位在右側的實裝頭43的基板辨識攝影機43f的正下方的方式,使右側的實裝頭43與載台21相對移動,攝像全域標記B。最後,以位於支持基板W的右前方(圖9為右下)的全域標記C位在右側的實裝頭43的基板辨識攝影機43f的正下方的方式,使右側的實裝頭43與載台21相對移動,攝像全域標記C。基於攝像到的攝像影像檢出3個全域標記A、B、C的位置,基於檢出的3個全域標記A、B、C的位置求出支持基板W的XY方向的位置偏差與θ方向(水平旋轉方向)的位置偏差。支持基板W的位置偏差可以由各種公知的方法求出,並不特別限於該方法。(2-2: Checkout of global mark) The global mark of the supporting substrate W placed on the stage 21 is detected, and the position of the supporting substrate W is recognized. For example, as shown in FIG. 9, among the four corners of the support substrate W, the global marks A, B, and C provided at the three corners are sequentially captured by the substrate recognition cameras 43 provided in the left and right mounting heads 43. . Specifically, the global mark A located on the left rear of the support substrate W (upper left in FIG. 9) is positioned directly below the substrate recognition camera 43f of the mounting head 43 on the left, and the mounting head 43 on the left is connected to the mounting head 43. The stage 21 moves relatively, and the whole area is marked A. Next, the global mark B located on the right rear of the support substrate W (upper right in FIG. 9) is positioned directly below the substrate recognition camera 43f of the right mounting head 43, so that the right mounting head 43 and the stage 21 Relative movement, mark B of the whole camera. Finally, the global mark C located on the front right of the support substrate W (bottom right in FIG. 9) is positioned directly below the substrate recognition camera 43f of the mounting head 43 on the right, so that the mounting head 43 and the stage 21 Relative movement, mark C in the whole camera. Based on the captured image, the positions of the three global marks A, B, and C are detected. Based on the positions of the three global marks A, B, and C, the positional deviation in the XY direction and the θ direction ( Horizontal rotation direction) position deviation. The positional deviation of the support substrate W can be obtained by various known methods, and is not particularly limited to this method.

以下記載位置偏差的檢出方法的一例。在圖9中,實線表示實際載置於載台21上的支持基板W。二點鏈線表示在載台21上以無位置偏差的方式被載置的狀態的支持基板W。以二點鏈線記載的支持基板W為理想的狀態,此時的支持基板W的中心與載台21的中心位置O(x0,y0)一致。An example of how to detect positional deviation is described below. In FIG. 9, the solid line indicates the support substrate W actually placed on the stage 21. The two-dot chain line indicates the support substrate W in a state placed on the stage 21 without positional deviation. The support substrate W described by the two-dot chain line is an ideal state, and the center of the support substrate W at this time coincides with the center position O(x0, y0) of the stage 21.

首先,將設於支持基板W的3個全域標記A、B、C的位置利用公知的影像辨識技術檢出,從連結全域標記A、B的線分AB相對於X方向的傾斜θ1與連結全域標記B、C的線分BC相對於Y方向的傾斜θ2的平均值求出支持基板W的傾斜θ(=(θ1+θ2)/2)。接著,將載台21的中心位置O作為旋轉中心而以傾斜θ消失的方式使支持基板W假想地旋轉。該狀態在圖9以虛線表示。求出此時的位於對角的全域標記A、C的中點M1(x1,y1)的移動量(Δx1,Δy1)。將求出的移動量(Δx1,Δy1)和移動後的中點M2(x2,y2)與座標O間的差(Δx2,Δy2)的合計的值(Δx1+Δx2,Δy1+Δy2)作為支持基板W的XY方向的位置偏差求出。First, the positions of the three global marks A, B, and C provided on the support substrate W are detected by a known image recognition technology, and the line connecting the global marks A and B is divided into the inclination θ1 of AB with respect to the X direction and the connected global The average value of the inclination θ2 of the line components BC marked B and C with respect to the Y direction is the inclination θ (=(θ1+θ2)/2) of the support substrate W. Next, using the center position O of the stage 21 as the center of rotation, the support substrate W is virtually rotated so that the inclination θ disappears. This state is indicated by a broken line in FIG. 9. The amount of movement (Δx1, Δy1) of the midpoint M1 (x1, y1) of the global markers A and C located at the diagonal at this time is obtained. The total value (Δx1 + Δx2, Δy1 + Δy2) of the calculated movement amount (Δx1, Δy1) and the difference between the midpoint M2 (x2, y2) and the coordinate O after the movement (Δx2, Δy2) is used as the support substrate Calculate the positional deviation of W in the XY direction.

若算出載台21上的支持基板W的位置偏差的話,補正該位置偏差,同時使在支持基板W上最初實裝半導體晶片t的實裝區域的行位於實裝線上的方式使載台21移動。具體來說,使載台21移動至圖10所示的實線的位置,使位於支持基板W的最後方的實裝區域的行位在實裝線上。此外,在圖10中,為了方便將實裝線以一點鏈線表示。此時,用以使各實裝區域的行位於實裝線上的載台21的移動,基於補正由全域標記A、B、C的辨識取得到的支持基板W的位置偏差的資料、及記憶於記憶部51的載台補正資料進行補正。如同本實施形態,當載台21的XY移動機構22不具有θ載台(θ移動機構)時,支持基板W的傾斜藉由實裝頭43具備的θ調整機構,調整實裝的半導體晶片t的傾斜,藉此進行補正。If the positional deviation of the support substrate W on the stage 21 is calculated, the positional deviation is corrected, and the stage 21 is moved so that the row of the mounting area where the semiconductor wafer t is initially mounted on the support substrate W is located on the mounting line . Specifically, the stage 21 is moved to the position of the solid line shown in FIG. 10 so that the row of the mounting area located at the rear of the support substrate W is on the mounting line. In addition, in FIG. 10, the mounting line is represented by a dotted chain line for convenience. At this time, the movement of the stage 21 for positioning the rows of each mounting area on the mounting line is based on the data that corrects the positional deviation of the support substrate W obtained by the recognition of the global marks A, B, and C, and is stored in The stage correction data of the storage unit 51 is corrected. As in the present embodiment, when the XY moving mechanism 22 of the stage 21 does not have a θ stage (θ moving mechanism), the tilt of the support substrate W is adjusted by the θ adjustment mechanism provided in the mounting head 43 to adjust the mounted semiconductor wafer t The inclination of, to correct it.

(3)半導體晶片t的移載工程 (3-1:半導體晶片t的位置檢出) 晶圓環11保持於晶圓環支架12後,使在晶圓環11上最初被取出的半導體晶片t位於取出位置。取出位置設定在圖10所示的狀態的晶圓環支架12的中央。將晶圓環11上的半導體晶片t取出的順序,被預先記憶於記憶部51,控制部50依照該順序控制晶圓環支架12的移動。因此,取出最初的半導體晶片t後,晶圓環支架12依照記憶於記憶部51的順序使晶圓環11間距移動。(3) Transfer process of semiconductor wafer t (3-1: Position detection of semiconductor wafer t) After the wafer ring 11 is held by the wafer ring holder 12, the semiconductor wafer t that was first taken out on the wafer ring 11 is positioned at the take-out position. The take-out position is set at the center of the wafer ring holder 12 in the state shown in FIG. 10. The order of taking out the semiconductor wafer t on the wafer ring 11 is stored in the memory unit 51 in advance, and the control unit 50 controls the movement of the wafer ring holder 12 in accordance with the order. Therefore, after taking out the first semiconductor wafer t, the wafer ring holder 12 moves the wafer ring 11 pitch in accordance with the sequence memorized in the memory portion 51.

最初的半導體晶片t位於取出位置後,為了使該半導體晶片t、及與該半導體晶片t在X方向鄰接的下個取出的半導體晶片t,攝入左側的移載部30A的晶圓辨識攝影機38的攝像視野,而使Y方向移動區塊34與X方向移動體36移動。亦即,晶圓辨識攝影機38具備將保持於晶圓環11上的鄰接的2個半導體晶片t同時攝入的大小的攝像視野。設於該等半導體晶片t的一對角部的2個對準標記由晶圓辨識攝影機38進行攝像。基於攝像到的每個半導體晶片t的2個對準標記的位置,分別檢出各半導體晶片t的位置。最初取出的半導體晶片t的位置相對於取出位置發生偏差時,以補正該位置的方式使晶圓環支架12移動。After the first semiconductor wafer t is located at the take-out position, in order to make the semiconductor wafer t and the next taken-out semiconductor wafer t adjacent to the semiconductor wafer t in the X direction, the wafer identification camera 38 of the transfer section 30A on the left is taken in In the imaging field of view, the Y-direction moving block 34 and the X-direction moving body 36 are moved. That is, the wafer recognition camera 38 has an imaging field of view of a size that simultaneously captures two adjacent semiconductor wafers t held on the wafer ring 11. The two alignment marks provided on the pair of corners of the semiconductor wafers t are imaged by the wafer recognition camera 38. The position of each semiconductor wafer t is detected based on the position of the two alignment marks of each semiconductor wafer t that is imaged. When the position of the semiconductor wafer t taken out first is deviated from the take-out position, the wafer ring holder 12 is moved to correct the position.

此外,位於取出位置的半導體晶片t的位置偏差的檢出並沒有特別的限定,可以依照各種公知的方法實施。例如,從設於半導體晶片t上的對角位置的2個對準標記的攝像影像,利用公知的影像辨識技術檢出各對準標記的位置。從求出的標記的位置求出連結2個標記的線分的傾斜,比較該傾斜與連結預先記憶於記憶部51的無位置偏差的半導體晶片t中的連結標記間的線分的傾斜,將其差作為半導體晶片t的傾斜偏差檢出。又,將實際的對準標記間的中點位置與記憶於記憶部51的無位置偏差的半導體晶片t的對準標記間的中點的位置間的差作為半導體晶片t的XY方向的位置偏差求出。In addition, the detection of the positional deviation of the semiconductor wafer t located at the take-out position is not particularly limited, and can be carried out in accordance with various known methods. For example, from the captured images of two alignment marks provided at diagonal positions on the semiconductor wafer t, the position of each alignment mark is detected by a known image recognition technique. The inclination of the line connecting the two marks is obtained from the position of the obtained mark, and the inclination is compared with the inclination of the line connecting the connecting marks in the semiconductor wafer t stored in advance in the memory 51 without positional deviation, and the The difference is detected as the tilt deviation of the semiconductor wafer t. In addition, the difference between the actual midpoint position between the alignment marks and the midpoint position between the alignment marks of the semiconductor wafer t with no positional deviation stored in the memory portion 51 is taken as the positional deviation in the XY direction of the semiconductor wafer t Find out.

(3-2:半導體晶片t的取出) 辨識2個半導體晶片t的位置偏差後,將左側的移載頭37的左吸附噴嘴37a移動至位於取出位置的半導體晶片t的正上方。接著,使Z方向移動裝置37c驅動並使吸附噴嘴37a下降,使吸附噴嘴37a的吸附面抵接至半導體晶片t的上面(電極形成面)。吸附噴嘴37a抵接至半導體晶片t後,使半導體晶片t吸附保持至吸附噴嘴37a。在吸附噴嘴37a使吸附力作用的時機,在吸附噴嘴37a抵接至半導體晶片t前、抵接的同時、或抵接後,只要設定成適宜的時點都可以。(3-2: Taking out the semiconductor wafer t) After recognizing the positional deviation of the two semiconductor wafers t, the left suction nozzle 37a of the transfer head 37 on the left side is moved to directly above the semiconductor wafer t at the take-out position. Next, the Z-direction moving device 37c is driven to lower the suction nozzle 37a, and the suction surface of the suction nozzle 37a is brought into contact with the upper surface (electrode formation surface) of the semiconductor wafer t. After the suction nozzle 37a abuts on the semiconductor wafer t, the semiconductor wafer t is suction-held to the suction nozzle 37a. The timing at which the suction nozzle 37a exerts the suction force may be set to an appropriate timing before the suction nozzle 37a abuts on the semiconductor wafer t, simultaneously with the abutment, or after the abutment.

左吸附噴嘴37a吸附保持至半導體晶片t後,使吸附噴嘴37a上升至原來的高度。此時,一致於吸附噴嘴37a的上升而使未圖示的頂起機構作動,補助從樹脂片S的半導體晶片t剝離。吸附保持半導體晶片t的左吸附噴嘴37a上升至原來的高度後、或與該上升並行,在使下個半導體晶片t位於取出位置的同時,使右吸附噴嘴37b位於取出位置的正上方。在右吸附噴嘴37b也與左吸附噴嘴37a同樣進行半導體晶片t的取出。After the left suction nozzle 37a suctions and holds the semiconductor wafer t, the suction nozzle 37a is raised to the original height. At this time, in accordance with the upward movement of the suction nozzle 37a, an unshown push-up mechanism is actuated to assist the separation of the semiconductor wafer t from the resin sheet S. After the left suction nozzle 37a sucking and holding the semiconductor wafer t is raised to the original height, or in parallel with the raising, the next semiconductor wafer t is positioned at the take-out position and the right suction nozzle 37b is positioned directly above the take-out position. In the right suction nozzle 37b, the semiconductor wafer t is taken out in the same manner as the left suction nozzle 37a.

左側的移載頭37的左右吸附噴嘴37a、37b分別將半導體晶片t吸附保持後,藉由Y方向移動區塊34與X方向移動體36的移動,左側的移載頭37的左右吸附噴嘴37a、37b如圖10所示,位於中間載台31的載置部31a、31b上。以該狀態,使左右吸附噴嘴37a、37b下降,在載置部31a、31b上載置保持於左右吸附噴嘴37a、37b的半導體晶片t。After the left and right suction nozzles 37a and 37b of the transfer head 37 on the left suck and hold the semiconductor wafer t respectively, the left and right suction nozzles 37a of the transfer head 37 on the left are moved by the movement of the Y-direction moving block 34 and the X-direction moving body 36. , 37b is located on the placement portions 31a and 31b of the intermediate stage 31 as shown in FIG. In this state, the left and right suction nozzles 37a and 37b are lowered, and the semiconductor wafer t held by the left and right suction nozzles 37a and 37b is placed on the mounting portions 31a and 31b.

此外,在上述取出工程中,有應取出至位於取出位置的半導體晶片t的旁邊的半導體晶片t不存在的情形,也就是有位於取出位置的半導體晶片t為該半導體晶片t的所屬的行的終端的半導體晶片t的情形。在該情形中,位於次行的前頭的半導體晶片t成為應接著取出的半導體晶片t。該半導體晶片t位於能夠攝入晶圓辨識攝影機38的攝像視野的範圍時,同時攝像2個半導體晶片t。另一方面,不位於能夠攝入攝像視野的範圍時,個別攝像2個半導體晶片t。個別攝像時,下個(第2個)半導體晶片t的攝像,可以在進行位於取出位置的第1個半導體晶片t的取出之前進行,也可以在取出第1個半導體晶片t後進行。In addition, in the above-mentioned take-out process, there are cases where the semiconductor wafer t that should be taken out next to the semiconductor wafer t located at the take-out position does not exist, that is, the semiconductor wafer t located at the take-out position is the row of the semiconductor wafer t. In the case of terminal semiconductor wafer t. In this case, the semiconductor wafer t located at the head of the next row becomes the semiconductor wafer t to be taken out next. When the semiconductor wafer t is located in a range capable of taking in the imaging field of view of the wafer recognition camera 38, two semiconductor wafers t are simultaneously imaged. On the other hand, when it is not in the range where the imaging field of view can be captured, two semiconductor wafers t are separately captured. In the case of individual imaging, the imaging of the next (second) semiconductor wafer t may be performed before the removal of the first semiconductor wafer t located at the removal position, or may be performed after the removal of the first semiconductor wafer t.

(3-3:半導體晶片t的收授) 在中間載台31的載置部31a、31b上載置半導體晶片t後,左側的實裝部40A的實裝頭43向中間載台31移動,如圖11所示,使左右實裝工具43a、43b位於載置部31a、31b的上方位置。左右實裝工具43a、43b位於載置部31a、31b上後,驅動Z方向移動裝置43c、43d使實裝工具43a、43b下降,使實裝工具43a、43b分別抵接至半導體晶片t。實裝工具43a、43b抵接至半導體晶片t後,使半導體晶片t吸附保持至實裝工具43a、43b。該吸附保持的時機,在實裝工具43a、43b抵接至半導體晶片t前、抵接的同時、或抵接後,設定成適宜的時點都可以。實裝工具43a、43b將半導體晶片t吸附保持後,藉由Z方向移動裝置43c、43d使實裝工具43a、43b上升至原來的高度。藉此,同時以實裝工具43a、43b接收2個半導體晶片t。(3-3: Acceptance of semiconductor wafer t) After the semiconductor wafer t is placed on the placement portions 31a, 31b of the intermediate stage 31, the mounting head 43 of the left mounting portion 40A moves to the intermediate stage 31, and as shown in FIG. 11, the left and right mounting tools 43a, 43b is located above the placing parts 31a and 31b. After the left and right mounting tools 43a, 43b are positioned on the mounting portions 31a, 31b, the Z-direction moving devices 43c, 43d are driven to lower the mounting tools 43a, 43b, and the mounting tools 43a, 43b abut against the semiconductor wafer t, respectively. After the mounting tools 43a and 43b abut on the semiconductor wafer t, the semiconductor wafer t is sucked and held to the mounting tools 43a and 43b. The timing of this suction holding may be set to an appropriate time before the mounting tools 43a, 43b abut on the semiconductor wafer t, at the same time as the abutment, or after the abutment. After the mounting tools 43a and 43b suck and hold the semiconductor wafer t, the mounting tools 43a and 43b are raised to their original heights by the Z-direction moving devices 43c and 43d. Thereby, two semiconductor wafers t are simultaneously received by mounting tools 43a and 43b.

其中,與上述半導體晶片t的收授並行,進行右側的移載部30B所進行的,工程(3)的(3-1)及(3-2)。此時,關於右側的移載頭37也一樣,從外側的吸附噴嘴37a(因為與左側的移載頭37為左右反轉,為右側的吸附噴嘴37a)以內側的吸附噴嘴37b的順序進行半導體晶片t的取出。此外,移載部30從部件供應部10將半導體晶片t取出的取出位置,為單一位置。因此,左側的移載部30A進行的半導體晶片t的取出、與右側的移載部30B進行的半導體晶片t的取出會交互執行。Among them, in parallel with the transfer of the above-mentioned semiconductor wafer t, (3-1) and (3-2) of the process (3) are performed by the transfer section 30B on the right side. At this time, the same applies to the transfer head 37 on the right side. The suction nozzle 37a on the outer side (because the transfer head 37 on the left is inverted left and right, it is the suction nozzle 37a on the right side). Take out the wafer t. In addition, the take-out position where the transfer section 30 takes out the semiconductor wafer t from the component supply section 10 is a single position. Therefore, the removal of the semiconductor wafer t by the transfer portion 30A on the left and the removal of the semiconductor wafer t by the transfer portion 30B on the right are performed alternately.

(4)半導體晶片t的實裝工程 (4-1:半導體晶片t的位置檢出及移動) 實裝工具43a、43b接收半導體晶片t後,藉由配置於載置部31a、31b上方的攝像單元44的晶片辨識攝影機44a、44b,攝像吸附保持於實裝工具43a、43b的半導體晶片t。該攝像透過能透視實裝工具43a、43b的構件來進行。基於晶片辨識攝影機44a、44b的攝像影像,檢出吸附保持於實裝工具43a、43b的半導體晶片t的位置。該位置檢出能夠與上述工程(3)的(3-1)一樣用公知的影像辨識技術來實施。基於檢出的半導體晶片t的位置,求出半導體晶片t的位置偏差。(4) Mounting process of semiconductor wafer t (4-1: Position detection and movement of semiconductor wafer t) After the mounting tools 43a, 43b receive the semiconductor wafer t, the semiconductor wafer t held by the mounting tools 43a, 43b is picked up by the wafer recognition cameras 44a, 44b of the imaging unit 44 arranged above the mounting portions 31a, 31b. This imaging is performed through a member that can see through the mounting tools 43a and 43b. Based on the captured images of the wafer recognition cameras 44a and 44b, the position of the semiconductor wafer t sucked and held by the mounting tools 43a and 43b is detected. This position detection can be implemented using a known image recognition technology as in (3-1) of the above-mentioned process (3). Based on the detected position of the semiconductor wafer t, the positional deviation of the semiconductor wafer t is obtained.

此外,半導體晶片t的位置檢出在載置部31a、31b上進行也可以。此時,藉由辨識攝影機44a、44b進行半導體晶片t的攝像後,實裝工具43a、43b會吸附保持半導體晶片t。辨識攝影機44a、44b進行的半導體晶片t的攝像結束後,如圖12所示,實裝工具43a、43b朝向沿著X方向的位於實裝線上的支持基板W的實裝區域的行之上移動。In addition, the position detection of the semiconductor wafer t may be performed on the mounting portions 31a and 31b. At this time, after imaging the semiconductor wafer t by the recognition cameras 44a and 44b, the mounting tools 43a and 43b will suck and hold the semiconductor wafer t. After the imaging of the semiconductor wafer t by the recognition cameras 44a and 44b is completed, as shown in FIG. 12, the mounting tools 43a and 43b move above the row of the mounting area of the support substrate W on the mounting line along the X direction .

(4-2:半導體晶片t的實裝) 實裝頭43,在左右實裝工具43a、43b之中,首先在保持於左實裝工具43a的實裝半導體晶片t的實裝區域上,為了定位保持於左實裝工具43a的半導體晶片t而移動。此時,因為保持於左實裝工具43a的半導體晶片t,是最初實裝於支持基板W的半導體晶片t,在位於實裝線上的實裝區域的行之中,移動左實裝工具43a至位於最左側的實裝區域上。(4-2: Mounting of semiconductor wafer t) In the mounting head 43, among the left and right mounting tools 43a and 43b, the semiconductor wafer t held by the left mounting tool 43a is positioned on the mounting area of the mounting semiconductor wafer t held by the left mounting tool 43a. And move. At this time, because the semiconductor wafer t held by the left mounting tool 43a is the semiconductor wafer t that was initially mounted on the support substrate W, the left mounting tool 43a is moved to the row of the mounting area on the mounting line Located on the leftmost mounting area.

此時的移動位置,基於記憶於記憶部51的第1及第2工具補正資料、及以(4-1:半導體晶片t的位置檢出及移動)工程算出的半導體晶片t的位置偏差進行補正。又,在(2-2:全域標記的檢出)工程中,檢出支持基板W的傾斜θ時,就該傾斜θ也藉由實裝工具43a進行補正。之後,使實裝工具43a下降並將半導體晶片t實裝至支持基板W的所期望的實裝區域。The moving position at this time is corrected based on the first and second tool correction data stored in the memory 51 and the positional deviation of the semiconductor wafer t calculated in the (4-1: position detection and movement of semiconductor wafer t) process . In the (2-2: detection of global mark) process, when the inclination θ of the support substrate W is detected, the inclination θ is also corrected by the mounting tool 43a. After that, the mounting tool 43a is lowered, and the semiconductor wafer t is mounted to a desired mounting area of the support substrate W.

相對於支持基板W的半導體晶片t的接合,利用預先貼附至支持基板W的表面、或半導體晶片t的下面的黏著片及黏晶薄膜(Die Attach Film:DAF)等的黏著力進行。半導體晶片t的接合,預先在載台21設置加熱器,相對於被加熱的支持基板W將半導體晶片t加壓並實施也可以。加熱器內藏於實裝工具43a也可以。僅將半導體晶片t以預先設定的時間加壓後,解除半導體晶片t的吸附,使實裝工具43a上升至原來的高度。The bonding of the semiconductor wafer t with respect to the support substrate W is performed by the adhesive force of the adhesive sheet and die attach film (Die Attach Film: DAF) attached to the surface of the support substrate W or the underside of the semiconductor wafer t in advance. The bonding of the semiconductor wafer t may be performed by installing a heater on the stage 21 in advance, and pressing the semiconductor wafer t against the heated support substrate W. The heater may be built in the mounting tool 43a. After only the semiconductor wafer t is pressurized for a predetermined time, the suction of the semiconductor wafer t is released, and the mounting tool 43a is raised to the original height.

實裝工具43a進行的實裝結束後,首先在保持於右實裝工具43b的實裝半導體晶片t的實裝區域上,為了定位保持於右實裝工具43b的半導體晶片t,移動實裝頭43。保持於右實裝工具43b的半導體晶片t位於實裝區域上後,藉由與上述左實裝工具43a一樣的動作,對實裝區域實裝半導體晶片t。左右實裝工具43a、43b進行的半導體晶片t的實裝結束後的左側的實裝頭43,向中間載台31移動。After the mounting by the mounting tool 43a is completed, first move the mounting head in order to position the semiconductor wafer t held by the right mounting tool 43b on the mounting area of the semiconductor wafer t held by the right mounting tool 43b 43. After the semiconductor wafer t held by the right mounting tool 43b is positioned on the mounting area, the semiconductor wafer t is mounted on the mounting area by the same operation as the above-mentioned left mounting tool 43a. After the mounting of the semiconductor wafer t by the left and right mounting tools 43 a and 43 b is completed, the mounting head 43 on the left side moves to the intermediate stage 31.

其中,與上述半導體晶片t的實裝工程並行,進行左側的移載部30A進行的,工程(3)的(3-1)及(3-2)。因此,在左側的實裝頭43移動至中間載台31的載置部31a、31b上時,接著實裝的半導體晶片t成為載置於載置部31a、31b的狀態。因此,移動至中間載台31上的左側的實裝頭43,馬上從載置部31a、31b上接收半導體晶片t,再執行工程(4)的(4-1)及(4-2)。以後,到相對於支持基板W上的所有實裝區域的半導體晶片t的實裝結束為止重複進行該動作。Among them, in parallel with the mounting process of the semiconductor wafer t described above, (3-1) and (3-2) of the process (3) are performed by the transfer section 30A on the left. Therefore, when the mounting head 43 on the left side moves to the mounting portions 31a and 31b of the intermediate stage 31, the semiconductor wafer t subsequently mounted is placed on the mounting portions 31a and 31b. Therefore, the mounting head 43 moved to the left on the intermediate stage 31 immediately receives the semiconductor wafer t from the mounting portions 31a and 31b, and then executes (4-1) and (4-2) of the process (4). Thereafter, this operation is repeated until the mounting of the semiconductor wafer t in all the mounting regions on the support substrate W is completed.

即便在進行左側的實裝頭43的實裝工具43a、43b進行的半導體晶片t的實裝的正中途,在藉由右側的移載部30B對中間載台31的載置部31c、31d的半導體晶片t的移載結束的階段,開始右側的實裝部40B的實裝頭43進行的半導體晶片t的實裝。該動作,與左側的實裝部40A之例說明的上述工程(4)的(4-2)一樣。此外,關於右側的實裝頭43也一樣,從外側(因為與左側的實裝頭43為左右反轉,為右側)的實裝工具43a以內側的實裝工具43b的順序進行半導體晶片t的實裝。關於右側的實裝部40B進行的半導體晶片t的實裝也一樣,與左側的實裝部40A同樣,到相對於支持基板W上的所有實裝區域的半導體晶片t的實裝結束為止重複進行該動作。Even in the middle of the mounting of the semiconductor wafer t performed by the mounting tools 43a, 43b of the mounting head 43 on the left, when the mounting portions 31c, 31d of the intermediate stage 31 are opposed by the transfer portion 30B on the right At the stage when the transfer of the semiconductor wafer t is completed, the mounting of the semiconductor wafer t by the mounting head 43 of the mounting portion 40B on the right side starts. This operation is the same as (4-2) of the above process (4) described in the example of the mounting part 40A on the left. In addition, the same applies to the mounting head 43 on the right side. The mounting tool 43a from the outside (because it is inverted left and right from the mounting head 43 on the left, it is the right side) performs the semiconductor wafer t in the order of the mounting tool 43b on the inside. Real installation. The same is true for the mounting of the semiconductor wafer t performed by the mounting section 40B on the right side. Similar to the mounting section 40A on the left, it is repeated until the mounting of the semiconductor wafer t in all mounting areas on the support substrate W is completed. The action.

此時,左側的實裝部40A與右側的實裝部40B,將支持基板W上的區域在左右(X方向)分成2等分,分擔各自的區域進行半導體晶片t的實裝。因此,左側的實裝部40A的實裝頭43與右側的實裝部40B的實裝頭43,不只能夠交互進行上述工程(4)的(4-1)及(4-2),也能夠同時並行地進行。此外,在上述半導體晶片t的實裝中,也進行載台21的移動。亦即,左右實裝頭43在支持基板W的實裝區域實裝半導體晶片t時,以各實裝頭43的外側的實裝工具43a分別在實裝線上預先設定的定位置(以下,稱為「實裝位置」。)進行實裝的方式控制移動位置。At this time, the mounting portion 40A on the left and the mounting portion 40B on the right divide the area on the support substrate W into two equal parts on the left and right (X direction), and the respective areas are allocated to mount the semiconductor wafer t. Therefore, the mounting head 43 of the mounting section 40A on the left and the mounting head 43 of the mounting section 40B on the right can not only perform the above-mentioned process (4) (4-1) and (4-2) alternately, but also Simultaneously in parallel. In addition, in the mounting of the semiconductor wafer t described above, the movement of the stage 21 is also performed. That is, when the left and right mounting heads 43 mount the semiconductor wafer t in the mounting area of the support substrate W, the mounting tools 43a on the outside of each mounting head 43 are respectively set at predetermined positions on the mounting line (hereinafter referred to as Is the "mounting position".) The moving position is controlled by the method of mounting.

該實裝位置,相對於在例如位於原點位置的載台21以正規的位置關係載置的支持基板W,以如圖7的符號71A、71B所示的位置那樣設定。在本實施形態中,該2個實裝位置間的距離,設定成「實裝區域的配置間隔(中心間的距離)P的2倍的距離(2P)的整數倍(n倍)的距離」。該實裝位置間的距離(2P×n)成為近接間隔以上,且在其中因應支持基板W的實裝區域的配置狀態以距離(2P×n)變窄的方式設定。重要的是,在近接間隔以上且以最接近近接間隔的(2P×n)的值作為實裝位置間的距離設定較佳。這樣的話,因為各實裝頭43的外側的實裝工具43a進行的實裝位置被設定在實裝線上的定位置,載台21在位於支持基板W的實裝線上的實裝區域的行之中,以使藉由外側的實裝工具43a實裝半導體晶片t的實裝區域依序位於實裝位置的方式進行移動控制。當然,該移動控制以加上記憶於記憶部51的載台補正資料進行。This mounting position is set as a position indicated by reference numerals 71A and 71B in FIG. 7 with respect to the support substrate W placed in a regular positional relationship on the stage 21 located at the origin position, for example. In this embodiment, the distance between the two mounting positions is set to "a distance of an integer multiple (n times) of the distance (2P) that is twice the distance (2P) of the placement interval of the mounting area (the distance between centers) P" . The distance (2P×n) between the mounting positions becomes more than the close interval, and the distance (2P×n) is set so that the distance (2P×n) is narrowed in accordance with the arrangement state of the mounting area of the support substrate W. What is important is that it is better to set the distance between the mounting positions at the value of (2P×n) that is the closest to the close interval or more. In this case, because the mounting position performed by the mounting tool 43a on the outside of each mounting head 43 is set at a fixed position on the mounting line, the stage 21 moves in the mounting area on the mounting line supporting the substrate W Here, the movement control is performed so that the mounting area where the semiconductor chip t is mounted by the outer mounting tool 43a is sequentially located at the mounting position. Of course, this movement control is performed by adding the stage correction data stored in the memory unit 51.

更具體來說,首先載台21在位於實裝線上的支持基板W上的實裝區域的行之中,以使藉由左側的實裝頭43的外側的實裝工具43a最初實裝半導體晶片t的實裝區域依序位於左側的實裝位置的方式移動。在位於左側的實裝位置的實裝區域實裝半導體晶片t後,在該實裝區域的旁的實裝區域藉由左側的實裝頭43的內側(右)的實裝工具43b來實裝半導體晶片t。以內側的實裝工具在相鄰的實裝區域實裝半導體晶片t時的移動,如上述藉由實裝頭43的移動來進行。此時,藉由右側的實裝頭43的外側(右)的實裝工具43a最初將半導體晶片t實裝的實裝區域,因為位於右側的實裝位置,藉由外側(右)的實裝工具43a實裝半導體晶片t,接著藉由內側(右)的實裝工具43b實裝半導體晶片t。More specifically, first, the stage 21 is located in the row of the mounting area on the support substrate W on the mounting line, so that the semiconductor chip is initially mounted by the mounting tool 43a outside the mounting head 43 on the left. The mounting area of t moves in the order of the mounting position on the left. After the semiconductor chip t is mounted in the mounting area at the mounting position on the left, the mounting area next to the mounting area is mounted with the mounting tool 43b inside (right) of the mounting head 43 on the left Semiconductor wafer t. The movement when mounting the semiconductor wafer t with the inner mounting tool in the adjacent mounting area is performed by the movement of the mounting head 43 as described above. At this time, the mounting area where the semiconductor chip t is initially mounted by the mounting tool 43a on the outside (right) of the mounting head 43 on the right is located at the mounting position on the right. The tool 43a mounts the semiconductor wafer t, and then the semiconductor wafer t is mounted by the inner (right) mounting tool 43b.

藉由右側的實裝頭43的內側(左)的實裝工具43b實裝半導體晶片t的話,載台21在位於實裝線上的支持基板W上的實裝區域的行之中,以使藉由左實裝工具43a將第2個半導體晶片t實裝的實裝區域位於左側的實裝位置的方式移動。這樣的話,載台21藉由左右實裝工具43a使實裝半導體晶片t的實裝區域依序位於實裝位置。在進行左右實裝頭43的實裝工具43a、43b的一連串的半導體晶片t的實裝(4個半導體晶片t的實裝)之期間,支持基板W停止於一定的位置,在進行接下來的半導體晶片t的實裝(接下來4個半導體晶片t的實裝)之前,以支持基板W的下個實裝區域位於實裝位置的方式將支持基板W藉由載台21移動。此外,在上述校正工程(1)中,在左右實裝頭43的基板辨識攝影機43f進行的點標記的位置辨識結果中有偏差時,以補正該偏差分的方式移動。When the semiconductor chip t is mounted by the mounting tool 43b inside (left) of the mounting head 43 on the right, the stage 21 is located in the row of the mounting area on the support substrate W on the mounting line so that The left mounting tool 43a moves the mounting area where the second semiconductor wafer t is mounted to the mounting position on the left side. In this case, the stage 21 sequentially positions the mounting area for mounting the semiconductor chip t at the mounting position by the left and right mounting tools 43a. During the mounting of a series of semiconductor wafers t by the mounting tools 43a, 43b of the left and right mounting heads 43 (the mounting of 4 semiconductor wafers t), the support substrate W is stopped at a certain position, and the next Before the mounting of the semiconductor wafer t (the mounting of the next four semiconductor wafers t), the support substrate W is moved by the stage 21 so that the next mounting area of the support substrate W is located at the mounting position. In addition, in the above-mentioned correction process (1), if there is a deviation in the position recognition result of the dot mark by the board recognition cameras 43f of the left and right mounting heads 43, the movement is performed to correct the deviation.

(5)支持基板W的搬出及搬入工程 相對於支持基板W上的所有實裝區域半導體晶片t的實裝結束後,移載部30及實裝部40暫時停止,進行從半導體晶片t的實裝結束的支持基板W的載台21的搬出、及向新支持基板W的載台21上的搬入。從載台21的支持基板W的搬出,藉由與上述工程(2)說明的搬送機器人不同的搬送機器人進行。該搬送機器人,從實裝裝置1的右側通過右側的實裝部40B的支持框架41的門之下的空間使搬送臂侵入,接收載台21上的支持基板W後,通過支持框架41的門之下的空間將支持基板W搬出。搬出的支持基板W,被搬送至後述的密封工程S2。新的支持基板W與上述工程(2)一樣設定於載台21上。(5) Support the loading and unloading process of substrate W After the mounting of the semiconductor wafer t with respect to all the mounting areas on the support substrate W is completed, the transfer section 30 and the mounting section 40 are temporarily stopped, and the mounting of the support substrate W from the stage 21 of the support substrate W is completed. Unloading and loading onto the stage 21 that newly supports the substrate W. The carrying out of the support substrate W from the stage 21 is performed by a transport robot different from the transport robot described in the above process (2). The transfer robot intrudes from the right side of the mounting device 1 through the space under the door of the support frame 41 of the right mounting portion 40B, receives the support substrate W on the stage 21, and passes through one of the doors of the support frame 41 The space below will support the substrate W to be moved out. The carried out support substrate W is carried to the sealing process S2 described later. The new support substrate W is set on the stage 21 in the same manner as in the above-mentioned process (2).

(6)晶圓環11的交換工程 如同上述藉由對支持基板W重複進行半導體晶片t的實裝,當晶圓環11上的半導體晶片t沒了時,晶圓環11與新的晶圓環11交換。該交換與上述工程(1)一樣,使用設於左側的移載部30A的晶圓環保持裝置32進行。亦即,晶圓環11上的半導體晶片t沒有後,解除部件供應部10具備的伸展機構(未圖示)的晶圓環11的保持。之後,晶圓環保持裝置32以與工程(1)相反的動作將晶圓環11從晶圓環支架12上收納至收納部(未圖示)內,接著以工程(1)的動作將新晶圓環11從收納部供應至晶圓環支架12上。(6) Exchange project of wafer ring 11 As mentioned above, by repeatedly mounting the semiconductor wafer t on the support substrate W, when the semiconductor wafer t on the wafer ring 11 is gone, the wafer ring 11 is exchanged with a new wafer ring 11. This exchange is performed using the wafer ring holding device 32 provided in the transfer part 30A on the left side, as in the above-mentioned process (1). That is, after the semiconductor wafer t on the wafer ring 11 is gone, the holding of the wafer ring 11 by the stretching mechanism (not shown) included in the component supply unit 10 is released. After that, the wafer ring holding device 32 stores the wafer ring 11 from the wafer ring holder 12 into the storage portion (not shown) in the reverse operation of the process (1), and then moves the new wafer ring 11 in the process (1). The wafer ring 11 is supplied to the wafer ring holder 12 from the storage part.

如圖13所示,有在1個實裝區域MA實裝複數半導體晶片t1~t3的情形。在該種情形中,如同上述在第1個半導體晶片t1的實裝結束後,在部件供應部10設定搭載第2個半導體晶片t2的晶圓環11,在載台21上設定實裝完第1個半導體晶片t1的支持基板W。接著,藉由執行與上述動作相同的動作,對實裝第1個半導體晶片t1的各實裝區域MA依序進行第2個半導體晶片t2的實裝。以此方式,第2個半導體晶片t2被實裝至半導體晶片t1的已實裝的所有實裝區域MA後,在部件供應部10設定搭載第3個半導體晶片t3的晶圓環11,又在載台21設定已實裝完半導體晶片t1、t2的支持基板W,藉由同樣的動作進行第3個半導體晶片t3的實裝。以此方式,在支持基板W的各實裝區域MA實裝複數半導體晶片t1~t3。As shown in FIG. 13, there is a case where a plurality of semiconductor wafers t1 to t3 are mounted in one mounting area MA. In this case, as described above, after the mounting of the first semiconductor chip t1 is completed, the wafer ring 11 on which the second semiconductor chip t2 is mounted is set in the component supply section 10, and the mounting stage 21 is set to be completed. Support substrate W for one semiconductor wafer t1. Next, by performing the same operation as the above-mentioned operation, the mounting of the second semiconductor chip t2 is sequentially performed on each mounting area MA where the first semiconductor chip t1 is mounted. In this way, after the second semiconductor chip t2 is mounted on all the mounted mounting areas MA of the semiconductor chip t1, the wafer ring 11 on which the third semiconductor chip t3 is mounted is set in the parts supply unit 10, The stage 21 sets the support substrate W on which the semiconductor wafers t1 and t2 have been mounted, and the third semiconductor wafer t3 is mounted by the same operation. In this way, a plurality of semiconductor wafers t1 to t3 are mounted on each mounting area MA of the support substrate W.

在1個實裝區域MA實裝複數半導體晶片t1~t3時,如同上述將第1個半導體晶片t1實裝至所有支持基板W結束後,並不限於切換成第2個半導體晶片t2的實裝方法。例如,對1枚支持基板W結束實裝第1個半導體晶片t1後,將從部件供應部10供應的半導體晶片t切換成第2個半導體晶片t2也可以。第3個半導體晶片t3也一樣,對1枚支持基板W結束實裝第2個半導體晶片t2後,切換成第3個半導體晶片t3也可以。亦即,以支持基板W單位進行複數品種的半導體晶片t的實裝也可以。此時,因為到對1個支持基板W結束實裝所有品種的半導體晶片t為止未將支持基板W從載台21上卸下,能更加提升複數品種的半導體晶片t的實裝精度。When mounting a plurality of semiconductor wafers t1 to t3 in one mounting area MA, after mounting the first semiconductor wafer t1 on all support substrates W as described above, it is not limited to switching to the mounting of the second semiconductor wafer t2 method. For example, after completing the mounting of the first semiconductor wafer t1 on one support substrate W, the semiconductor wafer t supplied from the component supply unit 10 may be switched to the second semiconductor wafer t2. The same is true for the third semiconductor wafer t3. After the second semiconductor wafer t2 has been mounted on one support substrate W, it may be switched to the third semiconductor wafer t3. In other words, multiple types of semiconductor wafers t may be mounted in units of support substrate W. At this time, since the support substrate W is not removed from the stage 21 until the mounting of all types of semiconductor wafers t on one support substrate W is completed, the mounting accuracy of the plural types of semiconductor wafers t can be further improved.

在將上述各品種的半導體晶片t實裝至所有支持基板W的方法中,結束實裝第1品種的半導體晶片t1的支持基板W從載台21上暫時被搬出,實裝第2品種的半導體晶片t2時再載置到載台21上。因此,實裝第1品種的半導體晶片t1時、及實裝第2品種的半導體晶片t2時,在載台21上的支持基板W的位置有偏差,亦即載置位置產生偏差。即便有在載台21上偶然成為相同位置的情形,但大體上還是會偏差。雖說以全域辨識來辨識支持基板W的位置,但因辨識誤差等要因會有在支持基板W的辨識位置產生偏差的可能性。因此,推測僅因該部分會造成第1品種與第2品種間的相對位置精度降低。相對於此,將第1品種的半導體晶片t1與第2品種的半導體晶片t2,不從載台21將支持基板W移出而繼續實裝時,能夠防止因辨識誤差造成的位置偏差。因此,能夠提升第1品種與第2品種間的相對位置精度。In the method of mounting each type of semiconductor wafer t described above on all support substrates W, the support substrate W on which the semiconductor wafer t1 of the first type has been mounted is temporarily unloaded from the stage 21, and the semiconductor wafer of the second type is mounted. The wafer is then placed on the stage 21 at t2. Therefore, when the semiconductor wafer t1 of the first type is mounted and the semiconductor wafer t2 of the second type is mounted, the position of the support substrate W on the stage 21 is shifted, that is, the mounting position is shifted. Even if the same position is accidentally located on the stage 21, it will generally deviate. Although the position of the support substrate W is recognized by global recognition, there is a possibility of deviation in the recognition position of the support substrate W due to factors such as recognition errors. Therefore, it is estimated that only this part will cause the relative position accuracy between the first variety and the second variety to decrease. In contrast, when the semiconductor wafer t1 of the first type and the semiconductor wafer t2 of the second type are continuously mounted without removing the support substrate W from the stage 21, it is possible to prevent positional deviation due to identification errors. Therefore, the relative position accuracy between the first item and the second item can be improved.

在各支持基板W的複數實裝區域實裝的半導體晶片t不限於1品種。也可以將1個支持基板W區分成複數區域,在每個區域實裝不同品種的半導體晶片t。例如,在將支持基板W於Y方向二等分的單側半分的第1區域實裝A品種的半導體晶片ta,在剩下的半分的第2區域實裝B品種的半導體晶片tb也可以。從實裝A品種的半導體晶片ta的第1區域製造A品種的半導體封裝。從實裝B品種的半導體晶片tb的區域製造B品種的半導體封裝。The semiconductor wafer t mounted on the plural mounting regions of each support substrate W is not limited to one type. It is also possible to divide one support substrate W into a plurality of regions, and mount different types of semiconductor wafers t in each region. For example, the semiconductor wafer ta of type A may be mounted in the first area half-divided on one side of the support substrate W in the Y direction, and the semiconductor wafer tb of type B may be mounted in the second half-divided area. A type A semiconductor package is manufactured from the first area where the type A semiconductor wafer ta is mounted. The semiconductor package of type B is manufactured from the area where the semiconductor wafer tb of type B is mounted.

此時,A品種的半導體晶片ta與B品種的半導體晶片tb,因為在後工程中形成的再配線層的電路圖案不同,再配線形成用的曝光圖案也不同。因此,推測將半導體晶片ta、tb的實裝誤差以曝光工程進行補正會越來越困難。適用實施形態的實裝裝置及實裝方法時,在A品種的半導體晶片ta與B品種的半導體晶片tb之間,也能以高相對位置精度進行實裝。因此,也可以使相對於實裝A品種的半導體晶片ta的區域的曝光處理與相對於實裝B品種的半導體晶片tb的區域的曝光處理總括進行,能使生產效率提升。At this time, the semiconductor wafer ta of the A type and the semiconductor wafer tb of the B type have different circuit patterns for the rewiring layer formed in the post process, and therefore the exposure patterns for forming the rewiring are also different. Therefore, it is estimated that it will be more and more difficult to correct the mounting errors of the semiconductor wafers ta and tb by the exposure process. When the mounting apparatus and mounting method of the embodiment are applied, it is possible to perform mounting with high relative positional accuracy between the type A semiconductor wafer ta and the type B semiconductor wafer tb. Therefore, the exposure process for the area where the type A semiconductor wafer ta is mounted and the exposure process for the area where the type B semiconductor wafer tb is mounted can also be performed collectively, and the production efficiency can be improved.

在第1區域實裝A品種的半導體晶片ta,在第2區域實裝B品種的半導體晶片tb時,也有A品種的半導體晶片ta與B品種的半導體晶片tb的大小不同的情形等,A品種的實裝間距與B品種的實裝間距不同的情形。在這種情形中,在實裝A品種的半導體晶片ta時、及實裝B品種的半導體晶片tb時,藉由切換載台21的送量,能夠將複數品種的半導體晶片ta、tb良好地實裝至支持基板W的複數區域。同樣地,在支持基板W的第1區域實裝構成第1多重晶片封裝的C品種與D品種的半導體晶片的組合,在第2區域實裝構成第2多重晶片封裝的E品種與F品種的半導體晶片的組合也可以。在該等任一個實裝中,可以將每1品種的半導體晶片t分別在複數支持基板W進行實裝,也可以以支持基板W單位實裝複數品種的半導體晶片。該等具體的實裝工程如同前述。When mounting type A semiconductor wafer ta in the first area and mounting type B semiconductor wafer tb in the second area, there are cases where the size of type A semiconductor wafer ta and type B semiconductor wafer tb are different, etc., type A When the mounting pitch of the product is different from the mounting pitch of the B product. In this case, when mounting a semiconductor wafer ta of type A and when mounting a semiconductor wafer tb of type B, by switching the feed rate of the stage 21, the plurality of types of semiconductor wafers ta and tb can be successfully transferred. It is mounted to the plural areas of the support substrate W. Similarly, in the first area of the support substrate W, the combination of the semiconductor chips of the C type and the D type constituting the first multiple chip package is mounted, and the E type and the F type constituting the second multiple chip package are mounted in the second area A combination of semiconductor wafers is also possible. In any of these mountings, each type of semiconductor wafer t may be mounted on a plurality of supporting substrates W, or plural types of semiconductor wafers may be mounted on a supporting substrate W unit. These specific installation projects are as mentioned above.

此外,在該等情形中也一樣,支持基板W的全域標記的辨識最初進行1次即可,能在將半導體晶片t從實裝區域從第1區域移至第2區域時不必再度辨識支持基板W的全域標記就可以了。又,在載台21設置加熱器等將支持基板W加熱時,在先實裝半導體晶片t的第1區域後實裝的第2區域,將載台21的補正資料切換也可以。藉此,在第1區域實裝A品種的半導體晶片ta的期間,即便是對應支持基板W的第2區域的部分的熱膨脹量擴大時,因為能對應其,能夠將半導體晶片t(tb)的實裝精度維持在高精度。In addition, in these cases as well, the recognition of the global mark of the support substrate W may be performed once at first, and it is not necessary to recognize the support substrate W again when the semiconductor wafer t is moved from the mounting area from the first area to the second area. The global markup is fine. In addition, when a heater or the like is provided on the stage 21 to heat the support substrate W, the correction data of the stage 21 may be switched after the first area where the semiconductor wafer t is mounted first and then the second area where the semiconductor wafer t is mounted. Thereby, even when the amount of thermal expansion of the portion corresponding to the second area of the support substrate W increases during the mounting of the semiconductor wafer ta of the type A in the first area, the semiconductor wafer t(tb) can be The mounting accuracy is maintained at high precision.

以上述那種支持基板W單位進行複數品種的半導體晶片t的實裝時,作為部件供應部10使用帶式供應器的晶片供應機構,裝備對應複數品種的複數帶式供應器也可以。使用帶式供應器時,分別在左側的移載部30A及實裝部40A與右側的移載部30B及實裝部40B,在包夾部件供應部10的兩側裝備專用的晶片供應機構也可以。在這種情形,能夠相對於左右移載部30A、30B及實裝部40A、40B供應不同品種的半導體晶片t或不同組合的半導體晶片t。因此,在將上述支持基板W二分成二個區域來分別製造不相的半導體封裝時是有效的。When mounting plural types of semiconductor wafers t in units of the above-mentioned support substrate W, a wafer supply mechanism using tape feeders as the component supply unit 10 may be equipped with plural tape feeders corresponding to the plural types. When using a tape feeder, the transfer section 30A and mounting section 40A on the left and the transfer section 30B and mounting section 40B on the right are respectively equipped with dedicated wafer supply mechanisms on both sides of the package parts supply section 10. can. In this case, different types of semiconductor wafers t or different combinations of semiconductor wafers t can be supplied to the left and right transfer parts 30A, 30B and the mounting parts 40A, 40B. Therefore, it is effective when the above-mentioned support substrate W is divided into two regions to manufacture incompatible semiconductor packages.

上述1品種的半導體晶片t、或複數品種的半導體晶片t1、t2、t3或半導體晶片ta、tb等的實裝結束的支持基板W,被送至以下所示的後工程,藉此製作半導體封裝的那種封裝部件。亦即,半導體晶片的實裝結束的支持基板W,依序被送至密封工程及再配線層的形成工程。在密封工程中,實裝在支持基板W上的半導體晶片間的間隙由樹脂填充,藉此形成疑似面板或擬似晶圓。疑似面板或擬似晶圓被送至再配線層的形成工程。於再配線層的形成工程中,實施半導體晶圓的製程、印刷基板的製程、或顯示面板的製程中的電路形成工程,亦即光阻材料等的感光材的塗佈工程、感光材的曝光及顯影工程、蝕刻工程、離子注入工程、光阻的剝離工程等,藉由該等工程在疑似面板或擬似晶圓的半導體晶片上形成再配線層。形成再配線層的疑似面板或擬似晶圓被送至切割工程,在那裡藉由將疑似面板或擬似晶圓個片化,來製造半導體封裝的那種封裝部件。The supporting substrate W on which the mounting of the above-mentioned one type of semiconductor wafer t, or plural types of semiconductor wafers t1, t2, t3, or semiconductor wafers ta, tb, etc. is completed is sent to the following post process to produce a semiconductor package The kind of packaged components. That is, the support substrate W on which the mounting of the semiconductor wafer is completed is sent to the sealing process and the rewiring layer formation process in order. In the sealing process, the gap between the semiconductor wafers mounted on the support substrate W is filled with resin, thereby forming a pseudo panel or pseudo wafer. The suspected panel or pseudo-wafer is sent to the formation process of the rewiring layer. In the process of forming the rewiring layer, the process of forming semiconductor wafers, the process of printed substrates, or the process of circuit formation in the process of display panels, that is, the process of coating photosensitive materials such as photoresist materials, and the exposure of photosensitive materials And the development process, the etching process, the ion implantation process, the photoresist stripping process, etc., through these processes, the rewiring layer is formed on the semiconductor wafer that is suspected to be a panel or a wafer. The suspected panel or pseudo-wafer forming the rewiring layer is sent to the dicing process, where the suspected panel or pseudo-wafer is sliced into pieces to manufacture the kind of package components for semiconductor packaging.

因此,實施形態的封裝部件的製造方法,如圖14所示,具備:在支持基板W的複數實裝區域分別實裝電子部件的實裝工程S1、藉由將實裝於複數實裝區域的電子部件總括密封形成疑似晶圓或擬似面板的密封工程S2、藉由在疑似晶圓或擬似面板的電子部件上形成再配線層的再配線工程S3、將疑似面板或擬似晶圓切割製造封裝部件的切割工程S4。再配線工程S3具備:上述那種感光材的塗佈工程S31、感光材的曝光及顯影工程S32、蝕刻工程S33、離子注入工程S34、光阻的剝離工程S35等。實施形態的封裝體部件的製造方法中的電子部件的實裝工程,基於實施形態的電子部件的實裝方法來實施。在實施形態的封裝部件的製造方法中,實裝在支持基板W的各實裝區域的電子部件,如同上述是1個半導體晶片t也可以、是複數種半導體晶片或相同品種的複數半導體晶片也可以。電子部件的品種及數量沒有特別限制。Therefore, the manufacturing method of the package component of the embodiment, as shown in FIG. 14, includes: a mounting process S1 for mounting electronic components on a plurality of mounting areas of the support substrate W, by mounting them in the plural mounting areas Sealing process S2 of sealing the electronic components to form a suspected wafer or pseudo-panel. S3 of rewiring process by forming a rewiring layer on the electronic components of the suspected wafer or pseudo-panel, cutting the suspected panel or pseudo-panel to produce packaged components The cutting works S4. The rewiring process S3 includes the above-mentioned photosensitive material coating process S31, photosensitive material exposure and development process S32, etching process S33, ion implantation process S34, photoresist peeling process S35, and the like. The electronic component mounting process in the manufacturing method of the package component of the embodiment is implemented based on the electronic component mounting method of the embodiment. In the method of manufacturing the package component of the embodiment, the electronic components mounted on each mounting area of the support substrate W may be one semiconductor wafer t, plural types of semiconductor wafers, or plural semiconductor wafers of the same type as described above. can. The variety and quantity of electronic components are not particularly limited.

上述實施形態的實裝裝置1中,藉由分別具備2個實裝工具43a、43b的左右2個實裝頭43、43,在支持基板W上的複數實裝區域之中,相對於位在沿著X方向預先設定的實裝線上的幾個實裝區域將半導體晶片t實裝。此時,作為載台部20的載台移動機構的XY移動機構22進行的載台21的移動,利用預先取得而記憶在記憶部51中的,補正載台21的移動位置誤差的載台補正資料進行補正。又,作為左右實裝頭43的實裝頭移動機構的Y方向移動裝置41a及X方向移動裝置42a進行的在各實裝工具43a、43b的實裝線上的移動,利用:預先取得而記憶在記憶部51中的,作為補正每個實裝線上的左右實裝工具43a、43b的移動位置誤差的工具補正資料的第1工具補正資料、還有作為補正移動至實裝位置移動的實裝工具43a、43b進行的實裝時的位置誤差的工具補正資料的第2工具補正資料進行補正。In the mounting apparatus 1 of the above-mentioned embodiment, the two mounting heads 43, 43 on the left and the right are provided with two mounting tools 43a, 43b, respectively. Among the plural mounting areas on the support substrate W, the The semiconductor wafer t is mounted along several mounting areas on the mounting line preset in the X direction. At this time, the movement of the stage 21 by the XY movement mechanism 22 as the stage movement mechanism of the stage section 20 is performed by the stage correction which is obtained in advance and stored in the memory section 51 to correct the movement position error of the stage 21 The information is corrected. In addition, the movement of the Y-direction moving device 41a and the X-direction moving device 42a as the mounting head moving mechanism of the left and right mounting heads 43 on the mounting lines of the mounting tools 43a and 43b is used: obtained in advance and memorized in The memory 51 contains the first tool correction data as tool correction data for correcting the movement position errors of the left and right mounting tools 43a, 43b on each mounting line, and the mounting tool moved to the mounting position as a correction The second tool correction data of the tool correction data of the position error at the time of mounting performed by 43a and 43b is corrected.

藉此,左右實裝頭43,分別藉由2個實裝工具43a、43b,相對於支持基板W在實裝線上的不同位置個別實裝半導體晶片t時,也一樣能夠使相對於支持基板W上的各實裝區域的半導體晶片t的實裝誤差降低。又,藉由利用分別具備複數(2個)實裝工具43a、43b的左右實裝頭43在支持基板W的複數實裝區域實裝半導體晶片t,能夠達成1個半導體晶片t的實裝時間(作為實裝裝置1的1個半導體晶片t的實裝所需要的工時)降低。因此,能夠達成工時的降低與實裝精度的提升。Thereby, the left and right mounting heads 43, respectively, by means of two mounting tools 43a, 43b, respectively mount the semiconductor wafer t with respect to the support substrate W at different positions on the mounting line, the same can be applied to the support substrate W. The mounting error of the semiconductor wafer t in each mounting area above is reduced. In addition, by using the left and right mounting heads 43 respectively equipped with plural (2) mounting tools 43a and 43b to mount the semiconductor wafer t in the plural mounting regions of the support substrate W, the mounting time of one semiconductor wafer t can be achieved. (Man-hours required for the mounting of one semiconductor wafer t as the mounting device 1) are reduced. Therefore, reduction of man-hours and improvement of mounting accuracy can be achieved.

亦即,在實施形態的實裝裝置1中,左右實裝頭43分別具備2個的合計4個實裝工具43a、43b,通常在沿著實裝工具43a、43b的配置方向(X方向)設定的一定的實裝線上實裝半導體晶片t。因此,4個實裝工具43a、43b進行的實裝位置集中在一線上,在抑制基於實裝工具43a、43b的移動所需要的時間的實裝時間的增加的同時,能夠極力單純化用於實裝的移動時產生的各實裝工具43a、43b的移動位置誤差的產生圖案。藉此,藉由簡單的補正方法即能夠確保各實裝工具43a、43b的移動位置精度,能夠抑制實裝效率的降低,且提升半導體晶片t的實裝精度。That is, in the mounting device 1 of the embodiment, the left and right mounting heads 43 are provided with two mounting tools 43a, 43b in total, and they are usually set along the arrangement direction (X direction) of the mounting tools 43a, 43b. The semiconductor chip t is mounted on a certain mounting line. Therefore, the mounting positions performed by the four mounting tools 43a, 43b are concentrated on one line, and the increase in mounting time based on the time required for the movement of the mounting tools 43a, 43b can be suppressed, and the application can be simplified as much as possible. The pattern of the movement position error of each mounting tool 43a, 43b generated during the movement of mounting. Thereby, the movement position accuracy of each mounting tool 43a, 43b can be ensured by a simple correction method, the reduction of mounting efficiency can be suppressed, and the mounting precision of the semiconductor wafer t can be improved.

又,因為將載台21的移動位置誤差藉由載台補正資料進行補正,能使載台21以預先設定的移動量高精度地移動。藉此,能夠提高支持基板W的實裝區域的各行位於實裝線上時的定位精度。再來,在取得載台補正資料時,將在一個校正基板71上以等間隔設置的點標記72的位置利用設於左右實裝頭43的基板辨識攝影機43f在各別的定位置進行辨識。藉此,能掌握在相同載台21上的不同區域間的移動位置誤差之差,藉由左右實裝頭43,在載台21的不同位置(實裝線上的不同位置)進行半導體晶片t的實裝時也一樣能夠確保實裝精度。In addition, since the movement position error of the stage 21 is corrected by the stage correction data, the stage 21 can be moved with high precision by a preset movement amount. Thereby, the positioning accuracy when each row of the mounting area of the support substrate W is located on the mounting line can be improved. Furthermore, when obtaining stage correction data, the positions of the dot marks 72 provided at equal intervals on one calibration substrate 71 are recognized at respective fixed positions by the substrate recognition cameras 43f provided on the left and right mounting heads 43. Thereby, it is possible to grasp the difference in the movement position error between different areas on the same stage 21, and the left and right mounting heads 43 can perform the semiconductor wafer t at different positions of the stage 21 (different positions on the mounting line). The mounting accuracy can also be ensured during mounting.

因此,能夠同時達成±7μm以下的實裝精度及0.4秒以下的工時。其結果,相對於未在每個實裝區域設置位置檢出用的標記的支持基板W,能夠將包含半導體晶片t的電子部件以相互的間隔成為預先設定的間隔的方式高精度地實裝,而且能夠將在支持基板W上包含半導體晶片t的電子部件以高生產性實裝。亦即,藉由左右實裝部40A、40B同時並行的實裝,能達到在半導體晶片t的實裝所需工時的縮短,同時藉由在一定實裝線上的半導體晶片t的實裝與載台補正資料及工具補正資料的移動位置的補正,能夠同時達到實裝精度的提升效果及生產性的降低防止效果。Therefore, it is possible to achieve a mounting accuracy of ±7 μm or less and a man-hour of 0.4 seconds or less at the same time. As a result, it is possible to mount the electronic components including the semiconductor wafer t with a mutual interval to a predetermined interval with high precision, with respect to the support substrate W in which the mark for position detection is not provided in each mounting area. Furthermore, electronic components including the semiconductor wafer t on the support substrate W can be mounted with high productivity. That is, through the simultaneous and parallel mounting of the left and right mounting parts 40A and 40B, the man-hours required for the mounting of the semiconductor chip t can be shortened, and at the same time, the mounting and the mounting of the semiconductor chip t on a certain mounting line The correction of the movement position of the stage correction data and the tool correction data can simultaneously achieve the effect of improving the mounting accuracy and preventing the reduction of productivity.

例如,考慮不使載置支持基板W的載台21移動,使左右實裝頭43的實裝工具43a、43b在支持基板W上的各實裝區域依序移動,在實裝工具43a、43b側作成保護支持基板W上的全域的補正資料。此時,與在基板載台側作成補正資料的情形相比,需要膨大的補正資料,校正所需的時間長化。亦即,實裝工具43a、43b與基板載台21不同,在支持基板W上將半導體晶片t實裝的關係上,上下動機構成為必須。因此,當作成補正資料時,除了實裝頭移動機構的移動位置誤差以外,也要考慮因實裝工具43a、43b的上下動所引起的XY方向的位置偏差。For example, consider not moving the stage 21 on which the support substrate W is placed, and moving the mounting tools 43a and 43b of the left and right mounting heads 43 in the respective mounting areas on the support substrate W in order, and the mounting tools 43a and 43b The side prepares correction data for the entire area on the protection support substrate W. In this case, compared with the case where the correction data is created on the substrate stage side, the correction data needs to be enlarged, and the time required for the correction becomes longer. That is, the mounting tools 43a and 43b are different from the substrate stage 21, and the up-and-down mechanism is necessary for mounting the semiconductor wafer t on the support substrate W. Therefore, when used as the correction data, in addition to the movement position error of the mounting head moving mechanism, the position deviation in the XY direction caused by the up and down movement of the mounting tools 43a and 43b should also be considered.

在此,當在實裝頭側作成補正資料時,取得載台21的載台補正資料時使用的,在比3mm還短的間隔,例如以每1mm間距等的短間隔測定移動位置誤差應為必要。假如,相對於600mm×600mm的移動範圍以1mm間距測定移動位置偏差的話,以600點×600點即360000點的測定成為必要,與以3mm間距測定的情形(3mm間距為40000點)相比,測定部位成為9倍。因此,測定時間也成為9倍。例如,在實施形態的實裝裝置1中,載台補正資料的取得需要4~5小時左右的話,變得需要36~45小時。這並不實用。Here, when creating the correction data on the mounting head side, it is used when obtaining the stage correction data of the stage 21. At intervals shorter than 3mm, for example, the movement position error should be measured at short intervals such as 1mm pitch. necessary. If the displacement position deviation is measured at a pitch of 1mm with respect to a moving range of 600mm×600mm, a measurement of 600 points×600 points, that is, 360000 points is necessary. Compared with the case of measuring at a 3mm pitch (3mm pitch is 40,000 points), The measurement site becomes 9 times. Therefore, the measurement time also becomes 9 times. For example, in the mounting device 1 of the embodiment, if it takes about 4 to 5 hours to acquire the stage correction data, it takes 36 to 45 hours. This is not practical.

因此,左右的實裝頭43分別具備2個的合計4個的實裝工具43a、43b,具備通常在一定的實裝線上實裝半導體晶片t,同時將載台21的移動位置誤差以載台補正資料進行補正,且將實裝工具43a、43b的移動位置誤差以工具補正資料進行補正的構成的實施形態的實裝裝置1,得知能夠達成半導體晶片t的實裝精度的提升與半導體晶片t的實裝所需要的工時的縮短,達到高生產性且極為有效。Therefore, the left and right mounting heads 43 are equipped with two mounting tools 43a and 43b in total, and are generally equipped to mount the semiconductor wafer t on a certain mounting line, and at the same time, the movement position error of the stage 21 is adjusted to the stage The mounting device 1 of the embodiment constructed to correct the correction data and the movement position error of the mounting tools 43a, 43b with the tool correction data is able to achieve the improvement of the mounting accuracy of the semiconductor chip t and the semiconductor chip The man-hour required for t's mounting is shortened, achieving high productivity and being extremely effective.

其中,左右實裝頭43分別具備2個實裝工具43a、43b時,因為以1往復即能夠實裝2個半導體晶片t,與只具備1個實裝頭43的構成、及左右實裝頭43分別具備1個實裝工具的構成相比,能夠單純地縮短實裝頭43的總移動距離。這是在支持基板W以600×600mm或在其以上的方式進行大型化時,在基於實裝頭43的移動距離的縮短的工時縮短能有效作用。再來,在實施形態的實裝裝置1中,因為將左右實裝頭43的合計4個實裝工具43a、43b進行的實裝,在使支持基板W的實裝區域的行在一定的實裝線移動的狀態下實施,能夠將實裝頭43的移動距離又更縮短。Among them, when the left and right mounting heads 43 are equipped with two mounting tools 43a and 43b, two semiconductor wafers t can be mounted with one reciprocation. This is different from the configuration with only one mounting head 43 and the left and right mounting heads. Compared with the configuration in which each mounting tool 43 is provided with one mounting tool, the total moving distance of the mounting head 43 can be simply shortened. This is effective in shortening the man-hours based on the shortening of the moving distance of the mounting head 43 when the supporting substrate W is enlarged to 600×600 mm or more. Furthermore, in the mounting device 1 of the embodiment, since the mounting of the four mounting tools 43a, 43b of the left and right mounting heads 43 in total is performed, the rows of the mounting area of the support substrate W are fixed at a certain level. By implementing the mounting line moving state, the moving distance of the mounting head 43 can be further shortened.

又,即便左右實裝頭43分別具備2個實裝工具43a、43b,也將實裝位置作為一定的位置,使支持基板W的各實裝區域依序位於一定的實裝位置後,以左右實裝頭43交互進行半導體晶片t的實裝時,由一方的實裝頭實裝半導體晶片的期間,另一方的實裝頭待機。其中,即便各實裝頭備複數實裝工具,也無法將工時充分地縮短。再來,即將左右實裝頭43的實裝位置,分別在左右設定個別的實裝位置,到左右實裝頭43進行的半導體晶片的實裝結束為止,也無法使支持基板移動。在該情形中,也有產生實裝頭的待機時間之虞,阻害工時的縮短。Also, even if the left and right mounting heads 43 are equipped with two mounting tools 43a and 43b, the mounting position is taken as a fixed position, and the mounting areas of the support substrate W are sequentially positioned at the fixed mounting positions. When the mounting head 43 alternately performs mounting of the semiconductor wafer t, while the semiconductor wafer is mounted by one mounting head, the other mounting head stands by. Among them, even if each mounting head is equipped with a plurality of mounting tools, the man-hour cannot be sufficiently shortened. Furthermore, that is, the mounting positions of the left and right mounting heads 43 are individually set to the left and right, and the support substrate cannot be moved until the mounting of the semiconductor wafer by the left and right mounting heads 43 is completed. In this case, there is a possibility that the waiting time of the mounting head may occur, which prevents shortening of working hours.

在實施形態的實裝裝置1中,左右實裝頭43分別具備2個的合計4個實裝工具43a、43b,通常在一定的實裝線上實裝半導體晶片t,同時調整左右實裝頭43的間隔以左右實裝頭43同時實裝半導體晶片成為可能。又,以一方的實裝頭43的一方的實裝工具43a實裝半導體晶片t後,由另一方的實裝工具43b進行的半導體晶片t的實裝,藉由移動實裝頭43來實施。因此,能夠縮短或減少以左右的實裝頭43實裝半導體晶片t時的待機時間。亦即,左右實裝頭43分別具備的實裝工具43a、43b進行的半導體晶片t的實裝,能更有效率地實施。藉此,能夠有效率地實於合計4個實裝工具43a、43b進行的半導體晶片t等的電子部件的實裝,再來也能夠縮短作為實裝裝置1全體的工時。In the mounting apparatus 1 of the embodiment, the left and right mounting heads 43 are provided with two mounting tools 43a, 43b in total, and the semiconductor wafer t is usually mounted on a certain mounting line while adjusting the left and right mounting heads 43. It is possible to simultaneously mount semiconductor wafers by the left and right mounting heads 43 at the interval between the two. Furthermore, after the semiconductor wafer t is mounted by the one mounting tool 43a of the one mounting head 43, the mounting of the semiconductor wafer t by the other mounting tool 43b is implemented by moving the mounting head 43. Therefore, it is possible to shorten or reduce the waiting time when the semiconductor wafer t is mounted with the mounting heads 43 on the left and right. That is, the mounting of the semiconductor wafer t by the mounting tools 43a and 43b respectively provided in the left and right mounting heads 43 can be performed more efficiently. Thereby, it is possible to efficiently implement the mounting of electronic components such as the semiconductor wafer t by a total of four mounting tools 43a and 43b, and furthermore, it is possible to shorten the man-hours for the entire mounting device 1.

上述實施形態的實裝裝置1,如圖13所示,在1個實裝區域MA實裝複數種類的半導體晶片t1、t2、t3等情形、或實裝1種類或複數種類的半導體晶片t及二極體或電容等情形是有效的。如同前述,在1個實裝區域實裝複數種類的電子部件時,因為有產生在1個實裝區域(封裝)內的複數電子部件的相對位置偏差之虞,在曝光時修正於1個實裝區域(封裝)組入1個半導體晶片的單一晶片封裝所能適用的實裝誤差的技術在適用上是困難的。因此,有提高複數電子部件的實裝時的位置精度自體的必要。針對這點,實施形態的實裝裝置1因為能夠提高包含半導體晶片t的各個電子部件的實裝精度,即便在1個實裝區域內實裝複數電子部件時,也能夠提高在1個實裝區域內的複數電子部件的相對位置精度。The mounting apparatus 1 of the above-mentioned embodiment, as shown in FIG. 13, mounts plural types of semiconductor wafers t1, t2, t3, etc., or mounts one type or plural types of semiconductor wafers t, and the like in one mounting area MA. Situations such as diodes or capacitors are effective. As mentioned above, when multiple types of electronic components are mounted in one mounting area, the relative positional deviation of the plural electronic components in one mounting area (package) may occur. Therefore, it is corrected in one mounting area (package). It is difficult to apply the mounting error technology applicable to a single chip package in which one semiconductor chip is incorporated in the mounting area (package). Therefore, it is necessary to improve the positional accuracy during mounting of a plurality of electronic components. In response to this point, since the mounting device 1 of the embodiment can improve the mounting accuracy of each electronic component including the semiconductor wafer t, even when a plurality of electronic components are mounted in one mounting area, it can be improved in one mounting area. The relative position accuracy of multiple electronic components in the area.

此外,在上述實施形態中,說明對支持基板W在一定的實裝線上實裝半導體晶片t者。該一定的實裝線,可以設定在實裝裝置1中通常不會改變的Y方向上的相同位置者,例如,也可以是因應支持基板W的大小等條件在Y方向上可設定變更的位置。沿著X方向設定的實裝線,至少從成為實裝對象的電子部件的實裝開始到實裝結束之間,保持在一定的位置者即可以。In addition, in the above-mentioned embodiment, description has been given of mounting the semiconductor wafer t on the supporting substrate W on a certain mounting line. The certain mounting line can be set at the same position in the Y direction that does not normally change in the mounting device 1. For example, it can also be a position that can be set and changed in the Y direction according to conditions such as the size of the supporting substrate W. . The mounting line set along the X direction may be held at a certain position at least from the start of the mounting of the electronic component to be mounted to the end of the mounting.

又,在上述實施形態中,補正載台21的移動誤差的載台補正資料,在載台21的可移動範圍的全域取得也可以,至少在使支持基板W上的各實裝區域位於實裝位置時於載台21移動的範圍內取得即可。又,關於補正實裝工具43a、43b的移動位置誤差的工具補正資料也一樣,在實裝工具43a、43b的可移動範圍的全域取得也可以,至少在使支持基板W上的各實裝區域實裝半導體晶片t時於實裝工具43a、43b的移動的範圍內取得也可以。再來,載台補正資料及工具補正資料,也可以使用載台21的移動位置誤差及實裝工具43a、43b的移動位置誤差的實測值,也可以是抵消移動位置誤差的補正值等,將實測值加工者。主要是用以補正載台21及實裝工具43a、43b的移動位置誤差的資料即可。In addition, in the above embodiment, the stage correction data for correcting the movement error of the stage 21 may be acquired in the entire movable range of the stage 21, at least when each mounting area on the support substrate W is located in the mounting area. The position may be acquired within the range where the stage 21 moves. In addition, the tool correction data for correcting the movement position error of the mounting tools 43a, 43b can also be obtained in the entire movable range of the mounting tools 43a, 43b, at least in each mounting area on the support substrate W When the semiconductor wafer t is mounted, it may be acquired within the range of movement of the mounting tools 43a and 43b. Furthermore, the stage correction data and tool correction data can also use the actual measurement values of the movement position error of the stage 21 and the movement position error of the mounting tools 43a, 43b, or the correction value to offset the movement position error, etc. Measured value processor. The data is mainly used to correct the error of the moving position of the stage 21 and the mounting tools 43a, 43b.

在上述實施形態的實裝裝置1中,雖以在支持基板W上將半導體晶片t,以電極形成面(上面)朝上的狀態實裝的面朝上實裝之例作為主要說明,但不以此為限,在支持基板W上將半導體晶片t,以電極形成面朝下的狀態實裝的面朝下實裝也能適用。In the mounting apparatus 1 of the above-mentioned embodiment, although the semiconductor wafer t is mounted on the support substrate W with the electrode formation surface (upper surface) facing upward as an example of surface-up mounting as the main description, it is not Limiting this, it is also applicable to face-down mounting of the semiconductor wafer t on the support substrate W with the electrode formation face down.

以實施形態的實裝裝置1實於面朝下實裝時,不將以移載部30的吸附噴嘴37a、37b取出的半導體晶片t載置於中間載台31,而藉由反轉機構37e、37f使吸附噴嘴37a、37b上下反轉。以該狀態,在中間載台31上使吸附噴嘴37a、37b移動,從吸附噴嘴37a、37b將半導體晶片t收授至實裝部40的實裝工具43a、43b。When the mounting device 1 of the embodiment is mounted face-down, the semiconductor wafer t taken out by the suction nozzles 37a and 37b of the transfer part 30 is not mounted on the intermediate stage 31, and the reversing mechanism 37e , 37f reverses the suction nozzles 37a, 37b up and down. In this state, the suction nozzles 37a and 37b are moved on the intermediate stage 31, and the semiconductor wafer t is transferred from the suction nozzles 37a and 37b to the mounting tools 43a and 43b of the mounting section 40.

在實裝工具43a、43b收授半導體晶片t後的動作,能夠與上述工程(4)一樣而進行。此外,在實裝前的半導體晶片t的位置檢出,雖也能夠使用晶片辨識攝影機44a~44d,但將從下側攝像吸附保持於實裝工具43a、43b的半導體晶片t的攝影機,配置於中間載台31的附近、或取代中間載台31而配置也可以。為什麼呢?因為在面朝下接合中,半導體晶片t雖以電極形成面朝下的狀態吸附保持於實裝工具43a、43b,但因半導體晶片t的對準標記通常設於電極形成面,晶片辨識攝影機44a~44d無法攝像半導體晶片t的對準標記。The operation after receiving the semiconductor wafer t by the mounting tools 43a and 43b can be performed in the same manner as in the above-mentioned process (4). In addition, it is possible to use wafer recognition cameras 44a to 44d to detect the position of the semiconductor wafer t before mounting, but the camera that picks up the semiconductor wafer t held by the mounting tools 43a and 43b from the lower side is placed in The vicinity of the intermediate stage 31 or it may be arranged instead of the intermediate stage 31. why? In face-down bonding, although the semiconductor wafer t is held by the mounting tools 43a and 43b with the electrode forming surface facing down, the alignment mark of the semiconductor wafer t is usually provided on the electrode forming surface, and the wafer recognition camera 44a -44d cannot image the alignment mark of the semiconductor wafer t.

在這裡,設置以從下側攝像吸附保持於實裝工具43a、43b的半導體晶片t的攝影機的話,能夠直接攝像吸附保持於實裝工具43a、43b的半導體晶片t的對準標記。利用晶片辨識攝影機44a~44d時,在利用晶圓辨識攝影機38檢出半導體晶片t的對準標記的位置的階段,預先辨識對準標記與半導體晶片t的外形位置間的位置關係。接著,半導體晶片t被吸附保持於實裝工具43a、43b後,通過實裝工具43a、43b藉由晶片辨識攝影機44a~44d攝像半導體晶片t,基於從該攝像影像取得到的半導體晶片t的外形位置、和預先辨識到的對準標記與半導體晶片t的外形位置的位置關係,檢出吸附保持於實裝工具43a、43b的半導體晶片t的位置即可。Here, if a camera is installed to image the semiconductor wafer t sucked and held by the mounting tools 43a and 43b from below, it is possible to directly image the alignment marks of the semiconductor wafer t sucked and held by the mounting tools 43a and 43b. When the wafer recognition cameras 44a to 44d are used, when the wafer recognition camera 38 detects the position of the alignment mark of the semiconductor wafer t, the positional relationship between the alignment mark and the outer shape of the semiconductor wafer t is recognized in advance. Next, after the semiconductor wafer t is sucked and held by the mounting tools 43a, 43b, the semiconductor wafer t is imaged by the mounting tools 43a, 43b by the wafer recognition cameras 44a to 44d, based on the shape of the semiconductor wafer t obtained from the captured image The position and the positional relationship between the previously recognized alignment mark and the outer shape position of the semiconductor wafer t may be detected, and the position of the semiconductor wafer t sucked and held by the mounting tools 43a and 43b may be detected.

在上述實施形態中,雖說明在左右實裝頭43分別設置2個實裝工具43a、43b之例,但不限於此,實裝工具之數為3個以上也可以。但是,因為實裝工具之數變多會導致近接間隔變大,因應實裝半導體晶片t的支持基板W的大小設定較佳。在本實施形態例示的600×600mm的支持基板W中,相對於1個實裝頭43的實裝工具之數為2~3個較佳。In the above embodiment, an example in which two mounting tools 43a and 43b are respectively provided on the left and right mounting heads 43 has been described, but it is not limited to this, and the number of mounting tools may be three or more. However, since an increase in the number of mounting tools will increase the proximity interval, the size of the support substrate W on which the semiconductor chip t is mounted is preferably set. In the 600×600 mm supporting substrate W exemplified in this embodiment, the number of mounting tools relative to one mounting head 43 is preferably 2 to 3.

又,在上述實施形態中,說明作為第1實裝頭在左側配置1個實裝頭43,作為第2實裝頭在右側配置1個實裝頭43之例,但不限於此,在左右分別配置複數實裝頭43也可以。亦即,第1及第2實裝頭並非一定要分別以單一實裝頭構成,以複數實裝頭構成也可以。此時,複數實裝頭在Y方向排列配置,以能在XYZθ方向分別獨立移動的方式構成即可。此時,支持Y方向移動裝置41a的支持框架41,可以在複數實裝頭共用,在每個實裝頭個別設置也可以。Furthermore, in the above-mentioned embodiment, an example is described in which one mounting head 43 is arranged on the left side as the first mounting head and one mounting head 43 is arranged on the right side as the second mounting head. A plurality of mounting heads 43 may be arranged separately. That is, the first and second mounting heads do not necessarily have to be constituted by a single mounting head, but may be constituted by a plurality of mounting heads. At this time, the plural mounting heads are arranged side by side in the Y direction and configured to be able to move independently in the XYZθ directions. In this case, the support frame 41 supporting the Y-direction moving device 41a may be shared by a plurality of mounting heads, or may be provided separately for each mounting head.

再來,在上述實施形態中,支持基板W並不在每個實裝區域設置位置檢出用的標記,雖說明在封裝部件的製造工程的過程中除去者,但不限於此。根據實施形態的實裝裝置及實裝方法,例如在每個實裝區域具有位置檢出用的標記,即相對於作為封裝部件的一部分使用的那種基板,當然不用依賴位置檢出用的標記,也能高精度且高效率地實裝半導體晶片(電子部件)。 [實施例]Furthermore, in the above-mentioned embodiment, the support substrate W is not provided with a mark for position detection in each mounting area. Although it is described that it is removed during the manufacturing process of the package component, it is not limited to this. According to the mounting device and mounting method of the embodiment, for example, each mounting area has a mark for position detection, that is, relative to a substrate used as a part of a package component, of course, there is no need to rely on the mark for position detection. , Can also mount semiconductor wafers (electronic components) with high accuracy and efficiency. [Example]

接著,說明有關本發明的實施例及其評價結果。Next, examples of the present invention and evaluation results thereof will be described.

(實施例1) 利用上述實施形態的實裝裝置1,以以下的條件在支持基板上實際進行半導體晶片的實裝。目標實裝精度為±7μm以內,目標工時為0.45秒以內。 <實裝條件> ・半導體晶片t的大小:4mm×4mm ・實裝數(縱×橫):每1實裝頭為14個×7個(計98個) 每1實裝工具為7個×7個(計49個)×4實裝工具 ・實裝間距(縱×橫):每1實裝頭為12mm×60mm 每1實裝工具為24mm×60mm ・接合時間:0.1秒 ・接合荷重:5N(牛頓)(Example 1) Using the mounting apparatus 1 of the above-mentioned embodiment, the semiconductor wafer is actually mounted on the support substrate under the following conditions. The target mounting accuracy is within ±7μm, and the target man-hour is within 0.45 seconds. <Installation conditions> ・The size of semiconductor wafer t: 4mm×4mm ・Number of mountings (vertical × horizontal): 14 pcs x 7 pcs per 1 mounting head (98 pcs in total) Each 1 mounting tool is 7×7 (total 49)×4 mounting tool ・Mounting pitch (vertical×horizontal): 12mm×60mm per mounting head Each mounting tool is 24mm×60mm ・Joint time: 0.1 second ・Joint load: 5N (Newton)

圖15為假想地表示在支持基板W上設定的實裝區域。但是,在實際的支持基板W僅設置全域標記,無法辨視實裝區域。如圖15所示,在測定用的支持基板W上,相對於左右實裝頭43的各實裝工具43a、43b,分別設定在X方向7個位置、Y方向7個位置的49個實裝區域。將左側實裝頭43的左實裝工具43a的實裝區域以符號A1~A49、左側實裝頭43的右實裝工具43b的實裝區域以符號B1~B49、右側實裝頭43的左實裝工具43a的實裝區域以符號C1~C49、右側實裝頭43的右實裝工具43b的實裝區域以符號D1~D49表示。FIG. 15 is a virtual representation of the mounting area set on the support substrate W. As shown in FIG. However, only the global mark is provided on the actual support substrate W, and the mounting area cannot be seen. As shown in Fig. 15, on the support substrate W for measurement, 49 mounting tools 43a, 43b of the left and right mounting heads 43 are set at 7 positions in the X direction and 7 positions in the Y direction, respectively. area. Set the mounting area of the left mounting tool 43a of the left mounting head 43 with symbols A1 to A49, the mounting area of the right mounting tool 43b of the left mounting head 43 with symbols B1 to B49, and the left of the right mounting head 43 The mounting area of the mounting tool 43a is indicated by symbols C1 to C49, and the mounting area of the right mounting tool 43b of the right mounting head 43 is indicated by symbols D1 to D49.

又,與左右實裝頭43一同,左實裝工具43a的實裝區域以反白的四角(□)、右實裝工具43b的實裝區域以塗黑的四角(■)表示。在支持基板W的左半分的區域,設定左側實裝頭43的各實裝工具43a、43b的實裝區域,在右半分的區域設定右側實裝頭43的各實裝工具43a、43b的實裝區域。左右實裝工具43a、43b的實裝區域,以在X方向交互配置的方式設定。實裝區域的間隔設定成12mm。也就是說,關於X方向,將合計14個實裝區域以12mm間隔設定關於Y方向,以60mm間隔分別設定7個實裝區域。In addition, together with the left and right mounting heads 43, the mounting area of the left mounting tool 43a is indicated by the white corners (□), and the mounting area of the right mounting tool 43b is shown by the black corners (■). In the left half of the support substrate W, set the mounting area of each mounting tool 43a, 43b of the left mounting head 43, and set the mounting area of each mounting tool 43a, 43b of the right mounting head 43 in the right half.装区. The mounting areas of the left and right mounting tools 43a, 43b are set to be alternately arranged in the X direction. The interval between the mounting areas is set to 12mm. That is, regarding the X direction, a total of 14 mounting areas are set at 12 mm intervals. Regarding the Y direction, 7 mounting areas are set at 60 mm intervals.

如圖15所示,與左半部的區域及右半部的區域一同,將左上的實裝區域A1、C1作為開始點,在圖中虛線箭頭所示的X方向以折返的軌跡,藉由左右實裝工具43a、43b交互進行實裝。從各實裝頭43的實裝工具43a、43b吸附保持第1個半導體晶片t,左側的實裝工具43a朝向第1個實裝區域A1開始下降的時點,到右側的實裝工具43b在結束最後(第49個)的半導體晶片t的實裝並上升結束至原來的高度的時點為止的經過時間(將其稱為「實裝所需時間」。)為41.2秒。藉此,將實裝於支持基板W的98個半導體晶片t的實裝位置偏差利用檢查裝置進行測定。其結果顯示於表1。As shown in Fig. 15, together with the left half area and the right half area, the upper left mounting areas A1 and C1 are taken as the starting points, and the trajectory is turned back in the X direction indicated by the dotted arrow in the figure, by The left and right mounting tools 43a and 43b are mounted alternately. From the time when the mounting tools 43a and 43b of each mounting head 43 suck and hold the first semiconductor wafer t, the mounting tool 43a on the left side begins to descend toward the first mounting area A1, and the mounting tool 43b on the right side ends The elapsed time (referred to as the "mounting required time") until the time when the mounting and raising of the last (49th) semiconductor wafer t ended to the original height was 41.2 seconds. Thereby, the mounting position deviation of 98 semiconductor wafers t mounted on the support substrate W is measured by the inspection device. The results are shown in Table 1.

在表1中,將圖15的實裝區域的符號以英文字母與數字分別表示。亦即,對應實裝工具43a、43b的英文字母(A、B、C、D)作為表的列記載,數字作為表的行記載。將各實裝區域中的半導體晶片t的向X方向及Y方向的位置偏差量在每個實裝工具43a、43b表示。此外,單位為微米[μm]。在各實裝工具43a、43b的半導體晶片t的實裝位置偏差的資料之下,分別記載每個實裝工具43a、43b的位置偏差的平均值、最小值、最大值、最大值與最小值的寬度、σ值、3σ值,在其右側記載將所有實裝位置偏差的資料作為對象的同值。In Table 1, the symbols of the mounting area in FIG. 15 are represented by English letters and numbers, respectively. That is, the English letters (A, B, C, D) corresponding to the mounting tools 43a and 43b are described as the columns of the table, and the numbers are described as the rows of the table. The amount of positional deviation in the X direction and the Y direction of the semiconductor wafer t in each mounting area is shown for each mounting tool 43a, 43b. In addition, the unit is micrometer [μm]. Under the data of the mounting position deviation of the semiconductor wafer t of each mounting tool 43a, 43b, record the average, minimum, maximum, maximum, and minimum of the position deviation of each mounting tool 43a, 43b, respectively The width, σ value, and 3σ value of, the same value for all mounting position deviation data is recorded on the right side.

Figure 02_image001
Figure 02_image001

如表1所示,半導體晶片t的X方向的位置偏差的最大值,為右側實裝頭43的右實裝工具43b造成的實裝區域編號D1的3.1μm,最小值為右側實裝頭43的左實裝工具43a造成的實裝區域編號C35的-3.3μm。又,Y方向的位置偏差的最大值,為左側實裝頭43的右實裝工具43b造成的實裝區域編號B2的3.2μm,最小值為右側實裝頭43的右實裝工具43b造成的實裝區域編號D43的-2.8μm。確認到196個半導體晶片t的實裝精度,都在目標的±7μm以內。因實裝所需時間為41.2秒,1個半導體晶片t的實裝所需要的時間為41.2秒/98個=0.42秒。因此,工時為0.42秒,每1小時的生產數為約8570個(=3600秒/0.42秒)。As shown in Table 1, the maximum value of the positional deviation in the X direction of the semiconductor wafer t is 3.1 μm of the mounting area number D1 caused by the right mounting tool 43b of the right mounting head 43, and the minimum value is the right mounting head 43 The mounting area number C35 caused by the left mounting tool 43a is -3.3μm. In addition, the maximum value of the position deviation in the Y direction is 3.2 μm of the mounting area number B2 caused by the right mounting tool 43b of the left mounting head 43, and the minimum value is caused by the right mounting tool 43b of the right mounting head 43 The mounting area number D43 is -2.8μm. It was confirmed that the mounting accuracy of 196 semiconductor wafers t was within ±7μm of the target. Since the time required for mounting is 41.2 seconds, the time required for mounting one semiconductor wafer t is 41.2 seconds/98 pieces=0.42 seconds. Therefore, the working hours are 0.42 seconds, and the number of production per hour is about 8570 (=3600 seconds/0.42 seconds).

(比較例1) 除了不使用載台補正資料及工具補正資料,以與實施例1相同的條件將半導體晶片t實裝至支持基板W的各實裝區域。將實裝於支持基板W的196個半導體晶片t的實裝位置偏差利用檢查裝置進行測定的結果顯示於表2。(Comparative example 1) Except that the stage correction data and tool correction data are not used, the semiconductor wafer t is mounted on each mounting area of the support substrate W under the same conditions as in the first embodiment. Table 2 shows the results of the measurement of the mounting position deviation of the 196 semiconductor wafers t mounted on the support substrate W with the inspection device.

Figure 02_image003
Figure 02_image003

如表2所示,半導體晶片t的X方向的位置偏差的最大值,為左側實裝頭43的右實裝工具43b造成的實裝區域編號B7的8.8μm,最小值為右側實裝頭43的左實裝工具43a造成的實裝區域編號C43的-27.0μm。Y方向的位置偏差的最大值,為右側實裝頭43的左實裝工具43a造成的實裝區域編號C23的23.7μm,最小值為右側實裝頭43的左實裝工具43a造成的實裝區域編號C45的-22.7μm。在比較例1中,確認到半導體晶片t的實裝精度完全無法滿足在目標的±7μm以內。As shown in Table 2, the maximum value of the positional deviation in the X direction of the semiconductor wafer t is 8.8 μm of the mounting area number B7 caused by the right mounting tool 43b of the left mounting head 43, and the minimum value is the right mounting head 43 The mounting area number C43 caused by the left mounting tool 43a is -27.0μm. The maximum value of the position deviation in the Y direction is 23.7μm of the mounting area number C23 caused by the left mounting tool 43a of the right mounting head 43, and the minimum value is the mounting caused by the left mounting tool 43a of the right mounting head 43 Area number C45 is -22.7μm. In Comparative Example 1, it was confirmed that the mounting accuracy of the semiconductor wafer t was completely insufficient to be within ±7 μm of the target.

此外,雖已說明了本發明的幾個實施形態,但該等實施形態僅作為例示,並沒有限定本發明的範圍的意圖。該等新穎的實施形態,也可以利用其他的各種形態來實施,在不脫離發明要旨的範圍內,可以進行各種省略、置換、變更。該等實施形態及其變形,在包含於發明的範圍及要旨中的同時,也包含申請專利範圍中所記載之發明及其均等範圍。In addition, although several embodiments of the present invention have been described, these embodiments are merely examples and are not intended to limit the scope of the present invention. These novel embodiments can also be implemented in various other forms, and various omissions, substitutions, and changes can be made without departing from the scope of the invention. These embodiments and their modifications are not only included in the scope and summary of the invention, but also include the invention described in the scope of patent application and its equivalent scope.

1‧‧‧實裝裝置 10‧‧‧部件供應部 11‧‧‧晶圓環 12‧‧‧晶圓環支架 20‧‧‧載台部 21‧‧‧載台 22‧‧‧XY移動機構 30,30A,30B‧‧‧移載部 31‧‧‧中間載台 37‧‧‧移載頭 40,40A,40B‧‧‧實裝部 41‧‧‧支持框架 41a‧‧‧Y方向移動裝置 42a‧‧‧X方向移動裝置 43‧‧‧實裝頭 43a,43b‧‧‧實裝工具 43c,43d‧‧‧Z方向移動裝置 43f‧‧‧基板辨識攝影機 44‧‧‧攝像單元 44a,44b,44c,44d‧‧‧晶片辨識攝影機 50‧‧‧控制部 51‧‧‧記憶部 W‧‧‧支持基板 t‧‧‧半導體晶片 T‧‧‧半導體晶圓1‧‧‧Installation device 10‧‧‧Parts Supply Department 11‧‧‧Wafer Ring 12‧‧‧Wafer ring holder 20‧‧‧Stage Department 21‧‧‧ Stage 22‧‧‧XY moving mechanism 30, 30A, 30B‧‧‧Transfer Department 31‧‧‧Intermediate stage 37‧‧‧Transfer head 40, 40A, 40B‧‧‧Installation Department 41‧‧‧Support Framework 41a‧‧‧Y direction moving device 42a‧‧‧X direction moving device 43‧‧‧Mounting head 43a, 43b‧‧‧Mounting tools 43c, 43d‧‧‧Z direction moving device 43f‧‧‧Substrate recognition camera 44‧‧‧Camera unit 44a, 44b, 44c, 44d‧‧‧ chip recognition camera 50‧‧‧Control Department 51‧‧‧Memory Department W‧‧‧Support substrate t‧‧‧Semiconductor chip T‧‧‧Semiconductor wafer

[圖1] 表示實施形態的實裝裝置的平面圖。 [圖2] 表示實施形態的實裝裝置的正視圖。 [圖3] 表示實施形態的實裝裝置的右側視圖。 [圖4] 表示實施形態的實裝裝置的構成的區塊圖。 [圖5] 表示實施形態的實裝裝置的實裝工具進行的實裝動作的組合的圖。 [圖6] 表示實施形態的實裝裝置中的基板載台及實裝工具的校正工程的準備工程的圖。 [圖7] 表示實施形態的實裝裝置中的基板載台及實裝工具的校正工程的圖。 [圖8] 表示實施形態的實裝裝置的動作狀態的一例的平面圖,表示交換晶圓環的動作狀態的圖。 [圖9] 用以說明實施形態的實裝裝置中的基板載台的移動位置誤差的補正方法的圖。 [圖10] 表示實施形態的實裝裝置的動作狀態的一例的平面圖,表示左右的移載頭及左右的實裝頭分別位於不同位置的狀態的圖。 [圖11] 表示實施形態的實裝裝置的正視圖,將部件供應部與左右的移載部省略表示的圖。 [圖12] 表示實施形態的實裝裝置的正視圖,將部件供應部與移載部全體省略表示的圖。 [圖13] 表示使用實施形態的實裝裝置在1個實裝區域實裝的電子部件的一例的平面圖。 [圖14] 表示實施形態的封裝部件的製造工程的流程圖。 [圖15] 表示使用實施例1及比較例1的實裝裝置實裝半導體晶片的支持基板的平面圖。[Fig. 1] A plan view showing the mounting device of the embodiment. [Fig. 2] A front view showing the mounting device of the embodiment. [Fig. 3] A right side view showing the mounting device of the embodiment. [Fig. 4] A block diagram showing the configuration of the mounting device of the embodiment. [Fig. 5] A diagram showing a combination of mounting operations performed by a mounting tool of the mounting device of the embodiment. [FIG. 6] A diagram showing the preparation process of the calibration process of the substrate stage and the mounting tool in the mounting device of the embodiment. [Fig. 7] A diagram showing a calibration process of the substrate stage and the mounting tool in the mounting device of the embodiment. [Fig. 8] A plan view showing an example of the operation state of the mounting device of the embodiment, and a diagram showing the operation state of an exchange wafer ring. [Fig. 9] A diagram for explaining the method of correcting the error in the moving position of the substrate stage in the mounting device of the embodiment. [FIG. 10] A plan view showing an example of the operating state of the mounting device of the embodiment, and a view showing a state where the left and right transfer heads and the left and right mounting heads are located at different positions. [Fig. 11] A front view showing the mounting device of the embodiment, with the parts supply unit and the left and right transfer units omitted. [Fig. 12] A front view showing the mounting device of the embodiment, with the parts supply unit and the transfer unit abbreviated as a whole. [Fig. 13] A plan view showing an example of electronic components mounted in one mounting area using the mounting device of the embodiment. [Fig. 14] A flowchart showing the manufacturing process of the package component of the embodiment. [FIG. 15] A plan view showing a support substrate for mounting a semiconductor wafer using the mounting devices of Example 1 and Comparative Example 1.

1‧‧‧實裝裝置 1‧‧‧Installation device

1a‧‧‧基底部 1a‧‧‧Base

10‧‧‧部件供應部 10‧‧‧Parts Supply Department

11‧‧‧晶圓環 11‧‧‧Wafer Ring

12‧‧‧晶圓環支架 12‧‧‧Wafer ring holder

20‧‧‧載台部 20‧‧‧Stage Department

21‧‧‧載台 21‧‧‧ Stage

22‧‧‧XY移動機構 22‧‧‧XY moving mechanism

30,30A,30B‧‧‧移載部 30, 30A, 30B‧‧‧Transfer Department

31‧‧‧中間載台 31‧‧‧Intermediate stage

31a~31d‧‧‧載置部 31a~31d‧‧‧Placement part

32‧‧‧晶圓環保持裝置 32‧‧‧Wafer ring holding device

32a‧‧‧支持臂 32a‧‧‧Support arm

32b‧‧‧夾持部 32b‧‧‧Clamping part

33‧‧‧Y方向移動裝置 33‧‧‧Y direction moving device

34‧‧‧Y方向移動區塊 34‧‧‧Move block in Y direction

35‧‧‧支持體 35‧‧‧Support

36‧‧‧X方向移動體 36‧‧‧X-direction moving body

37‧‧‧移載頭 37‧‧‧Transfer head

37a、37b‧‧‧吸附噴嘴 37a, 37b‧‧‧Adsorption nozzle

37c、37d‧‧‧移動裝置 37c, 37d‧‧‧Mobile device

37e、37f‧‧‧反轉機構 37e、37f‧‧‧Reversing mechanism

38‧‧‧晶圓辨識攝影機 38‧‧‧Wafer Identification Camera

40,40A,40B‧‧‧實裝部 40, 40A, 40B‧‧‧Installation Department

41‧‧‧支持框架 41‧‧‧Support Framework

41a‧‧‧Y方向移動裝置 41a‧‧‧Y direction moving device

42‧‧‧頭支持體 42‧‧‧Head support

42a‧‧‧X方向移動裝置 42a‧‧‧X direction moving device

43‧‧‧實裝頭 43‧‧‧Mounting head

43a,43b‧‧‧實裝工具 43a, 43b‧‧‧Mounting tools

43c,43d‧‧‧Z方向移動裝置 43c, 43d‧‧‧Z direction moving device

43f‧‧‧基板辨識攝影機 43f‧‧‧Substrate recognition camera

44‧‧‧攝像單元 44‧‧‧Camera unit

44a,44b,44c,44d‧‧‧晶片辨識攝影機 44a, 44b, 44c, 44d‧‧‧ chip recognition camera

44e、44f‧‧‧一對XY移動裝置 44e, 44f‧‧‧A pair of XY mobile devices

44g‧‧‧攝影機支持框架 44g‧‧‧Camera support frame

50‧‧‧控制部 50‧‧‧Control Department

s‧‧‧樹脂片 s‧‧‧resin sheet

t‧‧‧半導體晶片 t‧‧‧Semiconductor chip

T‧‧‧半導體晶圓 T‧‧‧Semiconductor wafer

W‧‧‧支持基板 W‧‧‧Support substrate

Claims (5)

一種在支持基板實裝電子部件的電子部件的實裝裝置,具備:載台部,其具備:載置具有實裝前述電子部件的複數實裝區域的前述支持基板的載台、及在與沿著水平方向的一方向的X方向垂直的Y方向使前述載台移動的載台移動機構;實裝部,其具備:沿著前述X方向配置且分別具有保持前述電子部件的複數實裝工具的第1及第2實裝頭、及藉由前述複數實裝工具使保持前述電子部件的前述第1及第2實裝頭分別獨立移動,同時在沿著前述X方向設定的實裝線上移動的實裝頭移動機構;第1辨識部,其辨識載置於前述載台上的前述支持基板的全體位置;第2辨識部,其辨識保持於前述第1及第2實裝頭的前述複數實裝工具的前述電子部件的位置;記憶部,其記憶有:補正前述載台移動機構造成的前述載台的移動位置誤差的載台補正資料、及補正前述實裝頭移動機構造成的前述實裝線上的前述第1及第2實裝頭的在每個前述複數實裝工具的移動位置誤差的工具補正資料;控制部,其基於由前述第1辨識部辨識到的前述支持基板的位置資料、及記憶於前述記憶部的前述載台補正資 料,以將前述支持基板中的沿著前述X方向的前述實裝區域之列,在沿著前述X方向設定的前述實裝線上依序配置的方式,控制使前述載台移動的前述載台移動機構的動作,且基於由前述第2辨識部辨識到的保持於前述複數實裝工具的前述電子部件的位置資料、及記憶於前述記憶部的前述工具補正資料,以在配置於前述實裝線的前述支持基板的前述實裝區域之列的複數前述實裝區域,將前述電子部件以前述第1及第2實裝頭分擔實裝的方式,控制使前述第1及第2實裝頭移動機構的動作。 An electronic component mounting device for mounting electronic components on a support substrate includes: a stage portion including: a stage for mounting the support substrate having a plurality of mounting regions for mounting the electronic components, and A stage moving mechanism that moves the stage in the X direction, which is one of the horizontal directions, and the Y direction perpendicular to it; a mounting section including: a plurality of mounting tools that are arranged along the X direction and each have a plurality of mounting tools for holding the electronic components The first and second mounting heads, and the first and second mounting heads that hold the electronic components by the plurality of mounting tools move independently, and at the same time move on the mounting line set along the X direction Mounting head moving mechanism; a first recognition unit that recognizes the entire position of the support substrate placed on the stage; a second recognition unit that recognizes the plurality of real positions of the first and second mounting heads The position of the aforementioned electronic component of the mounting tool; the memory unit, which memorizes: the stage correction data for correcting the movement position error of the aforementioned stage caused by the aforementioned stage moving mechanism, and the correction of the aforementioned mounting caused by the aforementioned mounting head moving mechanism Online tool correction data of the movement position error of the first and second mounting heads in each of the plural mounting tools; the control unit based on the position data of the support substrate recognized by the first recognition unit, And the aforementioned carrier correction data stored in the aforementioned memory part The material, in a manner that the rows of the mounting areas along the X direction in the support substrate are sequentially arranged on the mounting line set along the X direction, and the stage that moves the stage is controlled The operation of the moving mechanism is based on the position data of the electronic components held in the plurality of mounting tools recognized by the second recognition unit and the tool correction data stored in the memory unit, so as to be placed on the mounting The plurality of the mounting areas in the row of the mounting area of the support substrate of the line, the first and second mounting heads share the mounting of the electronic components, and the first and second mounting heads are controlled The movement of the moving mechanism. 如請求項1記載的實裝裝置,其中,前述載台具有能載置前述支持基板的大小,該支持基板具有在前述第1及第2實裝頭的於前述X方向上位於外側的前述實裝工具彼此的近接間隔的2倍以上的前述X方向的尺寸。 The mounting device according to claim 1, wherein the stage has a size that can place the support substrate, and the support substrate has the actual position outside in the X direction of the first and second mounting heads. The dimension in the X direction that is at least twice the distance between the close proximity of the tools. 如請求項1記載的實裝裝置,其中,前述載台具有能載置前述支持基板的大小,該支持基板具有300mm以上的前述X方向的尺寸。 The mounting device according to claim 1, wherein the stage has a size capable of placing the support substrate, and the support substrate has a size of 300 mm or more in the X direction. 如請求項1至請求項3中任1項記載的實裝裝置,其中,前述實裝部在前述支持基板的1個前述實裝區域實裝複數前述電子部件。 The mounting device according to any one of claims 1 to 3, wherein the mounting section mounts a plurality of the electronic components in one of the mounting areas of the support substrate. 如請求項1至請求項3中任1項記載的實裝裝置,更具 備:部件供應部,其供應前述電子部件;移載部,其具備:分別從前述部件供應部接收前述電子部件,將前述電子部件收授至前述第1或第2實裝頭的前述複數實裝工具的第1及第2移載噴嘴。 For example, the actual installation device described in any one of claim 1 to claim 3 is more Prepared by: a component supply unit that supplies the aforementioned electronic components; a transfer unit, which includes: the aforementioned plural realities that receive the aforementioned electronic components from the aforementioned component supply unit and deliver the aforementioned electronic components to the aforementioned first or second mounting head, respectively The first and second transfer nozzles for tools.
TW108130627A 2017-08-01 2018-07-24 Electronic device mounting device and mounting method, and package component manufacturing method TWI698952B (en)

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