TWI648421B - 使用MoOC1<sub>4</sub>之CVD Mo沈積 - Google Patents
使用MoOC1<sub>4</sub>之CVD Mo沈積 Download PDFInfo
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Abstract
本發明描述一種在一基板上形成一含鉬材料之方法,其中在氣相沈積條件下將該基板與四氯氧化鉬(MoOCl4
)蒸氣接觸以在該基板上沈積該含鉬材料。在各項實施方案中,可採用該基板之二硼烷接觸以建立用於(例如)藉由諸如脈衝CVD之化學氣相沈積(CVD)技術之鉬之後續塊狀沈積之有利成核條件。
Description
本發明係關於含鉬材料之氣相沈積。特定言之(但非唯一地),本發明係關於使用四氯氧化鉬(MoOCl4)作為用於此沈積之一前驅體。
由於極高熔點、低熱膨脹係數、低電阻率及高導熱性之其特性,鉬愈來愈多地用於製造半導體裝置,包含用於擴散障壁、電極、光罩、電力電子基板、低電阻率閘極及互連件中。
此利用已激發用以達成用於特性在於經沈積膜之高保形性及高沈積速率之此等應用之鉬膜之沈積以適應有效高體積製造操作之努力。此繼而已通知用以開發可用於氣相沈積操作中之經改良鉬源試劑以及利用此等試劑之經改良程序流程之努力。
五氯化鉬最常用作用於含鉬材料之化學氣相沈積之鉬源。然而,仍需要達成具有更高沈積速率之含鉬材料之沈積來適應有效高體積製造操作。
本發明係關於含鉬材料之氣相沈積,且更具體言之,係關於使用四氯氧化鉬(MoOCl4)作為用於此氣相沈積之一源試劑,以及採用四氯氧化鉬(MoOCl4)作為一源試劑之程序及裝置。
在一個態樣中,本發明係關於一種在一基板上形成一含鉬材料之方法,其包括在氣相沈積條件下將該基板與四氯氧化鉬(MoOCl4)蒸氣接觸以在該基板上沈積該含鉬材料。
在各項實施利中,本發明係關於一種在一基板上形成一含鉬材料之方法,其包括:在接觸條件下將該基板與二硼烷接觸,從而在該基板上建立成核表面;及藉由利用四氯氧化鉬(MoOCl4)前驅體之一氣相沈積程序而在該成核表面上沈積鉬以在該基板上產生該含鉬材料。
自後續描述及隨附發明申請專利範圍將更完全明白本發明之其他態樣、特徵及實施例。
圖1係四氯氧化鉬之熱重量分析(TGA)之一圖表。
圖2係包括根據本發明之一實施例沈積之含鉬材料之一半導體裝置結構之一示意性橫截面正視圖。
圖3展示繪示來自實例1之結果之四氯氧化鉬(MoOCl4)/氫(H2)沈積曲線。
圖4係針對根據實例1之藉由一MoOCl4/H2程序之鉬之沈積之依據厚度而變化之電阻率之一圖表。
圖5及圖6係根據實例2形成之一經沈積鉬膜之掃描電子顯微照片(SEM)影像。
圖7係針對根據實例3之藉由一MoOCl4/H2程序之鉬之沈積之依據沈積時間而變化之鉬厚度之一圖表。
圖8係針對根據實例4之藉由一MoOCl4/H2程序進行之鉬沈積之依據鉬厚度而變化之膜電阻率之一圖表。
圖9係針對根據實例5之鉬沈積之比較依據運行數目而變化之沈積速率之一圖表。
圖10係根據實例6比較依據鉬膜厚度而變化之經沈積鉬膜之膜電阻率之一圖表。
圖11係繪示來自實例7之結果之依據二硼烷浸泡時間而變化之鉬膜厚度之一圖表。
圖12及圖13係實例8中形成之膜沈積之SEM顯微照片。
圖14係針對根據實例10之一沈積程序之依據二硼烷浸泡時間而變化之鉬厚度及電阻率之一圖表。
圖15係針對根據實例11之一沈積程序之依據MoOCl4/H2曝露時間而變化之鉬厚度及電阻率之一圖表。
圖16係根據實例12沈積之鉬膜之一SEM影像。
圖17係根據實例12沈積之鉬膜之一SEM橫截面影像。
圖18係根據實例13之依據階段溫度而變化之鉬厚度及電阻率之一圖表,其展示針對不使用二硼烷成核之MoOCl4/H2程序之一反應速率限制體系。
圖19係根據實例13之依據階段溫度而變化之鉬厚度及電阻率之一圖表,其展示針對使用二硼烷成核之MoOCl4/H2程序之一反應速率限制體系。
圖20係針對如不使用成核(△)進行及如使用成核(○)進行之MoOCl4/H2反應之活化能之一阿瑞尼氏(Arrhenius)圖(K=Ae-Ea/RT)。
本發明係關於鉬之氣相沈積,且係關於(例如)在其中期望具有優越保
形性及效能性質之鉬膜之半導體裝置之製造中使用四氯氧化鉬(MoOCl4)用於此沈積。
根據本發明,已發現四氯氧化鉬(MoOCl4)在諸如化學氣相沈積之氣相沈積程序中提供具有一高保形特性之低電阻率、高沈積速率膜。
本發明係關於在一基板上形成一含鉬材料之一方法之一個態樣,其包括在氣相沈積條件下將基板與四氯氧化鉬(MoOCl4)蒸氣接觸以在基板上沈積含鉬材料。
已發現,在本發明之各項實施例中,使用四氯氧化鉬(MoOCl4)作為用於含鉬材料在基板上之氣相沈積之一前驅體可提供如由橫截面掃描電子顯微成像技術判定之一驚人的高程度之保形性,接近100%之保形性。有利地,(MoOCl4)、四氯氧化鉬(MoOCl4)之沈積可按高於五氯化鉬(MoCl5)之沈積之速率進行。此外,驚人地,儘管在四氯氧化鉬(MoOCl4)之結構中存在氧,然含鉬材料可具有低電阻率及氧含量。
在各項實施例中,方法包括在基板上建立一成核表面且基板與四氯氧化鉬(MoOCl4)蒸氣之該接觸包括將基板之成核表面與四氯氧化鉬(MoOCl4)蒸氣接觸以在基板上沈積含鉬材料。
一成核表面可有利地促成低電阻率含鉬材料在較低溫度下在基板上之沈積。
在基板上建立成核表面可適合地包括將基板與二硼烷蒸氣且視情況分開地與四氯氧化鉬(MoOCl4)蒸氣接觸。有利地,建立成核表面可包括將基板與二硼烷蒸氣且分開地與四氯氧化鉬(MoOCl4)蒸氣接觸之複數個循環。在各項實施例中,氮化鈦層與二硼烷蒸氣之接觸在自300℃至450℃之一範圍中之溫度下進行。
有利地,可脈衝氣相沈積條件。已發現,此可改良沈積之階梯覆蓋率。適合地,經脈衝沈積之「脈衝」及「清除」時間可各獨立地在自1秒至20秒之範圍中。
在各項實施例中,蒸氣條件經選擇使得經沈積含鉬材料具有至多20μΩ‧cm,視情況至多15μΩ‧cm之一電阻率。
適合地,可在自400℃至750℃之範圍中、或在自400℃至600℃之範圍中或在自400℃至575℃之範圍中之一(階段)溫度下沈積含鉬材料。適合地,可在自450℃至750℃之範圍中、或在自450℃至600℃之範圍中或在自450℃至575℃之範圍中之一(階段)溫度下沈積含鉬材料。適合地,可在自500℃至750℃之範圍中、或在自500℃至600℃之範圍中或在自500℃至575℃之範圍中之一(階段)溫度下沈積含鉬材料。
在各項實施例中,氣相沈積條件包括一惰性氛圍,除了存在一選用還原劑(諸如氫)之情況之外。適合地,可在實質上缺乏其他金屬蒸氣之情況下沈積四氯氧化鉬(MoOCl4)蒸氣。
方法可包括使四氯氧化鉬(MoOCl4)揮發以形成用於氣相沈積操作之四氯氧化鉬(MoOCl4)蒸氣。氣相沈積條件可具有任何適合類型,且可(例如)包括一還原環境,使得含鉬材料包括元素鉬材料。含鉬材料可包括元素鉬或氧化鉬或其他含鉬材料,或替代地由或基本上由元素鉬或氧化鉬或其他含鉬材料組成。
本發明之方法中利用之基板可具有任何適合類型,且可(例如)包括一半導體裝置基板,例如,矽基板、二氧化矽基板或其他矽基基板。在各項實施例中,基板可包括TiN、Mo、MoC、B、SiO2、W及WCN之一或多者。
有利地,(例如)在諸如二氧化矽之氧化物基板或替代地矽或多晶矽基板之情況中,基板可經處理或製造以在其上包含用於隨後經沈積材料之一障壁層(例如,氮化鈦)。舉例來說,基板可包括氮化鈦層上之一成核層,其中含鉬材料在附屬程序流程序列中沈積於成核層上。
此一成核層或表面可(例如)藉由脈衝CVD或ALD或其他氣相沈積技術形成,且此一成核層之形成可藉由將氮化鈦層與二硼烷蒸氣且分開地與四氯氧化鉬(MoOCl4)蒸氣接觸而實行。可交替地且重複地實行各別的二硼烷蒸氣及四氯氧化鉬(MoOCl4)蒸氣接觸步驟達如用以形成具有所要厚度之成核層所期望之數目個循環。用於此成核層形成之程序條件可包括任何適合所要溫度、壓力、流率及其他程序條件。在各項實施例中,在自300℃至450℃之一範圍中之溫度下進行氮化鈦層與二硼烷蒸氣之接觸。在各項實施例中,在自400℃至575℃之一範圍或如上文針對(MoOCl4)氣相沈積定義之另一範圍中之溫度下進行氮化鈦層與四氯氧化鉬(MoOCl4)蒸氣之接觸。
在藉由將一基板與二硼烷蒸氣且分開地與四氯氧化鉬(MoOCl4)蒸氣接觸而形成一成核層之後,可將含鉬材料沈積於成核層上以形成元素鉬或氧化鉬或其他含鉬化合物或組合物之一塊狀沈積。
在各項實施例中,在自400℃至575℃之一範圍或如上文針對(MoOCl4)氣相沈積定義之另一範圍中之溫度下將含鉬材料沈積於成核層或表面上。可實行程序使得氣相沈積條件產生元素鉬之沈積作為在基板之成核層上含鉬材料。氣相沈積條件可具有任何適合特性,且可(例如)包括存在氫或其他還原氣體,以在成核層上形成元素鉬之一塊狀層。
更一般言之,根據本發明之在一基板上形成一含鉬材料之廣泛方法
可包括包括氫或其他還原氣體之存在之氣相沈積條件。可在存在或缺乏氫之情況下將含鉬材料沈積於障壁層或成核層或表面上。舉例而言,障壁層可由氮化鈦構成,且氮化鈦層可在存在氫之情況下與四氯氧化鉬(MoOCl4)蒸氣接觸。
應瞭解,可以許多替代方式且在廣泛各種程序條件下實行本發明之方法。可(例如)在用於在基板上製造一半導體裝置之一程序中實行本發明之方法。半導體裝置可具有任何適合類型,且可(例如)包括一DRAM裝置、3-D NAND裝置或其他裝置或裝置前驅體結構。在各項實施例中,基板可包括其中沈積含鉬材料之一通孔。通孔可(例如)具有在自20:1至30:1之一範圍中之深度對橫向尺寸之一縱橫比。
根據本發明之用於沈積含鉬材料之程序化學過程可包含元素鉬Mo(0)藉由反應MoOCl4+3H2→Mo+4HCl+H2O之沈積。如上文描述般藉由將基板與二硼烷及MoOCl4連續接觸以形成成核層而形成之一成核層或表面可涉及2MoOCl4+B2H6→2Mo+2BOCl+6HCl之形成反應。
根據本發明之方法沈積之含鉬材料之特性可在於任何適當評估度量及參數,諸如含鉬材料之沈積速率、經沈積含鉬材料之膜電阻率、經沈積含鉬材料之膜形態、經沈積含鉬材料之膜應力、材料之階梯覆蓋率及適當程序條件之程序窗或程序包絡。可採用任何適當評估度量及參數來特性化經沈積材料且將經沈積材料與特定程序條件相關以實現對應半導體產品之大量生產。
在各項實施例中,本發明係關於一種在一基板上形成一含鉬材料之方法,其包括:在接觸條件下將基板與二硼烷接觸,從而在基板上建立成核表面;及藉由利用四氯氧化鉬(MoOCl4)前驅體之一氣相沈積程序而將
鉬沈積於成核表面上以在基板上產生含鉬材料。
可如本文中不同地描述般以任何適合方式實行此方法。在特定實施例中,可使用包括化學氣相沈積(例如,經脈衝化學氣相沈積)之一氣相沈積程序進行此方法。可實行該方法使得所得含鉬材料基本上由元素鉬構成,且在各項實施例中,可在存在氫或其他適合還原氣體之情況下將鉬沈積於成核表面上。可在製造一半導體產品(諸如一DRAM裝置或一3-D NAND裝置)時實行該方法。
一般言之,可實行用於在一基板上形成含鉬材料之本發明之方法以達成按高位準之階梯覆蓋率(例如,自90%至110%之階梯覆蓋率)沈積含鉬材料。
自下文闡述之闡釋性實施例及闡釋性實例之後續描述將更完全明白本發明之方法之特徵及優點。
首先參考圖1,其中展示繪製為依據溫度(以攝氏度為單位)而變化之重量百分比之四氯氧化鉬之熱重量分析(TGA)之一圖表,其展示四氯氧化鉬之熱行為之特性。顯著地,四氯氧化鉬(MoOCl4)之T50比五氯化鉬(MoCl5)之T50低趨近20℃。
參考圖2,包括根據本發明之一實施例沈積之含鉬材料之一半導體裝置結構包含二氧化矽(SiO2)之一基底層,氮化鈦(TiN)之一障壁層上覆於該基底層,藉由將基板與四氯氧化鉬(MoOCl4)及二硼烷接觸而在該障壁層上方形成一成核層,其中在存在氫(H2)之情況下在來自四氯氧化鉬(MoOCl4)之成核層上作為一上層沈積一元素鉬(Mo)層。
可藉由以下程序步驟序列在包括二氧化矽基底層上之氮化鈦障壁層之基板上製造圖2之半導體裝置。
步驟1:(例如)在自300℃至450℃之一範圍中之溫度下,將基板之障壁層(TiN層)與二硼烷(B2H6)脈衝接觸;步驟2:泵抽/清除沈積腔室;步驟3:(例如)在大約500℃之溫度下,在存在氫(H2)或氬(Ar)之情況下,將基板之障壁層(TiN層)與五氯化鉬(MoCl5)或四氯氧化鉬(MoOCl4)蒸氣脈衝接觸;步驟4:泵抽/清除沈積腔室;步驟5:重複步驟1至4(選用)以形成具有所要特性之一成核層;及步驟6:藉由(例如)在大約500℃之溫度下,在存在氫(H2)之情況下,將基板與四氯氧化鉬(MoOCl4)蒸氣接觸而在成核層上沈積塊狀鉬。
步驟1至5係選用的且若不需要成核層,則可省去。
實例1-沈積速率研究
利用以下程序條件實行使用四氯氧化鉬(MoOCl4)/氫(H2)之一化學氣相沈積(CVD)鉬沈積:其中維持基板之一700℃階段;自其施配四氯氧化鉬(MoOCl4)前驅體用於氣相沈積操作之一70℃安瓿;氣相沈積操作中之60拖壓力;50每分鐘標準立方公分(sccm)氬載氣流率;及2000每分鐘標準立方公分(sccm)之氫(H2)。
在圖3及圖4中展示沈積之結果。資料展示在700℃下之化學氣相沈積(CVD)四氯氧化鉬(MoOCl4)/氫(H2)沈積程序在安瓿設定為70℃之溫度之情況下展現大約110Å/分鐘之高沈積速率。
實例2-SEM研究
圖5及圖6係藉由涉及以下程序條件之CVD四氯氧化鉬(MoOCl4)/氫(H2)沈積程序形成之一經沈積鉬膜之掃描電子顯微照片(SEM)影像:基板
=50Å TiN;安瓿溫度=70℃;階段溫度=700℃;壓力=60托;氬載氣流率=50sccm;氬清除氣體流率=0sccm;氫氣流率=2000sccm;沈積時間=300秒;在沈積之前之TiN厚度=70.9Å;在沈積之後之TiN厚度=61.8Å;鉬厚度=600.1Å;及經沈積鉬之電阻率=15.1μΩ‧cm。圖5及圖6展示具有相對大晶粒大小之一均勻沈積之鉬膜。
實例3-溫度及厚度研究
圖7係依據沈積時間(以秒為單位)而變化之鉬厚度(以埃為單位)之一圖表,其係針對如在550℃(底部曲線)、600℃(在600℃處之自底部之第二曲線)、650℃(在600℃處之自底部之第三曲線)及700℃(在600℃處之頂部曲線)之溫度下之各自運行中實行之藉由MoOCl4/H2程序、70℃之安瓿溫度、60托之壓力、50sccm之氬載氣流率及2000sccm之氫氣流率之鉬之沈積。不使用一成核層之藉由MoOCl4/H2程序之鉬之化學氣相沈積展示550℃處之溫度截止。自600℃至700℃(階段溫度)之沈積速率類似。
實例4-溫度及電阻率研究
圖8係依據鉬厚度(以埃為單位)而變化之膜電阻率(以μΩ‧cm為單位)之一圖表,其係針對藉由MoOCl4/H2程序在70℃安瓿溫度、60托壓力、50sccm氬載氣流率及2000sccm氫氣流率之條件下進行之鉬沈積,其中在600℃(頂部曲線)、650℃(中間曲線)及700℃(底部曲線)之溫度下在單獨運行中進行程序。資料展示相較於700℃之程序,在600℃及650℃下進行之程序展示稍微更高之電阻率。在700℃之階段溫度下,針對大約500Å之鉬膜厚度,膜電阻率下降至趨近11μΩ‧cm。
實例5-與MoCl
5
之比較-長期沈積研究
圖9係依據運行數目而變化之沈積速率(以埃/分鐘為單位)之一圖表,
其係針對使用四氯氧化鉬(MoOCl4)作為鉬前驅體(○)之鉬沈積及針對使用昇華五氯化鉬(MoCl5)作為鉬前驅體(△)之鉬沈積。兩個情況中之程序條件如下:安瓿溫度=70℃;壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm。
圖9中之結果展示使用四氯氧化鉬(MoOCl4)作為鉬前驅體之鉬沈積展現穩定及高沈積速率,而昇華五氯化鉬(MoCl5)展示穩定及低沈積速率。
由MoOCl4形成之鉬膜之二次離子質譜法(SIMS)分析驗證塊狀鉬中之氧濃度遠低於1%,其使用針對塊狀鉬之趨近6.4 x 1022cm-3之一數密度。
實例6-與MoCl
5
之比較-電阻率研究
圖10係依據鉬膜厚度(以埃為單位)而變化之經沈積鉬膜(以μΩ‧cm為單位)之膜電阻率之一圖表,其係針對在700℃下進行之一CVD沈積程序、針對使用未純化MoCl5前驅體(△)沈積之鉬膜、使用昇華MoCl5前驅體(□)沈積之鉬膜及使用四氯氧化鉬(MoOCl4)前驅體(◇)沈積之鉬膜。程序條件如下:安瓿溫度=70℃;壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm。結果展示相較於使用未純化MoCl5前驅體及昇華MoCl5前驅體形成之膜,MoOCl4前驅體產生具有更高電阻率值之鉬膜。
實例7-二硼烷浸泡研究
調查使用二硼烷預浸泡基板之效應。圖11係依據二硼烷浸泡時間(以秒為單位)而變化之鉬膜厚度(以埃為單位)之一圖表,其係針對400℃下之二硼烷曝露及使用四氯氧化鉬(MoOCl4)前驅體(○)之500℃塊狀鉬沈積,及針對300℃下之二硼烷曝露及使用四氯氧化鉬(MoOCl4)前驅體(△)之500℃塊狀鉬沈積。
圖11中之結果展示達30秒之300℃之二硼烷曝露條件及500℃下之四
氯氧化鉬(MoOCl4)前驅體曝露未導致鉬沈積,且有必要增加二硼烷曝露溫度或二硼烷浸泡時間以便獲得實質鉬生長。
實例8-SEM研究-使用二硼烷成核
圖12及圖13係使用500℃二硼烷成核形成之膜沈積及在存在氫之情況下使用四氯氧化鉬(MoOCl4)前驅體之500℃塊狀鉬沈積之SEM顯微照片。用於二硼烷浸泡之程序條件如下:基板=50Å TiN;安瓿溫度=70℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=500sccm;氫流率=0sccm;持續時間=30秒。用於MoOCl4/H2塊狀鉬沈積之程序條件如下:階段溫度=500℃;壓力=60托;氬載氣流率=50sccm;氫流率=2000sccm;持續時間=300秒。結果展示500℃之二硼烷成核導致鉬沈積,但在鉬下方形成一過量硼層。
實例9-階梯覆蓋率-3循環二硼烷成核程序
利用一3循環成核及使用MoOCl4/H2之鉬塊狀將鉬膜沈積於通孔中。二硼烷浸泡中之程序條件如下:基板=通孔TEG;安瓿溫度=70℃;階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;氫流率=0sccm;持續時間=60秒。MoOCl4/H2鉬沈積之程序條件如下:階段溫度=550℃;壓力=60托;氬載氣流率=50sccm;氫流率=2000sccm;持續時間=60秒。MoOCl4/B2H6成核程序(3個循環)展現通孔結構上之良好階梯覆蓋率。
相關聯程序化學過程包含以下反應:MoOCl4+3H2→Mo+4HCl+H2O;及2MoOCl4+B2H6→2Mo+2BCl3+2HCl+2H2O。
在根據本發明自MoOCl4沈積之一代表性鉬膜上進行X射線繞射量測,且XRT量測僅展示Mo金屬峰值而不存在MoO2或MoO3峰值。
在根據本發明形成之一代表性鉬膜上之X射線反射率(XRR)量測展示在一147Å之X射線螢光(XRF)光譜測定法量測膜上之具有趨近8.33g/cm3之一密度之~13.4nm鉬。
實例10-二硼烷浸泡時間-對厚度及電阻率之影響
圖14係依據二硼烷浸泡時間(以秒為單位)而變化之鉬厚度(△)(以埃為單位)及電阻率(條形圖行標記)(以μΩ‧cm為單位)之一圖表,其係針對包含在階段溫度=300℃;壓力=44托;二硼烷流率=35sccm;氬載氣流率=250sccm之程序條件下之成核及在階段溫度=550℃;安瓿溫度=70℃;壓力=60托;氬載氣流率=50sccm;氫氣流率2000sccm之程序條件下達600秒之塊狀鉬沈積之一沈積程序,該圖表展示二硼烷浸泡時間效應。資料展示使用60秒或更長的二硼烷預浸泡,在550℃之階段溫度下實現鉬沈積。如展示,膜電阻率在較長二硼烷浸泡時間週期下增加。
實例11-厚度及電阻率研究-使用二硼烷成核
圖15係依據MoOCl4/H2曝露時間(以秒為單位)而變化之鉬厚度(△)(以埃為單位)及依據MoOCl4/H2曝露時間而變化之電阻率(○)(以μΩ‧cm為單位)之一圖表,其係針對包含在階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;持續時間=60秒之程序條件下之成核及在階段溫度=550℃;安瓿溫度=70℃;壓力=60托;氬載氣流率=50sccm;及氫氣流率=2000sccm之條件下之塊狀鉬沈積之一沈積程序。如展示,使用一60秒二硼烷預浸泡,鉬沈積厚度在550℃下隨著MoOCl4/H2曝露時間而生長。膜電阻率針對大於400Å之厚度下降至低於20μΩ‧cm。
實例12-SEM研究-使用二硼烷成核
圖16係在550℃下沈積之一鉬膜之一SEM影像,且圖17係如在以下二硼烷浸泡程序條件下沈積之此膜之一SEM橫截面影像:基板=50Å TiN;安瓿溫度=70℃;階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;氫氣流率=0sccm;及持續時間=90秒,接著為藉由MoOCl4/H2程序在以下程序條件下之塊狀鉬沈積:階段溫度=550℃;壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm;及持續時間=600秒(一個循環)。膜之X RF厚度係1693.6Å,且測得電阻率為21.6μΩ‧cm。SEM影像針對在550℃下使用90秒二硼烷預浸泡沈積之鉬展示趨近40nm至70nm之晶粒大小。橫截面SEM影像展示在經沈積鉬下方之趨近7.7nm之硼層。
實例13-階段溫度研究-使用及不使用二硼烷成核
圖18係依據階段溫度(以攝氏度為單位)而變化之鉬厚度(△)(以埃為單位)及依據階段溫度而變化之電阻率(○)(以μΩ‧cm為單位)之一圖表,其展示針對如在階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;持續時間=60秒之二硼烷成核條件下及在安瓿溫度=70℃;壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm;持續時間=5分鐘之塊狀鉬沈積程序條件下進行之使用二硼烷成核之MoOCl4/H2程序之一反應速率限制體系。資料展示使用二硼烷成核,隨著在500℃與540℃之間之快速沈積速率下降,鉬沈積截止溫度下降至500℃。
圖19係依據階段溫度(以攝氏度為單位)而變化之鉬厚度(△)(以埃為單位)及依據階段溫度而變化之電阻率(○)(以μΩ‧cm為單位)之一圖表,其展示針對如在安瓿溫度=70℃;壓力=60托;氬載氣流率=50sccm;氫氣
流率=2000sccm;持續時間=5分鐘之程序條件下進行之不使用二硼烷成核之MoOCl4/H2程序之一反應速率限制體系。資料展示針對不使用二硼烷成核之CVD程序之沈積速率隨著在趨近560℃下之截止溫度而快速下降至低於600℃。
實例14-阿瑞尼氏圖-使用及不使用二硼烷成核
圖20係針對如不使用成核(△)進行之及如使用成核(○)進行之MoOCl4/H2反應之活化能之一阿瑞尼氏圖(K=Ae-Ea/RT)。資料展示針對MoOCl4/H2反應之經提取活化能針對不使用成核之塊狀鉬程序沈積係趨近233kJ/莫耳,且針對使用二硼烷成核之塊狀鉬沈積程序係趨近251kJ/莫耳。
實例15-階梯覆蓋率
藉由一成核及CVD塊狀鉬沈積MoOCl4/H2程序利用以下條件以在一通孔結構上提供鉬:基板=通孔TEG;安瓿溫度=70℃,其中二硼烷成核(浸泡)程序在階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;氫氣流率=0sccm;持續時間=60秒之程序條件下進行,且其中塊狀鉬沈積CVD程序在階段溫度=520℃;壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm;及持續時間=600秒之條件下實行。使用一個二硼烷成核循環之520℃ MoOCl4/H2程序展示通孔結構上之趨近50%之階梯覆蓋率(底部/頂部)。
實例16-階梯覆蓋率-沈積時間之影響
使用鉬藉由二硼烷成核(浸泡)及520℃ CVD塊狀鉬沈積MoOCl4/H2程序分別在300秒、450秒及600秒之塊狀沈積程序時間下沈積三種通孔結構。程序條件如下:基板=通孔TEG;安瓿溫度=70℃,其中二硼烷成核
(浸泡)程序在階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;氫氣流率=0sccm;持續時間=60秒之程序條件下進行,且其中塊狀鉬沈積CVD程序在階段溫度=520℃;壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm;及持續時間=300秒(圖25)、450秒(圖26)及600秒(圖27)之條件下實行。歸因於在結構之「頸部」處之約束,使用一個二硼烷成核循環之520℃ MoOCl4/H2程序展現隨著各自增加之沈積時間(即,對各自較長的程序時間)之通孔結構上之逐漸減少之階梯覆蓋率。
實例17-階梯覆蓋率-溫度之影響
使用鉬藉由二硼烷成核(浸泡)及CVD塊狀鉬沈積MoOCl4/H2程序分別在510℃、520℃及530℃之塊狀沈積溫度下沈積三種通孔結構。程序條件如下:基板=通孔TEG;安瓿溫度=70℃,其中二硼烷成核(浸泡)程序在階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;氫氣流率=0sccm;持續時間=60秒之程序條件下進行,且其中塊狀鉬沈積CVD程序在階段溫度=510℃(圖28)、520℃(圖29)及530℃(圖30);壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm;及持續時間=600秒之條件下實行。歸因於粗糙膜形態,510℃ MoOCl4/H2程序展現差階梯覆蓋率,520℃程序展示通孔結構上之趨近50%之階梯覆蓋率,階梯覆蓋率針對530℃之程序降級至約30%。
實例18-階梯覆蓋率-二硼烷浸泡時間之影響
使用鉬藉由二硼烷成核(浸泡)及CVD塊狀鉬沈積MoOCl4/H2程序分別在45秒、60秒及75秒之二硼烷劑量(浸泡)時間下沈積三種通孔結構。程序條件如下:基板=通孔TEG;安瓿溫度=70℃,其中二硼烷成核(浸泡)
程序在階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;氫氣流率=0sccm之程序條件下進行,且其中塊狀鉬沈積CVD程序在階段溫度=520℃;壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm;及持續時間=450秒之條件下實行。硼層清晰可見於針對60秒及75秒二硼烷浸泡條件之經沈積鉬之下方。
實例19-階梯覆蓋率-在60托下脈動
使用鉬藉由二硼烷成核(浸泡)及CVD塊狀鉬沈積MoOCl4/H2程序(其涉及在60托下針對120個循環進行之一經脈動CVD程序)沈積一通孔結構,該通孔具有具備510Å之鉬膜厚度之一上部分、具備375Å之鉬膜厚度之一下部分、及具備480Å之鉬膜厚度之一中間部分,其等係在以下程序條件下:基板=通孔TEG;安瓿溫度=70℃,其中二硼烷成核(浸泡)程序在階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;氫氣流率=0sccm;及持續時間=45秒之程序條件下進行,且其中經脈衝鉬沈積CVD程序在階段溫度=520℃;壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm;脈衝持續時間=5秒;清除持續時間=10秒;且循環數目=120之條件下實行。具有在各脈衝之間之10秒清除之脈衝CVD程序展現在結構之頸部附近之一減少累積。階梯覆蓋率針對趨近500Å厚度之一塊狀鉬沈積係大約75%。
實例20-階梯覆蓋率-在40托下脈衝
使用鉬藉由二硼烷成核(浸泡)及CVD塊狀鉬沈積MoOCl4/H2程序(其涉及在40托下針對120個循環進行之一脈衝CVD程序)沈積一通孔結構,該通孔具有具備320Å之鉬膜厚度之一上部分、具備520Å之鉬膜厚度之中間部分、及具備460Å之鉬膜厚度之一下部分,其中程序係在以下程序
條件下進行:基板=通孔TEG;安瓿溫度=70℃,其中二硼烷成核(浸泡)程序在階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;氫氣流率=0sccm;及持續時間=45秒之程序條件下進行,且其中經脈衝鉬沈積CVD程序在階段溫度=520℃;壓力=40托;氬載氣流率=50sccm;氫氣流率=2000sccm;脈衝持續時間=5秒;清除持續時間=10秒;且循環數目=120之條件下實行。在40托下之脈衝CVD程序展示具有在頂部上之較薄沈積及在通孔內部之較厚沈積之極佳階梯覆蓋率。在此通孔結構上之標稱階梯覆蓋率超過100%。
實例21-階梯覆蓋率-在40托下脈衝-增加之循環數目
使用鉬藉由二硼烷成核(浸泡)及CVD塊狀鉬沈積MoOCl4/H2程序(其涉及在40托下針對240個循環進行之一脈衝CVD程序)沈積一通孔結構,該通孔具有具備720Å之鉬膜厚度之一中間部分,及具備460Å之鉬膜厚度之一下部分之通孔,其中程序在以下程序條件下進行:基板=通孔TEG;安瓿溫度=70℃,其中二硼烷成核(浸泡)程序在階段溫度=300℃;壓力=40托;二硼烷流率=35sccm;氬載氣流率=250sccm;氫氣流率=0sccm;及持續時間=45秒之程序條件下進行,且其中經脈衝鉬沈積CVD程序在階段溫度=520℃;壓力=40托;氬載氣流率=50sccm;氫氣流率=2000sccm;脈衝持續時間=5秒;清除持續時間=10秒;及循環數目=240之條件下實行。歸因於在通孔頸部處之夾止,將40托壓力之循環數目自120增加至240不導致一無空隙填充。
實例22-蝕刻速率
探索硼成核表面(CVD B)上之一MoOCl4/H2程序之蝕刻速率。在階段溫度=500℃;壓力=20托;氬載氣流率=50sccm;氫氣流率=2000
sccm之條件下實行程序。在表1中展示進一步條件及所得蝕刻速率:
蝕刻速率未由曝露至空氣而影響。一Mo基板上之厚硼膜之蝕刻速率遠高於TiN基板上之硼膜上之蝕刻速率。此可係歸因於厚硼膜之表面粗糙度。
實例23-其他基板
在一系列基板上實行MoOCl4/H2程序。程序在以下條件下實行:階段溫度=500℃;壓力=60托;氬載氣流率=50sccm;氫氣流率=2000sccm。在表2中展示進一步條件及基板:
經沈積鉬展現一廣範圍之電阻率。電阻率不隨著厚度而變動,其中基板係PVD Mo。如自先前結果提及,電阻率非常取決於無硼成核層之TiN基板之階段溫度。
論述
下文展示,使用MoOCl4前驅體沈積之CVD鉬膜展示在400Å之厚度下之小於15μΩ‧cm之良好膜電阻率,且SIMS分析展示塊狀鉬膜中之氧濃度針對使用MoOCl4前驅體沈積之膜遠低於1原子百分比。在一TiN基板上,CVD MoOCl4/H2程序展現在趨近560℃下之不使用二硼烷成核之程序溫度截止及在趨近500℃下之使用二硼烷成核之截止。自阿瑞尼氏圖提取之活化能針對不使用成核之程序係趨近223kJ/莫耳,且針對使用二硼烷成核之程序係趨近251kJ/莫耳。使用二硼烷成核之CVD MoOCl4/H2程序展現通孔結構上之極佳階梯覆蓋率,且證實脈衝CVD程序在500Å之膜厚度下達成且甚至超過100%之階梯覆蓋率。
雖然本文中已參考特定態樣、特徵及闡釋性實施例闡述本發明,但應瞭解,不因此限制本發明之利用,而延伸至且涵蓋數個其他變動、修改及替代實施例,如將基於本文中之描述向本發明之領域之一般技術者建議其等自身。對應地,如下文主張之本發明旨在經廣泛理解且解譯為包含在其精神及範疇內之全部此等變動、修改及替代實施例。
貫穿本說明書之描述及發明申請專利範圍,字組「包括」及「含有」及字組之變動(例如,「包括(comprising及comprises)」)意謂「包含但不限於」且不排除其他組件、整數或步驟。再者,單數涵蓋複數,除非
內容脈絡另外要求:特定言之,在使用不定冠詞之情況中,將說明書理解為預期複數以及單數,除非內容脈絡另外要求。
本發明之各態樣之選用特徵可如結合任何其他態樣所描述般。在本申請者之範疇內,明確意欲可獨立或以任何組合獲取在先前段落中、且在發明申請專利範圍及圖式中,且特定言之,其等個別特徵闡述之各種態樣、實施例、實例及替代例。即,可以任何方式及/或組合來組合任何實施例之全部實施例及/或特徵,除非此等特徵不相容。
Claims (10)
- 一種在基板上形成含鉬材料之方法,其包括在氣相沈積條件下使該基板與四氯氧化鉬(MoOCl4)蒸氣接觸,及在該基板上建立一成核表面,其中該基板與四氯氧化鉬(MoOCl4)蒸氣之該接觸包括使該基板之該成核表面與四氯氧化鉬(MoOCl4)蒸氣接觸,以在該基板上沈積該含鉬材料。
- 如請求項1之方法,其中在該基板上建立該成核表面包括使該基板與二硼烷蒸氣且視情況分開地與四氯氧化鉬(MoOCl4)蒸氣接觸。
- 如請求項1或2之方法,其中該等氣相沈積條件係經選擇使得該經沈積含鉬材料具有至多20μΩ‧cm之電阻率。
- 如請求項1或2之方法,其包括使四氯氧化鉬(MoOCl4)揮發以形成該四氯氧化鉬(MoOCl4)蒸氣。
- 如請求項1或2之方法,其中該等氣相沈積條件包括一還原環境,視情況存在氫,使得該含鉬材料包括元素鉬材料。
- 如請求項1或2之方法,其中該基板包括TiN、Mo、MoC、B、SiO2、W及WCN之一或多者。
- 如請求項1或2之方法,其中:該基板包括包含其上具有氮化鈦層之二氧化矽之半導體裝置基板;該方法包括在該氮化鈦層上形成一成核表面;且該含鉬材料係沈積於該成核層上。
- 如請求項7之方法,其中該成核表面係藉由包括使該氮化鈦層與二硼烷蒸氣且分開地與四氯氧化鉬(MoOCl4)蒸氣接觸之脈衝CVD或ALD沈積形成。
- 如請求項1或2之方法,其中該基板包括其中沈積該含鉬材料之通孔,該通孔視情況具有在自20:1至30:1之範圍中之深度對橫向尺寸之縱橫比。
- 如請求項1或2之方法,其中該含鉬材料係以自90%至110%之階梯覆蓋率沈積於該基板上。
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Also Published As
| Publication number | Publication date |
|---|---|
| US11107675B2 (en) | 2021-08-31 |
| WO2018013778A8 (en) | 2018-08-30 |
| JP2019527302A (ja) | 2019-09-26 |
| KR102266610B1 (ko) | 2021-06-21 |
| CN109661481B (zh) | 2021-11-30 |
| WO2018013778A1 (en) | 2018-01-18 |
| US20180286668A1 (en) | 2018-10-04 |
| CN109661481A (zh) | 2019-04-19 |
| TW201812070A (zh) | 2018-04-01 |
| KR20190028743A (ko) | 2019-03-19 |
| JP6793243B2 (ja) | 2020-12-02 |
| US20180019165A1 (en) | 2018-01-18 |
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