TWI515711B - Pixel structure - Google Patents

Description

Pixel structure

The present invention relates to a flat display technology, and more particularly to a pixel structure.

Light emitting diodes (LEDs) have been widely used in flat panel displays in recent years due to their advantages of power saving, long service life, fast startup, and small size. Among them, the organic light emitting diode (OLED) has become a flat display in the past because of its advantages of high brightness, high contrast, self-luminescence, no viewing angle limitation, no backlight structure and color filter structure. One of the most promising technologies.

The OLED display can be further divided into an active matrix (AM) OLED display and a passive matrix (PM) OLED display. Compared with PMOLED displays, AMOLED displays have the advantages of long life and low power consumption, so they are often used in large-sized panels. 1 is a circuit diagram of a pixel structure 100 of a conventional AMOLED display. The pixel structure 100 includes a transistor M1, a transistor M2, a capacitor C1, and an organic light-emitting diode D1. The organic light emitting diode D1 is coupled to the transistor M1 at one end and to the voltage V2 at the other end. The transistor M1 receives the voltage V1 for driving the OLED D1. The data signal DATA and the scan signal SCAN are supplied to the pixel structure 100 by the turn-on or turn-off of the transistor M2.

The voltage V1 of each pixel structure 100 in the AMOLED display is connected to each other. When the pixel structure 100 drives the light, a current flows through the voltage V1. Since the voltage V1 has an impedance on the wire, a voltage drop occurs when the current flows through the voltage V1 wire, causing a current difference between the pixel structures 100. It can be seen that the current flowing through each of the OLEDs D1 is also different. On the other hand, due to the influence of the process, the threshold voltage of the transistor M1 in each pixel structure 100 may also differ. Therefore, even if the same data signal DATA is applied to each of the pixel structures 100, the current flowing through each of the OLEDs D1 is different, thereby causing the AMOLED display to easily cause uneven brightness.

The invention provides a pixel structure, which can improve the problem of uneven brightness of the display panel.

The pixel structure of the present invention is used to drive a light emitting diode. The pixel structure includes a driving transistor, a bias voltage generator, an initialization switch, a first scan switch, a second scan switch, and a coupling switch. The driving transistor has a first end, a second end, and a control end. The second end of the driving transistor is coupled to the LED, and the first end of the driving transistor receives the first reference operating voltage, and drives the control end of the transistor. Receive bias voltage. The bias voltage generator is coupled to the driving transistor, and generates a bias voltage according to the first reference voltage, the second reference voltage, the first reference operating voltage, and the display data. The initialization switch is coupled between the bias voltage generator and the first reference voltage, according to an initial The control signal is turned on or off. The first scan switch is coupled between the bias voltage generator and the second reference voltage, and is turned on or off according to the pre-scan signal. The second scan switch receives the display data and the current scan signal, and is turned on or off according to the current scan signal. The coupling switch is coupled between the bias voltage generator and the first end of the driving transistor to be turned on or off according to the coupling control signal.

Based on the above, the pixel structure of the present invention utilizes a driving transistor, a bias voltage generator, an initialization switch, a first scan switch, a second scan switch, and a coupling switch to enable the light emitting diode in the pixel structure to be presented. The brightness is only related to the first reference voltage supplied to the pixel structure and the display material. From another point of view, the brightness exhibited by the display panel is independent of the threshold voltage of the transistor and the first reference operating voltage of the pixel structure. Therefore, the pixel structure of the present invention can effectively improve the problem of uneven brightness of the conventional display panel.

The above described features and advantages of the invention will be apparent from the following description.

50‧‧‧ display panel

100, 200, 300, 400, 500‧‧‧ pixel structure

202, 302, 402‧‧‧ bias voltage generator

204, 304, 404‧‧‧ Initialization switch

206, 306, 406‧‧‧ first scanning switch

208, 308, 408‧‧‧ second scan switch

210, 310, 410‧‧‧ coupling switch

C1, C2, C3‧‧‧ capacitors

D1, D2, D3, D4‧‧‧ diodes

DATA‧‧‧ data signal

I, I1, I2‧‧‧ current

INTA‧‧‧ initial control signal

M1, M2, MB, MB1, MC, MC1, MD, MD1, MD2, MF, MF1, MI, MI1, MS, MS1‧‧‧ transistor

OVDD‧‧‧First reference operating voltage

OVSS‧‧‧second reference operating voltage

P1‧‧‧Initial period

P2‧‧‧ display period

P11‧‧‧ first child period

P12‧‧‧ second sub-period

SCAN‧‧‧ scan signal

SCAN1‧‧‧ pre-scanning signal

SCAN2‧‧‧ current scanning signal

V1, V2, V _OLED ‧ ‧ voltage

Vbias‧‧‧ bias voltage

Vdata‧‧‧ Display information

Vint‧‧‧second reference voltage

Vstd‧‧‧ first reference voltage

COU‧‧‧ coupling control signal

1 is a circuit diagram of a pixel structure 100 of a conventional active matrix organic light emitting diode (AMOLED) display.

2 is a circuit diagram of a pixel structure 200 of a light emitting diode display according to an embodiment of the invention.

3A and FIG. 4A respectively illustrate a light emitting diode according to another embodiment of the present invention. A circuit diagram of the pixel structure 300 of the display and the pixel structure 400.

3B and 4B are respectively diagrams showing driving waveforms of the pixel structure 300 and the pixel structure 400 of FIGS. 3A and 4A.

FIG. 5 is a schematic diagram of a display panel 50 according to an embodiment of the invention.

2 is a circuit diagram of a pixel structure 200 of a light emitting diode display according to an embodiment of the invention. The pixel structure 200 is used to drive the light emitting diode D2. The pixel structure 200 includes a driving transistor MD, a bias voltage generator 202, an initialization switch 204, a first scan switch 206, a second scan switch 208, and a coupling switch 210. In this embodiment, the driving transistor MD, the initialization switch 204, the first scan switch 206, the second scan switch 208, and the coupling switch 210 may be metal-oxide-semiconductor field-effect-transistors (metal-oxide-semiconductor field-effect-transistor, The MOSFET), the bias voltage generator 202 can be a capacitor or a circuit composed of a capacitor and a switching element, and the LED D2 can be an OLED or other illuminating element.

For example, the drive transistor MD can be a P-type MOSFET having a first end (eg, a source terminal), a second end (eg, a drain terminal), and a control terminal (eg, a gate terminal). The first end of the driving transistor MD receives the first reference operating voltage OVDD, the second end of the driving transistor MD is coupled to the anode of the LED D2, and the control terminal of the driving transistor MD receives the bias voltage Vbias. The cathode of the LED D2 is coupled to the second reference operating voltage OVSS.

The bias voltage generator 202 is coupled to the driving transistor MD and is based on the first parameter The voltage Vstd, the second reference voltage Vint, the first reference operating voltage OVDD, and the display data Vdata are generated to generate a bias voltage Vbias, wherein, in the embodiment, the voltage value of the first reference voltage Vstd is lower than the first reference operating voltage OVDD. The initialization switch 204 is coupled between the bias voltage generator 202 and the first reference voltage Vstd, and is turned on or off according to the initial control signal INTA. The first scan switch 206 is coupled between the bias voltage generator 202 and the second reference voltage Vint, and is turned on or off according to the pre-scan signal SCAN1. The second scan switch 208 receives the display data Vdata and the current scan signal SCAN2, and is turned on or off according to the current scan signal SCAN2. The coupling switch 210 is coupled between the bias voltage generator 202 and the first end of the driving transistor MD, and is turned on or off according to the coupling control signal COU.

The pixel structure 200 utilizes a driving transistor MD to provide a driving current to drive the light emitting diode D2. The first scan switch 206 and the second scan switch 208 are not turned on at the same time, and in the embodiment of the present invention, the first scan switch 206 and the second scan switch 208 can be turned on in sequence.

For the details of the operation of the pixel structure 200, please refer to FIG. 3A and FIG. 3B simultaneously. FIG. 3A is a circuit diagram of a pixel structure 300 of a light-emitting diode display according to another embodiment of the present invention, and FIG. A driving waveform diagram of the pixel structure 300 of FIG. 3A. The pixel structure 300 includes a driving transistor MD1, a bias voltage generator 302, an initialization switch 304, a first scan switch 306, a second scan switch 308, and a coupling switch 310. In this embodiment, the driving transistor MD1, the initialization switch 304, the first scan switch 306, the second scan switch 308, and the coupling switch 310 It can be a P-type MOSFET. The bias voltage generator 302 includes a capacitor C2 and a transistor MB. The first end of the capacitor C2 is coupled to the initialization switch 304 and the coupling switch 310. The second end of the capacitor C2 is coupled to the control end of the driving transistor MD1. The transistor MB may be a P-type MOSFET, and the transistor MB has a first end, a second end, and a control terminal. The second end of the transistor MB is coupled to the second end of the capacitor C2, and the first end of the transistor MB is coupled to the second scan switch 308.

The initialization switch 304 is a transistor MI (eg, a first transistor) having a first end, a second end, and a control end. The first end of the transistor MI receives the first reference voltage Vstd, and the second end of the transistor MI is coupled to the bias voltage generator 302, and the control terminal of the transistor MI receives the initial control signal INTA. The first scan switch 306 is a transistor MF (eg, a third transistor) having a first end, a second end, and a control end. The first end of the transistor MF is coupled to the bias voltage generator 302, the second end of the transistor MF receives the second reference voltage Vint, and the control terminal of the transistor MF receives the pre-scan signal SCAN1.

The second scan switch 308 is a transistor MS (eg, a second transistor) having a first end, a second end, and a control end. The first end of the transistor MS receives the display data Vdata, and the second end of the transistor MS is coupled to the bias voltage generator 302, and the control end of the transistor MS receives the current scan signal SCAN2. The coupling switch 310 is a transistor MC (eg, a fourth transistor) having a first end, a second end, and a control end. The first end of the transistor MC is coupled to the bias voltage generator 302, the second end of the transistor MC receives the first reference operating voltage OVDD, and the control terminal of the transistor MC receives the coupling control signal COU.

In FIG. 3B, the operation of the pixel structure 300 can be divided into an initialization period P1 and a display period P2, and the display period P2 occurs after the initialization period P1. The initialization period P1 is further divided into a first sub-period P11 and a second sub-period P12. In the initializing period P1 of the pixel structure 300, the bias voltage generator 302 generates and adjusts the bias voltage Vbias in accordance with the first reference voltage Vstd, the second reference voltage Vint, and the display material Vdata. For example, during the first sub-period P11 of the initialization period P1, the initial control signal INTA and the pre-scan signal SCAN1 are, for example, equal to the logic low level, and the initialization switch 304 and the first scan switch 306 are turned on. On the other hand, the current scan signal SCAN2 and the coupling control signal COU are both equal to the logic high level, for example, and the second scan switch 308 and the coupling switch 310 are turned off. The first reference voltage Vstd and the second reference voltage Vint are supplied to the bias voltage generator 302. From another point of view, during the first sub-period P11, the voltages applied to the first and second ends of the capacitor C2 are the first reference voltage Vstd and the second reference voltage Vint, respectively.

Next, during the second sub-period P12 of the initialization period P1, the initial control signal INTA and the current scan signal SCAN2 are, for example, equal to a logic low level, and the pre-scan signal SCAN1 and the coupling control signal COU are equal to a logic high level. Therefore, the initialization switch 304 and the second scan switch 308 are turned on, the first scan switch 306 is turned off, and the display material Vdata is supplied to the bias voltage generator 302 so that the bias voltage Vbias is adjusted in accordance with the display material Vdata. At this time, the voltage applied to the first end of the capacitor C2 is still the first reference voltage Vstd. On the other hand, the voltage applied to the second end of the capacitor C2 is the voltage value of the display data Vdata minus the transistor. The threshold voltage value of the MB, that is, the bias voltage Vbias, and the bias voltage Vbias can be adjusted according to the display data Vdata. From another point of view, during the second sub-period P12 of the initialization period P1, the display material Vdata is supplied to the pixel structure 300 by the transistor MS.

Finally, during the display period P2, the initial control signal INTA, the pre-scan signal SCAN1, and the current scan signal SCAN2 are both equal to the logic high level, and the coupled control signal COU is equal to the logic low level. At this time, the coupling switch 310 is turned on, and the first scan switch 306, the second scan switch 308, and the initialization switch 304 are turned off. The first reference operating voltage OVDD is supplied to the bias voltage generator 302 to adjust the bias voltage Vbias, and the driving transistor MD1 drives the light emitting diode D3 according to the adjusted bias voltage Vbias to generate a driving current. It is noted that the logic level of the initial control signal INTA, the pre-scan signal SCAN1, the current scan signal SCAN2, and the coupling control signal COU and the initialization switch 304, the first scan switch 306, the second scan switch 308, and the coupling switch The conduction and disconnection relationship of 310 is merely an exemplary embodiment, but the present invention is not limited thereto.

After the transistor MC is turned on, the display material Vdata can be supplied to the light-emitting diode D3 via the transistor MD1. On the other hand, during the display period P2, the voltage applied to the first terminal of the capacitor C2 is the first reference operating voltage OVDD, and the voltage applied to the second terminal of the capacitor C2 is the voltage value of the display data Vdata minus the transistor. The absolute value of the threshold voltage of the MB is added to the voltage value of the first reference operating voltage OVDD and the voltage value Vstd of the first reference voltage is subtracted. The voltage applied to the second terminal of the capacitor C2 is the bias voltage Vbias, that is, the voltage across the gate terminal of the driving transistor MD1. From this, it can be seen that during the display period P2, the current I1 flowing through the driving transistor MD1 can be expressed by the following formula (1): I1 = K (Vsg - | Vth |) ² ............ 1) wherein K is a conduction parameter of the driving transistor MD1, Vsg is a voltage difference between the source terminal of the driving transistor MD1 and both ends of the gate terminal, and Vth is a threshold voltage of the driving transistor MD1.

Since during the display period P2, the voltage at the source terminal of the driving transistor MD1 is the first reference operating voltage OVDD. Therefore, the formula (1) can be expressed as: I1 = K [OVDD - (Vdata - | Vth | + OVDD - Vstd - | Vth |)] ² = K (Vstd - Vdata) ² ......... ........... (2) It can be seen from the formula (2) that the current I1 flowing through the light-emitting diode D3 is only related to the first reference voltage Vstd and the display data Vdata, and It is independent of the threshold voltage Vth of the driving transistor MD1, the first reference operating voltage OVDD, and the voltage across the LED D3. Therefore, the pixel structure 300 of the present invention can overcome the difference in threshold voltage generated by the transistor during the fabrication process by using six transistors and one capacitor, and does not generate current when the current flows through the first reference operating voltage OVDD wire. The pressure drop problem.

4A and FIG. 4B are still another embodiment of the operation details of the pixel structure 200. Please refer to FIG. 4A and FIG. 4B simultaneously, wherein FIG. 4A illustrates a pixel structure 400 of a light-emitting diode display according to still another embodiment of the present invention. Circuit diagram. FIG. 4B is a driving waveform diagram of the pixel structure 400 of FIG. 4A. The pixel structure 400 is a complementary structure of the pixel structure 300 of FIG. 3A. The pixel structure 400 includes a driving transistor MD2, a bias voltage generator 402, an initialization switch 404, a first scan switch 406, and a second Scan switch 408 and coupling switch 410. In this embodiment, the driving transistor MD2, the initialization switch 404, the first scan switch 406, the second scan switch 408, and the coupling switch 410 may be N-type MOSFETs. The drive transistor MD2 has a first end (eg, a drain terminal), a second end (eg, a source terminal), and a control terminal (eg, a gate terminal). The first end of the driving transistor MD2 receives the first reference operating voltage OVDD, the second end of the driving transistor MD2 is coupled to the anode of the LED D4, and the control terminal of the driving transistor MD2 receives the bias voltage Vbias. The cathode of the LED D4 is coupled to the second reference operating voltage OVSS. The bias voltage generator 402 includes a capacitor C3 and a transistor MB1. The first end of the capacitor C3 is coupled to the initialization switch 404 and the coupling switch 410. The second end of the capacitor C3 is coupled to the control end of the driving transistor MD2. The transistor MB1 may be an N-type MOSFET, and the transistor MB1 has a first end, a second end, and a control terminal. The second end of the transistor MB1 is coupled to the second end of the capacitor C3, and the first end of the transistor MB1 is coupled to the second scan switch 408.

The initialization switch 404 is a transistor MI1 having a first end, a second end, and a control end. The first end of the transistor MI1 receives the first reference voltage Vstd, the second end of the transistor MI1 is coupled to the bias voltage generator 402, and the control terminal of the transistor MI1 receives the initial control signal INTA. The first scan switch 406 is a transistor MF1 having a first end, a second end, and a control end. The first end of the transistor MF1 is coupled to the bias voltage generator 402, the second end of the transistor MF1 receives the second reference voltage Vint, and the control terminal of the transistor MF1 receives the pre-scan signal SCAN1.

The second scan switch 408 is a transistor MS1 having a first end, a second end, and a control end. The first end of the transistor MS1 receives the display data Vdata, the second end of the transistor MS1 is coupled to the bias voltage generator 402, and the control terminal of the transistor MS1 receives the current scan signal SCAN2. The coupling switch 410 is a transistor MC1 having a first end, a second end, and a control end. The first end of the transistor MC1 is coupled to the bias voltage generator 402, and the second end of the transistor MC1 receives the second reference operating voltage OVSS and the voltage value V _{OLED of the} LED D4, and the control terminal of the transistor MC1 receives Coupling control signal COU.

In FIG. 4B, the operation of the pixel structure 400 can be divided into an initialization period P1 and a display period P2, and the display period P2 occurs after the initialization period P1. The initialization period P1 is further divided into a first sub-period P11 and a second sub-period P12. In the initializing period P1 of the pixel structure 400, the bias voltage generator 402 generates and adjusts the bias voltage Vbias according to the first reference voltage Vstd, the second reference voltage Vint, and the display material Vdata. For example, during the first sub-period P11 of the initialization period P1, the initial control signal INTA and the pre-scan signal SCAN1 are, for example, equal to the logic high level, and the initialization switch 404 and the first scan switch 406 are turned on. On the other hand, the current scan signal SCAN2 and the coupling control signal COU are both equal to a logic low level, for example, and the second scan switch 408 and the coupling switch 410 are turned off. The first reference voltage Vstd and the second reference voltage Vint are supplied to the bias voltage generator 402. From another point of view, during the first sub-period P11, the voltages applied to the first and second ends of the capacitor C3 are the first reference voltage Vstd and the second reference voltage Vint, respectively.

Next, in the second sub-period P12 of the initializing period P1, the initial control signal INTA and the current scan signal SCAN2 are, for example, equal to a logic high level, and the pre-scan The trace signal SCAN1 and the coupled control signal COU are equal to a logic low level. Therefore, the initialization switch 404 and the second scan switch 408 are turned on, the first scan switch 406 is turned off, and the display material Vdata is supplied to the bias voltage generator 402 to adjust the bias voltage Vbias according to the display material Vdata. At this time, the voltage applied to the first end of the capacitor C3 is still the first reference voltage Vstd. On the other hand, the voltage applied to the second end of the capacitor C3 is the voltage value of the display data Vdata minus the threshold voltage value of the transistor MB1, that is, the bias voltage Vbias, and the bias voltage Vbias can be based on the display data Vdata. Adjustment. From another point of view, during the second sub-period P12 of the initialization period P1, the display material Vdata is supplied to the pixel structure 400 by the transistor MS1.

Finally, during the display period P2, the initial control signal INTA, the pre-scan signal SCAN1, and the current scan signal SCAN2 are both equal to the logic low level, and the coupled control signal COU is equal to the logic high level. At this time, the coupling switch 410 is turned on, and the first scan switch 406, the second scan switch 408, and the initialization switch 404 are turned off. The second reference operating voltage OVSS and the voltage value V _{OLED of the} LED D4 are supplied to the bias voltage generator 402 to adjust the bias voltage Vbias, and the driving transistor MD2 generates a driving current according to the adjusted bias voltage Vbias. The light-emitting diode D4 is driven. It should be noted that the logic level of the initial control signal INTA, the pre-scan signal SCAN1, the current scan signal SCAN2, and the coupling control signal COU and the initialization switch 404, the first scan switch 406, the second scan switch 408, and the coupling switch The conduction and disconnection relationship of 410 is merely an exemplary embodiment, but the present invention is not limited thereto.

After the transistor MC1 is turned on, the display material Vdata can be supplied to the light-emitting diode D4 via the transistor MD2. On the other hand, during the display period P2, the voltage applied to the first end of the capacitor C3 is the second reference operating voltage OVSS plus the voltage value V _{OLED of the} light-emitting diode D4, applied to the second end of the capacitor C2. The voltage is the voltage value of the display data Vdata plus the absolute value of the threshold voltage of the transistor MB1 plus the voltage value of the second reference operating voltage OVSS and the voltage value V _{OLED of the} light-emitting diode D4 minus the voltage of the first reference voltage. The value is Vstd. The voltage applied to the second terminal of the capacitor C3 is the bias voltage Vbias, that is, the voltage across the gate terminal of the driving transistor MD2. From this, it can be seen that during the display period P2, the current I2 flowing through the driving transistor MD2 can be expressed by the following formula (3): I2 = K(Vgs - | Vth |) ² ............ 3) wherein K is a conduction parameter of the driving transistor MD2, Vgs is a voltage difference between the gate terminal and the source terminal of the driving transistor MD2, and Vth is a threshold voltage of the driving transistor MD2.

It can be seen from the above description that the formula (3) can be expressed as: I2=K[(Vdata+| Vth |+OVSS+V _OLED -Vstd)-(OVSS+V _OLED )-| Vth |)] ² =K(Vdata- Vstd) ² ......................... (4) From equation (4), the current I2 flowing through the light-emitting diode D4 is only The first reference voltage Vstd is related to the display material Vdata, and is independent of the threshold voltage Vth of the driving transistor MD2, the first reference operating voltage OVDD, the second reference operating voltage OVSS, and the voltage value V _{OLED of the} light-emitting diode D4. Therefore, the pixel structure 400 of the present invention utilizes six transistors and one capacitor to overcome the threshold voltage difference generated by the transistor during the fabrication process, and does not generate current when flowing through the first reference operating voltage OVDD wire. The pressure drop problem.

FIG. 5 is a schematic diagram of a display panel 50 according to an embodiment of the invention. The display panel 50 includes a plurality of pixel structures 500. The plurality of pixel structures 500 are configured as a plurality of display columns. The plurality of display columns receive the corresponding initial control signal INTA, the current scan signal SCAN1, the pre-scan signal SCAN2, and the coupling control signal. COU. On the other hand, the plurality of display columns receive the corresponding first reference voltage Vstd, second reference voltage Vint, first reference operating voltage OVDD, and display material Vdata. For the circuit configuration and operation details of the plurality of pixel structures 500, reference may be made to the pixel structure 200 in FIG. 2, the pixel structure 300 in FIG. 3A, or the pixel structure 400 in FIG. 4A, and details are not described herein. The display panel 50 employing the pixel structure 500 can improve the brightness unevenness of the conventional display panel during display as compared with the conventional display panel.

In summary, the pixel structure of the present invention utilizes a driving transistor, a bias voltage generator, an initialization switch, a first scan switch, a second scan switch, and a coupling switch, and the display panel is presented during display of the display panel. The brightness is only related to the first reference voltage supplied to the pixel structure and the display data, and is independent of the threshold voltage of the transistor and the first reference operating voltage of the pixel structure. Therefore, the display panel of the present invention and its pixel structure can compensate for the problem that the threshold voltage of the transistor is different during the manufacturing process. On the other hand, since the brightness exhibited by the display panel is independent of the first reference operating voltage of the pixel structure, the display panel of the present invention and its pixel structure can effectively improve the brightness unevenness of the conventional display panel.

Although the present invention has been disclosed above by way of example, it is not intended to limit the present invention. The scope of the present invention is defined by the scope of the appended claims, which are defined by the scope of the appended claims, without departing from the spirit and scope of the invention. quasi.

200‧‧‧ pixel structure

202‧‧‧Bias voltage generator

204‧‧‧Initial switch

206‧‧‧First scan switch

208‧‧‧Second scan switch

210‧‧‧coupled switch

COU‧‧‧ coupling control signal

D2‧‧‧Lighting diode

INTA‧‧‧ initial control signal

MD‧‧‧ drive transistor

OVDD‧‧‧First reference operating voltage

OVSS‧‧‧second reference operating voltage

SCAN1‧‧‧ pre-scanning signal

SCAN2‧‧‧ current scanning signal

Vbias‧‧‧ bias voltage

Vdata‧‧‧ Display information

Vint‧‧‧second reference voltage

Vstd‧‧‧ first reference voltage

I‧‧‧current

Claims (10)

A pixel structure for driving a light emitting diode, comprising: a driving transistor having a first end, a second end, and a control end, the second end of which is coupled to the light emitting diode, the first end thereof Receiving a first reference operating voltage, the control terminal receiving a bias voltage; a bias voltage generator coupled to the driving transistor, according to a first reference voltage, a second reference voltage, and the first reference operating voltage And a display data to generate the bias voltage; an initializing switch coupled between the bias voltage generator and the first reference voltage, according to an initial control signal to be turned on or off; a first scan switch, coupled Connected between the bias voltage generator and the second reference voltage, according to a pre-scan signal to be turned on or off; a second scan switch, receiving the display data and a current scan signal, according to the current scan signal Turning on or off; and a coupling switch coupled between the bias voltage generator and the first end of the driving transistor to be turned on or off according to a coupling control signal. The pixel structure of claim 1, wherein the voltage value of the first reference voltage is lower than the first reference operating voltage. The pixel structure of claim 1, wherein the bias voltage generator comprises: a capacitor having a first end coupled to the initialization switch and the coupling switch, the second end of which is coupled to the driver The control end of the transistor; a transistor having a first end, a second end, and a control end, the second end of the transistor and the control end being coupled to the second end of the capacitor, the first end of the transistor being coupled to the second Scan switch. The pixel structure of claim 3, wherein the bias voltage generator generates and adjusts the bias voltage according to the first reference voltage, the second reference voltage, and the display data during an initializing period, The bias voltage generator adjusts the bias voltage in accordance with the first reference operating voltage during a display. The pixel structure of claim 4, wherein the initializing switch and the first scanning switch are turned on during a first sub-period of the initializing period, the first reference voltage and the second reference voltage Provided to the bias voltage generator, during a second sub-period of the initializing period, the initialization switch and the second scan switch are turned on, the first scan switch is turned off, and the display data is provided to The bias voltage generator is configured to adjust the bias voltage according to the display data. The pixel structure of claim 4, wherein the coupling switch is turned on during the display, the first scan switch, the second scan switch, and the initialization switch are turned off, and the first reference An operating voltage is supplied to the bias voltage generator to adjust the bias voltage, and the driving transistor drives the light emitting diode according to the adjusted bias voltage to generate a driving current. The pixel structure of claim 1, wherein the initialization switch is a first transistor having a first end, a second end, and a control end, the first end of the first transistor receiving the first a second end of the first transistor coupled to the bias voltage generator, the control end of the first transistor receiving the initial control signal number. The pixel structure of claim 7, wherein the second scan switch is a second transistor having a first end, a second end, and a control end, the first end of the second transistor receiving the Displaying the data, the second end of the second transistor is coupled to the bias voltage generator, and the control end of the second transistor receives the current scan signal. The pixel structure of claim 8, wherein the first scan switch is a third transistor having a first end, a second end, and a control end, the first end of the third transistor being coupled To the bias voltage generator, the second end of the third transistor receives the second reference voltage, and the control terminal of the third transistor receives the pre-scan signal. The pixel structure of claim 9, wherein the coupling switch is a fourth transistor having a first end, a second end, and a control end, the first end of the fourth transistor being coupled to the a bias voltage generator, the second end of the fourth transistor receives the first reference operating voltage, and the control terminal of the fourth transistor receives the coupling control signal.