TWI331841B - Dc-to-dc converter with improved transient response - Google Patents

Description

1331841 IX. INSTRUCTIONS: The priority of this request is based on a US provisional application called DC/DC converters that improve transient response, application number 60/813, 148, registration date June 13, 2004. The contents of the manual have been fully quoted and incorporated in this ^;. This application is a partial continuation application. The parent case is the US application 'Application No. 11/342,462 registered in the 30th of January 2006; the application number _·11/342,462 is also a continuation application. The parent case is 2004. 1 年 8 曰 • Registered US application, application number _75, 711, is now US7, 〇〇 2, 817 US patent; US7, 〇〇 2, 817 US patent is also a continuation application, ^ mother case is June 2003 US application for registration on the 26th, application ^ 10/606, 537, US Patent No. 6,813,173, the contents of which are hereby incorporated by reference in its entirety in The case is US application registered on April 18, 2006, application number 11/379,128; the application number 11/379,128 is also a continuation application, and the parent case is US application number 10/648,085, now US7,031. U.S. Patent No. 174, U.S. Patent No. 7,031,174 is also a continuation application, the parental application of which is incorporated herein by reference to U.S. Application No. 1/262 537, filed on January 1, 2002, and US Patent No. 6,678,178; U.S. Patent No. 6,678,178 is also a continuation application, and its parent case was filed on April 25, 2001. U.S. Application, Application No. 09/843,200, is now U.S. Patent No. 6,459,602, the priority of which is based on U.S. Provisional Application No. 60/244,054, filed on Jan. 26, 2000, the entire disclosure of which is incorporated herein by reference. Incorporated in this application. TECHNICAL FIELD OF THE INVENTION The present invention relates to voltage converters, and more particularly to a direct current (DCy direct current (DC) converter with improved transient response, accuracy, and stability. 5 1331841 [Prior Art DC/DC converters are well known in the electronics field. These circuits usually use the -DC voltage potential (lev_ for another DC voltage potential for various types of converters, for example, to the microprocessor core). (_) Provides the power-to-turn (4)--the kind of the Xianding frequency converter, also known as the 1-pulse width modulation (PWM) switch. The pulse width is difficult to turn (4) the converter and the current type converter. Pulse! * Modulation conversion H includes - a control loop comprising two error amplifiers; - a pulse width modulation comparator; and - or a plurality of drivers. ίΐί often and two synchronous rectifiers _ to improve the energy generation. Comparing the output voltage of the = device with a reference voltage. The pulse width modulation comparison = the output of the error amplifier as its first input, and receiving the second input by a mineral tooth ίίΐΐίΐϊ. Modulation comparator output The advantage is that the architecture is simple and the accuracy is high. Its main disadvantage is that the compensation required by the % difference amplifier causes the transient response of the load to be slow. The electric 〃 IL type pulse width modulation converter includes two control loops: one The external light circuit of the internal electric current loop includes: a current amplifier; a comparator that uses an error voltage from the voltage of the Μ and the output of the Α|| The flip-flop is set by the clock signal each time and reset by the output of the comparator; and one or more drivers. The external circuit includes a voltage error amplifier, the voltage error The amplifier compares the converter = output voltage with a reference voltage. The output of the voltage error amplifier is an internal current loop. The advantage of this converter is that it is stable, accurate, and stable in a multiphase architecture. Its main disadvantage is that it has a slow transient response to the load due to the compensation of the voltage circuit of the K. The other DC/DC converter is a converter with a fixed on-time 6 1331841 (con Stant cm time converter), also known as pulse frequency modulation (pFM converter. Pulse frequency converter. The rate modulation converter includes a control loop, the control loop package 2 an error amplifier, a comparator; and one or more The driver β is coupled to the synchronous rectifier to improve its performance. The error amplifier compares the voltage with the reference voltage tb. The wheeled output of the error scent is compared with the line to obtain a one-shot Trigger signal, the on-time of the trigger signal. The advantage of this converter is that the architecture is simple, ^ the load should be relative to the wire. Its main disadvantages are 7 frequency = ^ and ^ stable in multiple subtraction. The /DC converter is a hysteretic converter including: a voltage type hysteresis conversion H and a current type hysteresis converter. The voltage g hysteresis conversion H includes a - control loop comprising: a drive (four). This converter is usually compared to a 1-step rectifier. The comparator with hysteresis compares this output to the reference voltage. The output of this comparator acts as the input to the driver. This = frame is simple, accurate, and has a fast transient response to the load. = The point frequency is not fixed and unstable to the polyphase architecture. The lack of current in the sputum (four) to the brain includes - control gamma. The loop voltage error is amplified by the n-hysteresis f-flow comparator; and: the converter is usually combined with - synchronous rectification _ to improve the transient === of the transient cymbal slow, the solution is not fixed and 敎 ^ more pairs of loads The DC/DC converter requires a simpler and more relative solution, with fast transient response to the load, accuracy, and features for multiphase architecture. Frequency Solid 7 Figure 1 shows a circuit diagram of a transient response fast DC/DC converter of the present invention. Typically, the DC/DC converter 100 stabilizes the output voltage Vout 112 based on the reference signal at the comparison = input. In the transient state, the DC/DC converter 100 is effectively switched to reduce the recovery time of the temporary 4 response by adjusting the duty ratio during the switching from the DC state to another DC state. Control v〇泔丨丨2 to the ideal steady state. The DC/DC converter 100 includes a reference DC voltage source Vref, a reference signal generator 116, a comparator 118, and a driver 120 pair open & off 122. The reference signal generator 丨16 generates a reference signal / 'the signal is preferably a saw chirp signal of 3 kHz, or a periodic apostrophe of any waveform (such as a triangular wave signal or a sine wave signal), and has a factory The DC offset determined by the DC voltage generated by Vref 114. The comparator 18 receives the reference signal 126 as its first input. The output voltage v〇ut 12 is supplied to the comparator ns through the feedback loop 124 and serves as the comparator ug, the first input. The comparator 118 compares Vout 112 with the reference signal 126 and produces a pulse width modulated signal 128 whose duty cycle determines to increase v〇ut U2 or decrease v〇ut 112. In more detail, if vout 112 is less than or greater than the reference signal 126, the comparator 118 forces Vout 112 to follow the parameter 126 by increasing or decreasing the pulse width of its output pulse width modulation signal 128. Specifically, the driver 12 receives the pulse width modulation signal for its input and drives the switch 122. The switch is preferably implemented by metal oxide semiconductor field effect transistors (MOSFETs), and the high end m〇sfet The v〇ut 112 is controlled by alternately conducting with the low side MOSFET. Preferably, the 112 is near Vref and remains within the range of the reference signal 126. The reference signal generator 116 generates a sawtooth reference signal 126 at a particular DC Vref voltage, the peak-to-peak sawtooth wave of the signal fluctuating by 1 volt, ie, Vref-50 millivolts <V〇ut< Vref + 50 millivolts. In addition, the in-wheel (V〇utll2) and an inductor-capacitor (LC) low-pass filter are lightly connected. The inductance of the inductor 31 of the 1331841 wave should be as small as possible to reduce the recovery time for the transient response of the load. One, two are shown as an exemplary application circuit 200 for applying the DC/DC converter circuit 1A of FIG. The circuit 2 is configured to compensate for variations in the input voltage 114 using a reference voltage generator such as D1 (TL431) 202) to ensure that the pulse width modulation signal 128 generated by the comparator 118 is based on the reference voltage as described above. Adjust the wheel voltage v〇ut. A ramp generator 116 is constructed of component U3 (LM311) 204 and produces a triangular wave signal 126 having a peak amplitude of 100 volts. The comparison stomach 118 as described above is constituted by U2 fLM311) 206, receives the output voltage v〇utU2 and the triangular wave signal 126 as inputs, and generates a pulse width modulation signal 128. The driver 120 in this exemplary application is comprised of U1 (TPS2830) 208. Finally, the power module 210 controls the output voltage v〇ut, the electrical MOSFETsQ^Q2, 122; t^Ll, 13〇; ^R1〇; Jt ΐ ^ money / money 1 circuit 帛 贞 贞 贞 贞 贞 该The invention includes the device and the circuit of the diagram to be extracted in Fig. 2, but is not limited to these components and circuits. Ζτ£ιι uses the number of phases instead of R. For example, 'in a four-phase architecture, 90 degrees. The problem with multiphase architecture is that the two phases g are much larger than the other phase of the current output to the load, conversion efficiency, and heavy effects. This problem is similar to the two voltage sources. The source voltage is different, and there will be current flowing between them. For the muscle/straight machine conversion (4) 3 problems, it is difficult - current balance, in a two-phase DC / DC converter using a current Guardian, 1 phase of the output * voltage 'make it with the first phase The output is: etc. By using a current sense resistor, the current balancing module obtains an i bias wire to adjust the output current >1 of the second phase. There are two options for implementing the system. (1) By modifying the 2nd, δΛ electrocoat' or (7) by modifying the feedback phase of the second phase, β-f is a two-phase DC with a current balancing module. In the example, the current balancing module acts on the second phase of the reference phase 嶋 according to the input terminal of the comparator 118 = two Lit the output voltage 112. The current balancing module thus allows the voltage to be transmitted by the two phases, and the voltage will be greater than the voltage at its inverting input. The DC value of the λ face reference galvanic on the error 2 will increase. Therefore, the second phase is difficult to be as high as 0, and the current value of the second phase i〇〇b is 21ί=21 value. When the currents transmitted by each phase are equal, the biased electrical waste 03 will remain. This value 'to maintain the current balance of each phase. The clock J has an embodiment of another two-phase DC/DC of the current balancing module, and the current balancing module acts on the second phase excitation. The first phase 1GGa establishes the output voltage gamma m according to the =^ number U6a at the input of the comparator (3). The current balancing module shifts the DC value of the feedback voltage to the second phase 1 〇〇 b such that each phase = equal current amplitude assumes that the current flowing through the first phase lGGa is greater than the current flowing through the second phase l00b For current, the voltage at the inverting input of the error amplifier 4〇2 is greater than the voltage at its non-inverting input. The function of the error amplifier 4 〇 2 is to increase the value of the bias voltage 4 〇 3 such that the DC value of the second phase ^ b ^ feedback voltage will decrease. Therefore, the occupation ratio of the second phase 1GQb will increase. Thus, the current value delivered by the second phase 100b is greater than the current value. When the currents generated by each phase are equal, the bias voltage 4 〇 3 will remain at this value to maintain the current balance of the phases. It is worth noting that since the current balancing module of FIG. 4 acts on the feedback voltage, the inversion and the non-inverting input of the current balancing module of FIG. 4 are respectively inverted from the current balancing module of FIG. Contrary to the non-inverting input. The main advantage of the current balancing architecture employed by the converter shown in Figures 3 and 4 is that when a change in load produces a transient response, both phases operate to return the output voltage to a steady state. Since the transient response behavior of each phase is the same (there is only a small difference due to the difference in the value of the component used), the current balancing circuit only needs to pass a slight correction, that is, to fine tune the reference portion or graph in FIG. The bias voltage of the feedback portion of 4 balances the current of the two phases to the new stable state. It is worth noting that two types of current balancing methods can be used in a multiphase architecture in which the current balancing module takes the current message from each N phase and the output voltage as input 'and provides the bias voltage to the second to Nth phases. Thereby balancing with the current of the first phase. Figure 5A is a schematic illustration of the output voltage as a function of the input voltage. For a specific input voltage Vin, since the reference signal is constant, = duty cycle D is Voutl/Vin. That is, the duty ratio is determined by the voltage ν_ and the signal domain. For example, if the input voltage is reduced to k*Vin (when the new duty ratio is D2=V〇Ut2/k*Vin, the i is increased by the duty ratio. Therefore, the output voltage Decreasing with the value of (the amplitude of the sawtooth reference signal). Even the reference signal with a low internal value t can be varied within a larger range because the input voltage is still with the input voltage. The change is compensated by the lightning in the case of the input of the human (4). The output method is compensated for each other - preventing the output voltage from changing with the input voltage; the input voltage is proportional and the peak is kept at - The fixed chirped 兮 λ sawtooth signal. This means that for the Vin phase 'the turn-off voltage Vout 1 and the corresponding one duty cycle, the duty ratio of the 12 1331841 from the output voltage and the reference signal Obtained as Dl=Voutl/Vin. Therefore, if the magnitude of the ore signal is Asawtooth and the peak is Vref, then Voutl=Vref-Dl*Asawtooth, ie Voutl=Vref-Voutl*Asawtooth/Vin, or Voutl =Vref/(l+Asawtooth/Vin).

When the input voltage decreases with the coefficient k < l, the amplitude of the sawtooth wave decreases by the same coefficient k to keep the translated value of the ore tooth wave signal at yref. According to the new input voltage value, the duty ratio is D2 = Vout2 / (k * Vin). However, because

Vout2=Vref-D2*(k*Asawtooth)=Vref-Vout2*k*Asawtooth/(k*

Vin), Vout2=Vref/(l+Asawtooth/Vin). This means Voutl=Vout2. Therefore, the output voltage does not vary with the input voltage.

The main advantages of the method described above are: (1) the output voltage does not depend on the input voltage; (2) the gain of the loop does not depend on the input voltage, thus, for various input voltages, the DC/DC conversion The behavior of the device remains the same. The gain of this loop is actually vin/Asawt〇〇th. Since A^wtooth is proportional to Vin, the gain is constant; and (3) at a higher input level, the output is higher due to the closed lie. When the amplitude of the sawtooth signal increases, the pulse width modulation comparator operates correctly without generating a spurious pulse due to the noise of the output voltage. Compensate the wheel-J ί S3 road map in the case of a change in the type of lightning. The clock pulse 6〇1 closes the switch 602: the time is 'this time enough to charge the capacitor 6〇3 to % ί. The peak of the telecommunication 正 is exactly ^ the switch 602 is disconnected, ir and the input __ constant current discharge. The circuit?: Π?? to achieve the desired sawtooth amplitude. This type of application is used in laptops where the input voltage can be 135 13841 or the adapter voltage. The adapter voltage is typically 20v, where the discharge cell voltage can be as low as 8V or less. The system needs to work within the entire range. Figure 7 is a waveform diagram showing the transient response when a load is applied to a two-phase DC/DC converter from the converter. The load current varies by 20 amps. CH1 is the waveform of the output voltage (v〇ut). CH2 is the waveform of the pulse width modulation signal of the first phase (PWM1), and the waveform of the pulse width modulation signal of the second phase (PWM2). CH4 is the waveform of the current. When the load is added (i.e., the current is increased from ampere to '2 amps), the Vout drops. Since the duty cycle of the converter is increased for a short period of time (the converter's transient response is about 100 nanoseconds (ns), which makes the recovery time less than 10 microseconds), the output voltage returns to its stable dimension. . When the load is removed, the converter reduces the duty cycle to recover ^v〇ut: as shown in Figure 7, each phase adjusts its own pulse width modulation signal to recover from the transient state. Vout. Therefore, when g uses a polyphase architecture, the recovery of this transient response of Vout depends on the number of phases. ~ a Figure 8 shows another embodiment of the DC/DC converter 8A of the present invention in which a method can be used to modify the DC voltage level of the signal 126 to enhance the DC/DC converter 800. The accuracy of this output voltage. In general, a DC loop including a mildew circuit 802 can adjust the voltage level of the reference signal 126 provided by the reference DC source 114. The bias voltage source 806 can also adjust the voltage level of the reference signal 126 based on the difference between the output voltage level v〇m at terminal 112 and the voltage level generated by the reference DC voltage source 114. In addition to the bias voltage source 8〇6, the circuit 802 can also include an error amplifier 804. A signal indicative of the output voltage level of the DC/DC converter 800 can be fed back via path 810 to an input of the error amplifier 8〇4 (example, inverting input). Another signal representative of the reference DC voltage source 114 can be provided via path 812 to the other input of error amplifier 804 (e.g., non-reverse 841). The error amplification H 804 compares the two signals and outputs a control signal to the bias voltage source 8〇6 according to their differences. If the output voltage level of the converter at the m-end is less than the voltage level generated by the reference dc, then the error amplifier 804 will output a guard nickname 'the control signal commands the bias voltage generator 8 〇 6 to generate A voltage level that is added to the voltage level of the reference DC voltage source. Therefore, the :' level of the ramp reference signal 126 will increase accordingly. Since the DC value of the reference money 126 = 'the comparator m will increase the output of the output pulse width modulation signal 128, the converter output _ will increase until the & reference m original 114 provides the Refer to the DC voltage value. Voltage = conversion 11 output (four) level is greater than the reference DC i voltage level, then the error amplifier _ will output a control signal to command the bias voltage to occur 11 _ to generate a "_ such as 4 straight acTtT ^ to ^ ten times multiplier Only has a gain of less than - unit. In Example 3, 9 2^:;·^, the other-real adjustment of the converter 900 is from the Voutll2 end to provide a feedback value of the comparison 13 1331841 118 to provide a rise conversion The accuracy of the device is generally 9. A DC loop comprising an accuracy circuit 902 adjusts a feedback signal based on the difference between the converter output voltage level Vout and the voltage level generated by the reference DC voltage source 114. The feedback signal represents the output voltage of the converter 9. The accuracy circuit 902 can include an error amplifier 9〇4 and a bias voltage source 906 β representing the output voltage level of the DC/DC converter 900. The signal can be fed back to an input of the error amplifier 9〇4 via path 910 (eg, a non-inverting input). Another signal indicative of the DC output voltage # level of the reference DC voltage source 114 can be provided to the error amplifier via path 912. 90 The other input of 4 (e.g., the inverting input). The error amplifier 9〇4 compares the two signals into f and provides a control signal to the bias voltage source 906 based on the difference between the two signals. Because the accuracy circuit 902 in FIG. 9 acts on the feedback voltage, the inverting and non-inverting inputs of the error amplifier 9〇4 in FIG. 9 are inverted from the error amplifiers 8〇4 in FIG. 8, respectively. The non-inverting input is reversed. If the output voltage level of the converter at terminal 112 is less than the voltage level generated by the reference DC voltage source 114, the error amplifier 9〇4 will output a control signal, the control signal The bias voltage generator 906 is commanded to generate a negative bias voltage level that will be added to the feedback signal 'to cause the feedback signal to decrease accordingly. As a result of the path 914 to the comparator 118 The signal is less than the feedback signal (otherwise no negative bias is needed in this case) 'so the duty cycle of the pulse width modulation signal 128 of the comparator 118 will increase. Then, the increased duty cycle makes The converter 900 is at the output The output voltage of 112 increases until the reference value produced by the reference DC voltage source 114 is reached. Conversely 'if the output voltage level of the converter at the output 112 is greater than the reference DC voltage source 114 Voltage level, then the error 16 1331841

Amplifying, 904 will input a (four) signal, and the (four) signal age causes the bias voltage generation benefit 906 to generate a positive bias voltage level, the positive bias voltage level summing the disk feedback signals such that the feedback signal correspondingly Increase. Since the signal via path 914 to the comparison g 118 is greater than the feedback signal (otherwise no positive bias is required in this case), the duty cycle of the pulse width modulated signal 128 output by the comparator 118 will decrease. . The reduced duty cycle then causes the output voltage of the converter 900 at the output 112 to decrease until the reference value produced by the reference DC voltage source 114 is reached. The DC accuracy loop 912 that adjusts the feedback voltage level of the comparator 118 is a slow loop (sl〇w loop) such that the voltage of the bias voltage source 906 can vary slowly. The stability of the DC/DC converter of the present invention can be improved by using an inductor current message (Figs. 10-11) or an AC current message (Figs. 12-13). Figure 10 shows another embodiment of a DC/DC converter 1000 of the present invention which employs an inductor current message to improve stability. Typically, the feedback voltage value from the Vout 112 terminal is improved via a feedback path to the comparator 118'. The feedback voltage is improved by a stability circuit 1 22 to enhance the stability of the DC/DC converter 1000. The stability circuit 1022 can include an operational amplifier 1026, and

Resisting R1 and R2. A sense resistor 1030 can also be in series with the inductor L1. This voltage across the sense resistor 1030 represents the current flowing through the inductor L1. The current flowing through the inductor L1 is amplified by the coefficient set by the resistor R1 and the resistor R2 and is equal to Acurrent = 1 + R2 / Rl. Thus, the feedback voltage value fed back to the inverting input of the comparator 118 in the embodiment of Fig. 10 can be derived from equation (1). VPWM comparatorVout+( 1+R2/R1 )*Iinductor*Rsens ( 1 ) In equation (1), Vout is the output voltage of DC/DC converter 1000, and R1 and R2 are the resistance values of resistors R1 and R2, respectively. 17 is the inductor current ' and Rsens flowing through the inductor L1 is the resistance value of the sense resistor 1030. As such, stability is improved by the inductor current being translated by only 90 degrees. In addition, the output voltage Vout decreases as the inductor current increases, thereby reducing the range of the output voltage during the transient response. A stability circuit 1103 shown in FIG. 11 may further include a resistor-capacitor (rc) circuit 1102 composed of a resistor 114A and a capacitor 1142. Thus, the stability can be improved by adding a zero point in the frequency range of the double pole composed of the inductance L1 and the capacitance C1. Stability can also be improved by using AC current messages. For example, a stability circuit 1203 shown in FIG. 12 may include a resistor-capacitor (Rc) circuit 1226 that adds a zero in the frequency range of the double pole composed of the inductor L1 and the capacitor C1. point. Inductor resistance circuit 1226 can include a resistor R1 and a capacitor Ccomp in parallel. The voltage divider, consisting of resistors R1 and R2, scales the output voltage down to a desired value. The value of the capacitor Ccomp should be selected such that the resistor-capacitor circuit 1226 can add a zero point in the frequency range of the double pole composed of the inductor L1 and the capacitor C1. The relationship between the time constant of the resistor-capacitor circuit 1226 and the double pole position of the inductor and capacitor is experimentally derived and obtained by the simulation test, and is derived from equation (2). 3RC = Jlc (2) Figure 13 shows an amplifier 1324 having an amplification factor of n added to a stability circuit 1342. The input of the amplifier 1324 can be coupled to the node 1346, and the output of the amplifier 1324 can be coupled to the capacitor Ccomp. Thus, the output of the amplifier 1324 is coupled through a feedback voltage divider of the capacitor ccomp in parallel with the resistors R1 and R2. A resistor-capacitor circuit (rc) 1326 includes a capacitor Ccomp and a parallel resistor illusion. Thus, the stability of the DC/DC converter 1300 can also be improved by amplifying the AC current message. However, in order to keep the comparator n8 producing a clear and stable sense-modulated pulse wave, the magnitude of the amplification factor N has a specific range. For example, the feedback signal AC peak-to-peak amplitude should be less than the = value of the ramp reference signal 126. So, this requirement is met by limiting the amplification factor N. For example, if the peak-to-peak value of the voltage chopping at node 1346 is 10 millivolts and the amplitude of the ramp reference signal 126 is 1 volt, then the amplifier 1324 = the amplification factor should be less than 1 〇. The amplified chopped wave of the amplifier 1324 flows through the respective Ccomp, and at the chopping frequency, the chopping voltage will be nearly the same as the amplitude at the common node of the resistors ri and 112 and Ccomp. In one embodiment, an amplification factor N of about 5 or 6 is preferred. Those skilled in the art will appreciate that while the improvements in accuracy and stability illustrated in Figures 9-13 are applied to a single phase DC/DC converter, these improvements are equally applicable to multiphase DC/DC converters. Figure 14 is an exemplary circuit diagram of a DC/DC converter 1400 that enhances stability by detecting the on-resistance of the internal high side switch. The DC/DC converter 1400 is simple in configuration and has a faster transient response, as described in more detail below. In this embodiment, the DC/DC converter 1400 includes a reference DC voltage source 114, a reference signal generator U6, a comparator 118, a driver 12A'', a high side switch 1401, and a low side switch 1402. The DC/DC converter 1400 further includes a stability circuit 1410. The stability circuit 1410 is mainly formed by a switch 1403, a capacitor 1404, a current extractor 1405, a voltage divider 1406, and an operational amplifier 1407. Since the configuration of the DC/DC converter 1400 is similar to the above-described plurality of DC/DC converters, only the differences will be described below. The driver 120' controls the high side switch 1401 and the low side switch 1402. During a Ton period, the high side switch 1401 is closed and the inductor current (i.e., the load current) flows through the high side switch 1401. At this point the switch 1403 is also closed and the capacitor 1404 is charged. At the end of the Ton period, the 1331841 stores the power and keeps it. During this charging process, the 1405 at both ends of the capacitor is converted to a current. The current is not taken by her ^ is caught by the electric / and the device is taken. "," and ", take the internal configuration of the Ang 1405 will be = _ 〇 (that is, the current drawr 1405 ί; ? 404 404 is proportional to the two ends. The power is not ^ ^ ^ - transfer at the output and the The operational amplifier refers to a resistor 1408 between an inverting input. The output voltage v〇m at the 112 terminal is proportionally reduced by the voltage divider.

The voltage of Hri^Dut is equal to the reduced voltage and then transmitted to the non-inverting input terminal of the motor amplifier. The operation amplification ϋ 执行 performs an additive nose, and adds the equal-reduced voltage to another voltage, and the voltage is equal to the resistance current multiplied by the resistance of the resistor 14 〇 8. The operation 14G7 generates a feedback feed which can be input to the inverting input of the comparator 118. The feedback signal is affected by the output signal and the inductor current. In other words, the feedback signal includes the signal of the round-trip signal Vout and the inductor current.

Unlike the above embodiment of detecting an equivalent series resistance (ESR) of an inductor/capacitor and a current sense resistor, the DC/DC converter 14A is configured to detect the on-resistance of the high side switch 1401. Thus, the sense resistor is removed in the embodiment of Figure μ. The removal of the sense resistor makes the configuration simpler. Thus, the overall cost of the DC/DC converter is also in the embodiment shown in FIG. 14. The high-side switch 14〇1 is preferably a PMOS transistor. The terminal switch 1402 is preferably a sjMos transistor. Those skilled in the art will appreciate that the high side switch can also be an NM0S transistor. Since the driver 120' is used to provide control signals for the high side switch and the low side switch $, the internal configuration of the driver 120' can vary depending on the particular type of the high side switch and the low side switch in different applications. When the high side switch 1401 is an NMOS transistor, the driver 120 can also use the same configuration as the driver 120 already described above. Those skilled in the art will understand that although the accuracy and stability enhancement shown in Figure 14 is achieved on a single phase DC/DC converter, the multiphase DC/DC converter can achieve the same accuracy and stability. Improvement. 15 is an embodiment 1500 of the current skimmer 1405 of FIG. The current sink 1500 includes an operational amplifier 1501, a resistor 1502, a switch 1503, and two NMOS transistors 1504 and 1505. In this embodiment, the switch 1503 is typically a PMOS transistor, but NMOS transistors or other types of transistor switches can also be used. The transistors 1504 and 1505 form a current mirror. Those skilled in the art will appreciate that the specific configuration of the current mirror is not fixed and other types of configurations may be used. For example, the current mirror can be formed using two PMOS transistors. The operational amplifier 1501 receives the voltage held by the capacitor 1404. The operational amplifier 1501 and the resistor 1502 form a voltage follower such that the voltage from the capacitor 1404 is converted to a current through the resistor 1502. When the switch 1503 is turned off, the current flowing through the resistor 1502 produces a mirror image through the resistor 14 〇 8. In this embodiment, the resistor 1502 is matched to the resistor 1408. The resistance of the resistor 1502 can be N times the resistance of the resistor 1408. The current flowing through the resistors 1502 and 1408 shown in Figure 15 is equal, and those skilled in the art will appreciate that the current flowing through the resistors 1408 and 1502 can be a positive integer multiple. As already mentioned, the feedback signal is determined by the output voltage v〇ut and the current drawn through the resistor 1408, see equation (3). V^ = Vout_d + I\*R\ = Vout d+^P~VpEAK L*P] ^ - R2 Kl (3) where Vfb is the output voltage of the operational amplifier 1407, and v〇ut_d is the proportional reduction of the voltage divider 1406 The Vouts voltage, n is the current drawn through the resistor 214081, R1 is the resistance of the resistor 1408, and VPEAK_I is the voltage held by the capacitor 1404. If R1 = R2, then vjb = v〇ut_d + vAVD - vPEAKJ (4) In this embodiment, Vavd is equal to Vin; where Vin is the input voltage of the DC/DC converter 1400. (3)

Vfl = Vout_d + Vin-VPEAK ,

The current flowing through the high side switch 1401 (i.e., the inductor current) can be determined by equation (6). (6) (Vin-Vuc)

Ron where Ron is the on-resistance of the high side switch 1401. At the end of the Ton period, the voltage of node PEAK_I is derived from equation (7).

P^rnin (7) Thus, the current flowing through the high side switch 1401 at the end of the Ton period can be calculated by Equation (8). ILpeak = (yin-VPEAK Ron (8) Thus, combining equations (5), (7), and (8), the feedback signal can be derived from equation (9). (9) Υβ = Vout_d-\- ILpeak * Ron 22 1331841 The present invention is intended to be limited only by the invention, and is not to be construed as being limited to the invention. Example of range. [Simple description of the diagram]

The description of the specific embodiments of the present invention in conjunction with the accompanying drawings, 1 is a circuit diagram of an embodiment of a fast transient response DC/DC converter of the present invention; FIG. 2 is not an exemplary circuit diagram of the DC/DC converter of FIG. 1; Shown is a circuit diagram of an embodiment of a two-phase DC/DC converter coupled to a current balancing module of a signal applied to the second phase; A road map of another embodiment of a two-phase DC/DC converter, the "% phase m-transformer is coupled to a current balancing module of the two-phase feed portion; FIG. 5A shows the DC/ Schematic diagram of the output voltage of the DC converter varies; Figure 5B shows a schematic diagram of a scheme for compensating the output voltage with an input voltage; and Figure 6 is a circuit diagram of the mechanism for compensating the output voltage for changes in the input voltage; Figure 7 is a waveform diagram of the output dust, load current, and pulse width modulation signal when a load is applied to a two-phase DC/DC from the converter; Accuracy circuit Fan of the DC / DC switch, 'f heteroaryl circuit side in cents - New reference to improve the DC / DC converter output voltage accuracy; FIG. An exemplary DC, DC converter with a #European circuit, the accuracy circuit is used to improve the accuracy of the DC/DC converter output voltage. Figure 10 shows an exemplary DC/DC converter with a stability circuit that uses an inductor current message to improve the stability of the DC/DC converter; Figure 11 shows the demonstration in Figure 10. A DC/DC converter in which the stability circuit includes a resistor-capacitor (RC) circuit; Figure 12 shows an exemplary DC/DC converter with a stability circuit that uses AC (AC) Inductor current message to improve the stability of the DC/DC converter; Figure 13 shows an exemplary DC/DC converter in Figure 2, wherein the stability circuit includes an amplifier; Figure 14 is a A schematic diagram of a DC/DC converter using an inductor current message to improve stability; Figure 15 is an exemplary configuration of a current sink of the DC/DC converter of Figure 14. [Main component symbol description] 1〇〇: DC/DC converter 112: Output voltage (v〇ut) 114: Reference DC voltage source (Vref) 24 1331841 116 : Reference signal generator / ramp generator - 118, 119 : Comparator 120, 121: Driver 122: - Pair switch 126: Reference signal / Triangle wave signal 128: Pulse width modulation signal 200: DC/DC converter 202: Integrated reference voltage generator 204: Component U3 (LM311) ' 206 : U2 (LM311) ® 208 : U1 (TPS2830) 210 : Power Module 122 : MOSFETs Q1 and Q2 130 : Inductor L1 300 : Embodiment 100a of Two-Phase DC/DC Converter: First Phase 126a · Reference Signal 301: Current balancing module 100b: second phase • 3〇2: error amplifier 303: bias voltage 400: embodiment 401 of a two-phase DC/DC converter with a current balancing module: current balancing module 402: error amplifier 403: partial Set voltage 601: clock pulse 602: switch 603: capacitor 25 1331841 800: another embodiment of a DC/DC converter of the present invention • 802: accuracy circuit 806: bias voltage source *' 804: error amplifier 810 : Path 812: Road \DC Accuracy Loop • 900: Another embodiment of a DC/DC converter of the present invention 902: Accuracy Circuit 904: Error Amplifier '906: Bias Voltage Source* 910: Path 912: Path\DC Accuracy Loop 914: Path 1000: Another embodiment of the DC/DC converter of the present invention 1022: stability circuit 1026: operational amplifier 1030: sense resistor 1103: stability circuit 1140: resistance φ 1142: capacitor 1102: resistor-capacitor (RC) circuit 1203: Stability circuit 1226: Resistor-capacitor (RC) circuit 1324: Amplifier with amplification factor N 1326: Resistor-capacitor (RC) circuit 1342: Stability circuit 1346: Node 1300: DC/DC converter 1400: Typical transmission detection Internal high-side switch's on-resistance to enhance the stability of the 26 1331841 DC/DC converter schematic 120': driver 1401: high-side switch " 1402: low-side switch 1410: stability circuit 1403: switch 1404: capacitor 1405: current draw 1406: Voltage divider '4077: Operational Amplifier_1408: Resistor 1410: Stability Circuit 1500: Embodiment 1501 of Current Picker (1405): Operational amplifier 1502: resistance 150: Switch 1504: NMOS transistors 1505: NMOS transistors • 27

Claims (1)

1331841 The day of the month is revised.) Replacement page 96121245 Non-marking line May 10, 1999, the scope of application: 1. A DC/DC converter that converts the input voltage into an output voltage, including: The comparator is configured to compare a first signal and a second signal f to provide a control signal to echo the result of the first signal and the second signal, the first 彳§ has a DC offset, the DC offset At least a portion of the DC reference power mosquito 'the second signal represents the output voltage of the DC/DC converter; and a second driver that receives the control signal from the comparator; Connected to the rider, the high-side switch receives the voltage; the steady-state circuit 'detects the voltage signal and generates the number based on the signal, and provides the second signal to the comparator, and The voltage signal represents a load current flowing through the high-side switch; 2 the driving drive _ high-marriage to control the output voltage of the DC/DC converter. The DC/DC converter of claim 1, wherein the voltage is generated according to the high-side on-resistance and flowing through the load current. The DC/DC converter of item 1 of the 3m range further includes a low ^ switch 'the low reading is controlled by the driver. The DC 7 DC converter according to Item 1 of the Xianyiwei, further includes a power grid circuit. The capacitor (LC) network includes an inductor, wherein the inductor is connected to the high side, and the load current flows through the inductor. . 28 1331841 96i2·Non-lined "Year May> Year Factory & Repair (more; 眢 眢 j ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' The load current is an alternating current. 6. The DC/DC converter of claim 1, wherein the stability circuit further comprises a resistor network, wherein the resistor network is used to scale down the The output voltage of the DC/DC converter generates a proportionally reduced signal. 7. The DC/DC converter of claim 6, wherein the stability power further includes a switch and a capacitor. And a current extractor, the switch and the electric power can respectively transmit the voltage signal to the current extractor, and the current extractor can convert the voltage signal into a current drawn in proportion to the voltage signal. The DC/DC converter of the seventh aspect of the patent, wherein the conversion circuit further includes an operational amplifier, the operational amplifier is connected to the reduced voltage and the voltage signal determined by the load current and provides the The second ## gives the ratio 9. The DC/DC converter of claim 7, wherein the current extractor further comprises: a dust collector that receives the voltage signal and converts the voltage signal Forming an intermediate current; a second switch coupled to the voltage follower; and an electric, <IL mirror 'when the switch is closed, the current is configured based on the median current to provide a Mirror current 'This mirror current represents the load current flowing through the high side switch and the inductor. / ^ 10. - A DC/DC converter that converts the input voltage to an output voltage, including: 29 1331841 96121245 Non-lined May 1999! will r, a comparator 'the comparator is configured to compare a second supply-control signal to reflect the comparison of the first signal and the second signal. The signal has a DC offset, the DC offset The second signal represents at least part of the output of the DC/DC converter, and the driver receives the control code from the comparator. At least one switch to the market The drive, the At least-opening an 'inductance coupled to the at least one switch; 'a voltage signal and generating the second '' symbol to the comparator based on the MN signal, and the voltage signal represents flowing through the at least one switch And an inductor current of the inductor; the ίΐί actuator drives the at least-switch to control the DC/DC converter. 11. The DC/DC converter described in the patent scope S1〇 cries, the number 2 is based on the at least - an on-resistance of the switch and the t-induction of the t-voltage. I2. For application of the DC/DC converter described in item 1G, wherein the stability comprises a resistor network, the resistor network is used to DC / if change _ the output voltage, etc. _ shrink and produce - scaled down 13. As described in the scope of the dc-dc converter described in 帛12, the deterministic electricity in the basin, including - switch, a capacitor and A current sinker is turned on 2 and the voltage is transmitted to the current sinker, and the current sinker converts the voltage signal into a current that is proportional to the voltage signal. 14. For example, a DC/DC converter as described in Item 13 of the patent application, which is stable, 30 96121245, non-marked, May, 1970, Senna, page 10; The month k 2f * includes an operational amplifier that receives the voltage signal determined by the second and the current and provides the DC/DC lion, wherein the electrical converter converts the voltage to the voltage The follower receives the voltage signal and the voltage signal, the value of the current; to the second switch of the voltage follower; and a shunt that the second switch is closed, based on the median current is configured to provide the inductor current ;11", the mirror current represents the current flowing through the high side switch and the inductor 31