TWI391045B - Hybrid embedded device structures and fabrication methods thereof - Google Patents

Description

Composite embedded component structure and manufacturing method thereof

The present invention relates to a buried electronic component structure, and more particularly to a composite buried component structure capable of withstanding stress changes and a method of fabricating the same.

The development trend of electronic products has gradually evolved into the fields of light, thin, short, small, high speed, high frequency and multi-function. In order to meet the needs of practical applications, semiconductor packaging technology has gradually evolved from a ball grid array (BGA) package and a flip chip (FC) to a three-dimensional (3D) stacked structure. Alternatively, in a board surface package, various packages are assembled and joined by FC technology or wire bond (WB) technology to form a multifunctional structure.

In the prior art, the active device wafer and the carrier are assembled into a package by using FC technology or WB technology, and more than one package is stacked or mounted on the same carrier. Considering the connection between components, interconnecting each other, and increasing the area/volume ratio of the surface of the carrier, the wiring becomes more and more difficult. Therefore, the industry has begun to develop technologies for embedding active or passive components in the carrier.

In the conventional buried carrier, since the formed substrate structure is composed of different materials, different stress changes are caused under different environments and temperature changes, and the deformation and expansion of the substrate are changed, resulting in production difficulties and The impact is not easy, the yield is reduced, and the reliability is not good.

An embodiment of the present invention provides a composite embedded component structure, comprising: a composite substrate structure composed of at least two core substrates, wherein the at least two core substrates are bonded by a bonding layer; and the first opening is in an upper core The substrate has a second opening in the lower core substrate, wherein the first opening is larger than the second opening to form an inverted convex space; and the wafer has a first set of electrical contact pads fixed to at least two insulating materials Laminating and inserting the inverted convex space, wherein the wafer is buried in the second opening and has a gap with the lower core substrate; the plurality of guiding holes penetrate the at least two material stack Correspondingly and electrically connecting the electrical contact pads; and an insulating layer disposed on the composite substrate structure and covering the conductive vias and the at least two insulating materials on the laminate.

An embodiment of the present invention further provides a composite embedded component structure, including: a first embedded package component comprising: a first composite substrate structure formed by a first and a second core substrate, the first and the first The two core substrates are combined by a first bonding layer, wherein an inverted convex space is formed in the first and second core substrates; a first wafer has a first set of electrical contact pads fixed to at least two insulation layers a material stack, and is embedded in the inverted convex space, wherein a gap is formed between the first wafer and the second core substrate; a plurality of guiding blind holes penetrate the at least two insulating material stacks, and a first set of electrical contact pads; a first insulating layer disposed on the first composite substrate structure and covering the via holes and the at least two material stacks; and a first build-up structure disposed on the first On the insulating layer; a second embedded package member includes: a second composite substrate structure composed of a third and a fourth core substrate, wherein the third and fourth core substrates are combined by a second bonding layer. One of the embossed spaces is formed in the first And a fourth core substrate; a second wafer having a second set of electrical contact pads fixed on the at least two insulating material stacks and embedded in the embossed space, wherein the second wafer and the fourth core substrate Having a gap therebetween; a plurality of guiding blind holes penetrating the at least two insulating material stacks, and a second set of electrical contact pads; a second insulating layer disposed on the second composite substrate structure and covering the a guide hole and the at least two material layers; and a second build-up structure disposed on the second insulation layer; wherein the first and second buried package members are disposed back to back with a third Bonding layer bonding.

The embodiment of the present invention further provides a method for fabricating a composite embedded component structure, comprising: providing a wafer having a first set of electrical contact pads, fixed on at least two layers of insulating material to form a pre-package; a composite structure comprising a pre-package body, a first core board and a second core board, wherein the first and second core boards are combined by a first bonding layer, wherein the composite structure has an inverted convex shape Space, and the pre-package is buried in the inverted convex space, and a gap between the wafer and the second core substrate; forming a plurality of blind vias penetrating the at least two insulating material stacks, and Corresponding to the electrical contact pads; forming an insulating layer disposed on the composite structure and covering the conductive vias and the at least two insulating material layers; and forming a build-up structure disposed on the insulating layer.

The embodiment of the present invention further provides a method for fabricating a composite buried component structure, comprising: providing a first wafer having a first set of electrical contact pads and a second wafer having a second set of electrical contact pads, fixed to at least a first and a second pre-package formed by laminating the two insulating material laminates; a first embedded package member formed by pressing the first pre-package, a first core plate and a second core plate And a second embedded package member comprising the second pre-package, a third core plate and a fourth core plate, wherein the first and second core plates are combined by a first adhesive layer, wherein The composite structure has an inverted convex space, and the first pre-package is buried in the inverted convex space, and a gap is formed between the first wafer and the second core substrate; wherein the third And the fourth core board is coupled by a second bonding layer, wherein the composite structure has a convex space, and the second pre-package is buried in the convex space, and the second wafer and the a gap between the fourth core substrates; Wherein the first and second embedded package members are disposed back to back, and are coupled by a third adhesive layer; forming a plurality of guide holes respectively penetrating the at least two insulation material stacks, and corresponding to the first group and a second set of electrical contact pads; a first insulating layer is disposed on the first embedded package member, and covers the via holes and the at least two insulating material layers, and forms a second insulating layer And disposed on the second buried package member and covering the conductive vias and the at least two insulating material layers; and forming a first build-up structure disposed on the first insulating layer, and forming a first The second build-up structure is disposed on the second insulating layer.

In order to make the invention more apparent, the following detailed description of the embodiments and the accompanying drawings are as follows:

The following is a detailed description of the embodiments and examples accompanying the drawings, which are the basis of the present invention. In the drawings or the description of the specification, the same drawing numbers are used for similar or identical parts. In the drawings, the shape or thickness of the embodiment may be expanded and simplified or conveniently indicated. In addition, the components of the drawings will be described separately, and it is noted that the components not shown or described in the drawings are known to those of ordinary skill in the art, and in particular, The examples are merely illustrative of specific ways of using the invention and are not intended to limit the invention.

In view of this, embodiments of the present invention provide a composite embedded electronic component package structure capable of withstanding stress changes, embedding a wafer set having a composite structure into a substrate, the structure can withstand stress increase and decrease, and reduce substrate response The deformation caused by the change in force.

1 to 11 are cross-sectional views showing the manufacturing method of the composite embedded element structure according to an embodiment of the present invention, in each process step. Referring to FIG. 1, a carrier board 110, a first insulating film 122, and a second insulating film 124 are first provided and pressed into a composite carrier structure. The use of the carrier plate 110 is mainly carried, and will be removed in subsequent processes, so the material is not limited. The first insulating film 122 and the second insulating film 124 are made of different materials, the first insulating film 122 has good stress resistance (for example, polyacrylamide (PI)), and the second insulating film 124 is mainly made of a resin material (for example, ABF resin).

Referring to FIG. 2, a plurality of wafers 130 are inverted and attached to the second insulating film 124, and then the second insulating film 124 is cured by a baking step. The wafer 130 is an electronic device fabricated by a semiconductor process, the main components of which are disposed on an active surface and connected to the surface contact pads 132 by metallization wires. The active surface of the wafer 130 faces the second insulating film 124 of the composite carrier structure such that the contact pads 132 are buried in the second insulating film 124.

Referring to FIG. 3, the carrier board 110 is removed to separate the carrier board 110 from the first insulating film 122, and the first insulating film 122 is used as a release film. In one embodiment, a portion of the release film may be removed or etched during removal of the carrier sheet. Next, a cutting step 135 is performed to separate into separate pre-packages 100. The pre-package 100 includes the width of the wafer portion 130 being And the width of the composite carrier plate portion is L.

Referring to FIG. 4, the first core plate 210 is respectively milled into a first window 215 by a molding machine, and the second core plate 220 is grounded to form a second window 225. A first window size greater than or equal to about 215 the width of the composite carrier plate portion is L, the second window size greater than about 225, or portions equal to the width of the wafer 130 is l.

Next, referring to FIG. 5, the pre-package 100, the first core board 210, and the second core board 220 are assembled. A bonding layer (for example, polypropylene (PP)) 230 is interposed between the first core board 210 and the second core board 220, and the composite carrier board of the pre-package 100 is partially buried in the first window 215 of the first core board 210. The thermal compression is performed so that the pre-package 100 is buried in the first core plate 210 and the second core plate 220. Since there is only a slight gap between the pre-package body 100 and the first window 215, the material of the bonding layer flows in accordance with the minute pores during the thermocompression bonding process. According to an embodiment of the present invention, the thickness of the first core plate 210 is approximately equal to the thickness of the first and second insulating film composite layers. In another embodiment, a gap 229 is left between the pre-package 100 and the second window 225. The thickness of the second core plate 220 is greater than or equal to the thickness of the wafer 130 leaving a void 228, as shown in FIG.

It should be noted that although the embodiment of the present invention is a composite structure in which the first and second core plates are pressed together, the present invention is not limited thereto, and a multi-layer stacked core plate may also be selected. In one embodiment, the slits 229 and the voids 228 can eliminate the thermal stress of the package 100, or a thermal adhesive (not shown) can be filled into the slits 229 and the voids 228 to derive the thermal stress generated by the package 100.

Referring to FIG. 7, a laser drilling process is implemented to form a plurality of openings 150, corresponding to the respective contact pads 132, penetrating the first and second insulating films 122, 124 to expose the surface of the contact pads 132. The opening 150 is of a blind hole type, and other processes such as photoresist lithography and etching processes may be used to form the opening 150 corresponding to the position of each contact pad 132.

Next, referring to FIG. 8, a conductive layer 240 is formed on the first core plate 210 and the first insulating film 122, and is compliantly filled into the surface of the opening 150. The method of forming the conductive layer 240 includes a sputtering method, a coating method, a physical vapor deposition method (PVD), or a chemical vapor deposition method (CVD). Next, a photoresist layer 250 is attached to the conductive layer 240, and image transfer is performed to form an open loop to expose the opening 150 region.

Referring to FIG. 9, electroplating is performed to form an electroplated metal 260 (eg, copper/tin/tin-silver-copper/nickel/aluminum/tungsten/the above or other alloy) in the open loop to fill the opening 150 and the contact pad 132. contact. Next, referring to FIG. 10, the photoresist layer 250 is removed, and the excess conductive layer 240 is removed by etching to expose the first core plate 210. Then, an insulating film 270 is pressed onto the first core plate 210 and the plating metal 260 to complete the fabrication of the embedded component structure package 200.

It should be understood that in another embodiment, the build-up structure may be formed by forming a plurality of insulating layers and a metallization process, including the interlayer dielectric layer 310, the interconnect wires 320, and the conductive metal blind holes 330, 360. As shown in Figure 11. Then, the SR and B/E processes are subsequently performed to complete the fabrication of the board.

According to the embodiment of the present invention, the composite substrate structure is formed by sandwiching the adhesive layer between the plurality of core plates, which can absorb the change of the stress and slow the deformation of the substrate. Furthermore, a composite structure in which an insulating film (for example, ABF resin) is bonded to a release film (for example, PI) at the electrical connection end of the wafer absorbs stress changes and slows the deformation of the wafer due to stress changes. What is more, the damage and fracture of the electrical connection structure of the wafer due to the change of stress can also be reduced by the structural design. Since the embedded wafer group adopts a composite structure, it has the effect of undergoing stress change, and the design of the composite core plate can further enhance the tolerance of stress variation. In addition, the chipset It is pressed into the core plate by means of embedding, so the wafer is excellent in fixing property and does not fall off due to external force. Furthermore, a hollow design is employed below the wafer to form a void structure. When the substrate is inflated and contracted, it does not affect the structure of the main body. In addition, it is also possible to fill in the thermal conductive adhesive and transfer the thermal energy generated by the wafer by conduction.

12 to 19 are cross-sectional views showing the manufacturing method of the composite buried component structure according to another embodiment of the present invention, in each process step. Referring to FIG. 12, two sets of components are press-fitted, including a first set of pre-packages 100a, a first core board 210a and a second core board 220a, and a first set of pre-packages 100b and third core boards 210b. And the fourth core plate 220b is assembled and assembled. A bonding layer (for example, polypropylene (PP)) 230a is interposed between the first core board 210a and the second core board 220a, and the composite carrying board of the first pre-package 100a is partially buried in the first window of the first core board 210a. The thermal bonding is performed such that the first pre-package 100a is buried in the first core board 210a and the second core board 220a. At the same time, a bonding layer (for example, polypropylene (PP)) 230b is interposed between the third core board 210b and the fourth core board 220b, and the composite carrying board of the second pre-package 100b is partially buried in the third core board 210b. In a window, thermal compression is performed such that the second pre-package 100b is buried in the third core board 210b and the fourth core board 220b. Since there is only a slight gap between the first and second pre-package bodies 100a and 100b and the windows of the second and fourth core plates, during the thermal compression process, the material of the bonding layer flows along the tiny pores and is in the gap. Between the gaps 229a and 229b are left. The thickness of the second core plate 220a is greater than or equal to the thickness of the wafer 130a and leaves a void 228a. Similarly, the thickness of the fourth core plate 220b is greater than or equal to the thickness of the wafer 130b, leaving a void 228b as shown in FIG.

Referring to FIG. 14, a laser drilling process is implemented to form a plurality of openings 150a corresponding to the respective contact pads 132a, penetrating the first and second insulating films 122a, 124a, the surface of the contact pad 132a is exposed. In contrast, a laser drilling process may be additionally performed to form a plurality of openings 150b corresponding to the respective contact pads 132b, penetrating the third and fourth insulating films 122b, 124b to expose the surface of the contact pads 132b. The openings 150a, 150b are of a blind hole type, and other processes, such as photoresist lithography and etching processes, may be used to form the openings 150a, 150b corresponding to the locations of the respective contact pads 132a, 132b.

Next, referring to FIG. 15, a first conductive layer 240a is formed on the first core plate 210a and the first insulating film 122a, and is compliantly filled in the surface of the opening 150a. In contrast, a second conductive layer 240b is formed on the third core plate 210b and the third insulating film 122b, and is compliantly filled in the surface of the opening 150b.

The method of forming the first and second conductive layers 240a, 240b includes a sputtering method, a coating method, a physical vapor deposition method (PVD), or a chemical vapor deposition method (CVD). Next, a photoresist layer 250a is attached to the first conductive layer 240a, and image transfer is performed to form an open loop, expose an area of the opening 150a, and attach another photoresist layer 250b to the second conductive layer 240b, and perform The image is transferred to form an open loop, exposing the area of the opening 150b.

Referring to FIG. 16, electroplating is performed to form an electroplated metal 260a (eg, copper/tin/tin-silver-copper/nickel/aluminum/tungsten/the above or other alloy) in the open loop to fill the opening 150a and the contact pad 132a. Contact and plating metal 260b (eg, copper/tin/tin-silver-copper/nickel/aluminum/tungsten/the above or other alloys) in the open loop fills the opening 150b in electrical contact with contact pad 132b.

Next, referring to FIG. 17, the photoresist layers 250a, 250b are removed, and the excess first and second conductive layers 240a, 240b are etched away to expose the first core board 210a and the third core board 210b. Next, a first insulating film 270a is pressed onto the first core plate 210a and the plating metal 260a, and a second insulating film 270b is pressed onto the third core plate 210b and the plating metal 260b.

Please refer to Figure 18, which can be formed by forming multiple layers of insulation and metallization. And forming a build-up structure on the first and second insulating films 270a, 270b, respectively. The build-up structure on the first insulating film 270a includes an interlayer dielectric layer 310a, an interconnecting line 320a, and conductive metal blind holes 330a, 360a. The build-up structure on the second insulating film 270b includes an interlayer dielectric layer 310b and an inner layer. Wire 320b and conductive metal blind holes 330b, 360b.

Next, a via structure can be simultaneously formed in the process of forming the buildup structure. Referring to FIG. 19, a via structure 500 is formed in a peripheral region of the chip package. The inner sidewall of the via structure 500 has a conductive layer 510, so that the upper and lower wafer stacks 100a and 100b can be electrically connected by the conductive layer 510. . The via hole is internally filled with an insulating material or a hole material 520. Next, the SR and B/E processes are subsequently performed to complete the fabrication of the two-layer or multi-layer buried component structure package 400.

On the other hand, it is also possible to select that no via structure is formed in the peripheral region of the chip package. That is, after the build-up structure is completed, the adhesive layer 410 is removed by physical stripping or chemical etching to separate the package into two separate buried device structure packages 200a and 200b, as shown in FIG. Then, the SR and B/E processes are separately performed to complete the fabrication of the board.

It should be noted that the wafers used in the embodiments disclosed in the present invention are not limited to single-sided wafers, that is, the active components are not only fabricated on one side of the wafer, but also double-sided wafers or three-dimensional stacked wafers. Referring to FIG. 21, using the process steps of the embodiment disclosed in FIGS. 1-11, a three-dimensional stacked wafer 100c is used, and the contact pads 132a and 132b are provided on both sides, and the through holes through the wafer are also referred to as through silicon. The via, TSV) 650 electrically connects the contact pads 132a and 132b and the active components. After the first layer of the build-up structure is completed, the interlayer dielectric layer 310, the interconnect wires 320, and the conductive metal blind holes 330, 360 are formed to electrically connect the front contact pads 132a, and then the second surface. Layered structure, including forming an interlayer dielectric layer 710, an interconnect 720 and conductive metal blind holes 730, 760 to electrically connect the back contact pads 132b. Next, the SR and B/E processes are subsequently performed to complete the fabrication of the two-layer or multi-layer buried component structure package 600.

According to the embodiment of the present invention, the two-layer composite structure above the wafer is mainly composed of two or more types of insulating films. The double-layer composite structure is designed primarily to offset the stresses that cause deformation of the substrate. If the substrate material is bent downwards, a harder material can be used under the composite to resist downward bending stress. For example, by using ABF and PI materials, since PI is harder than ABF after baking, it can be placed under the ABF to resist downward deformation stress. Furthermore, the two materials used in the composite layer structure can be determined depending on the condition of the substrate. For example, the substrate is bent upward or downward to determine the relative position of the two insulating materials. The thickness and type of the insulation material are determined according to the actual product requirements, and are carried out in an optimized implementation method. In addition, the type of the insulating material may be, for example, an insulating material used in a general circuit board boundary, such as ABF, PP, or PI, or a material such as a polymer, such as PMMA or PVC.

The present invention has been disclosed in the above preferred embodiments, and is not intended to limit the scope of the present invention. Any one of ordinary skill in the art can make a few changes without departing from the spirit and scope of the invention. The scope of protection of the present invention is therefore defined by the scope of the appended claims.

100, 100a, 100b. . . Pre-package

110. . . Carrier board

122, 122a, 122b. . . First insulating film

124, 124a, 124b. . . Second insulating film

130, 130a, 130b. . . Wafer

132, 132a, 132b. . . Contact pad

135. . . Cutting step

150, 150a, 150b. . . Opening

200, 200a, 200b. . . Buried component structure package

210, 210a. . . First core board

210b. . . Third core board

215. . . First window

220, 220a. . . Second core board

220b. . . Fourth core board

225. . . Second window

L. . . The width of the composite carrier plate section

. . . Width of the wafer portion

230, 230a, 230b. . . Bonding layer

228, 228a, 228b. . . Void

229, 229a, 229b. . . Gap

250, 250a, 250b. . . Photoresist layer

260, 260a, 260b. . . Plating metal

270, 270a, 270b. . . Insulating film

310, 310a, 310b. . . Interlayer dielectric layer

320, 320a, 320b. . . Internal connection

330, 330a, 330b, 360, 360a, 360b. . . Conductive metal blind hole

400. . . Buried component structure package

410. . . Bonding layer

500. . . Via structure

510. . . Conductive layer

520. . . Perforated material

600. . . Buried component structure package

650. . . Via through the wafer

710. . . Interlayer dielectric layer

720. . . Internal connection

730, 760. . . Conductive metal blind hole

1 to 11 are cross-sectional views showing the manufacturing method of the composite embedded element structure according to an embodiment of the present invention, in each process step.

12 to 19 are cross-sectional views showing the manufacturing method of the composite buried component structure according to another embodiment of the present invention, in each process step.

Figure 20 is a cross-sectional view showing the step of removing the bonding layer to separate the double-sided package into two separate buried component structure packages 200a and 200b in accordance with an embodiment of the present invention.

Fig. 21 is a cross-sectional view showing a buried element structure package 600 employing a three-dimensionally stacked wafer having a double-sided build-up structure according to an embodiment of the present invention.

130. . . Wafer

132. . . Contact pad

200. . . Buried component structure package

210. . . First core board

220. . . Second core board

230. . . Bonding layer

260. . . Plating metal

270. . . Insulating film

Claims (24)

A composite embedded component structure includes: a composite substrate structure composed of at least two core substrates, wherein the at least two core substrates are bonded by a bonding layer; a first opening is in an upper core substrate, and a first Opening in the lower core substrate, wherein the first opening is larger than the second opening to form an inverted convex space; a wafer has a first set of electrical contact pads fixed on at least two insulating material stacks and inlaid Into the inverted convex space, wherein the wafer is buried in the second opening and has a gap with the lower core substrate; the plurality of guiding holes penetrate the at least two material stacks, correspondingly and electrically connected The electrical contact pads are disposed on the composite substrate structure and cover the conductive vias and the at least two insulating materials. The composite embedded component structure of claim 1, further comprising a build-up structure disposed on the insulating layer, wherein the build-up structure comprises an interlayer dielectric layer, an interconnecting wire and a conductive metal A blind via to electrically connect the electrical contact pads of the wafer. The composite embedded component structure of claim 1, wherein the at least two insulating material laminates comprise a composite structure of a first insulating layer and a second insulating layer. The composite embedded component structure of claim 3, wherein the first insulating layer has good stress resistance, including poly-liminamide (PI). The composite embedded component structure of claim 3, wherein the second insulating layer comprises an ABF-based resin material. The composite buried component junction as described in claim 1 The structure further includes a thermal conductive adhesive filled into the gap to derive thermal stress generated by the wafer. The composite embedded component structure of claim 1, wherein the material of the adhesive layer comprises polypropylene (PP). The composite embedded component structure of claim 1, wherein the wafer is a double-sided wafer having a second set of electrical contact pads on the back surface of the wafer, and at least one through-wafer via hole The first set and the second set of electrical contact pads are electrically connected. The composite buried component structure of claim 8, further comprising an additional buildup structure disposed on the back surface of the wafer, wherein the additional buildup structure comprises an interlayer dielectric layer and an interconnect The wire and a conductive metal blind hole are electrically connected to the second set of electrical contact pads of the wafer. A composite embedded component structure includes: a first embedded package component, comprising: a first composite substrate structure composed of a first and a second core substrate, wherein the first and second core substrates are a first bonding layer is combined, wherein an inverted convex space is formed in the first and second core substrates; a first wafer has a first set of electrical contact pads fixed on at least two insulating material stacks, and Inserting into the inverted convex space, wherein a gap exists between the first wafer and the second core substrate; a plurality of guiding blind holes penetrate the at least two insulating material stacks, and the first set of electrical contacts a first insulating substrate is disposed on the first composite substrate structure and covers the conductive vias and the at least two insulating material layers; and a first build-up structure is disposed on the first insulating layer; The second embedded package member includes: a second composite substrate structure composed of a third and a fourth core substrate, wherein the third and fourth core substrates are combined by a second bonding layer, wherein a convex space is formed in the third and fourth a second substrate having a second set of electrical contact pads fixed on the at least two insulating material stacks and embedded in the embossed space, wherein the second wafer and the fourth core substrate have a gap; a plurality of guiding blind holes penetrating the at least two insulating material stacks, and a second set of electrical contact pads; a second insulating layer disposed on the second composite substrate structure and covering the guiding holes And the at least two insulating materials are stacked on the second insulating layer; wherein the first and second embedded packaging members are disposed back to back with a third bonding layer therebetween Combine. The composite embedded component structure of claim 10, further comprising a conductive layer on the inner sidewall of the via structure, such that the first and second buried package members are electrically connected by the conductive layer connection. The composite embedded component structure of claim 10, wherein the material of the third adhesive layer comprises polypropylene (PP). A manufacturing method of a composite embedded component structure, comprising: providing a wafer having a first set of electrical contact pads fixed on at least two insulating material stacks to form a pre-package; pressing the pre-package, a first a composite structure comprising a core board and a second core board, wherein the first and second core boards are combined by a first bonding layer, wherein the composite structure has an inverted convex space, and the pre-package body Inserted into the inverted convex space, and a gap between the wafer and the second core substrate; Forming a plurality of guiding blind holes penetrating the at least two insulating material stacks, and corresponding to the electrical contact pads; forming an insulating layer disposed on the composite structure, and covering the guiding blind holes and the at least two insulating material stacks And forming a build-up structure disposed on the insulating layer. The method of fabricating a composite embedded device structure according to claim 13, wherein the build-up structure comprises an interlayer dielectric layer, an interconnecting wire and a conductive metal blind via to electrically connect the wafer. Electrical contact pads. The method of manufacturing a composite embedded component structure according to claim 13, wherein the at least two insulating material laminates comprise a composite structure of a first insulating layer and a second insulating layer. The method of fabricating a composite embedded component structure according to claim 15, wherein the first insulating layer has good stress resistance, including poly-liminamide (PI). The method of manufacturing a composite embedded component structure according to claim 15, wherein the second insulating layer comprises an ABF-based resin material. The method for fabricating a composite embedded component structure according to claim 13 further includes filling a gap of a thermal conductive adhesive to derive thermal stress generated by the wafer. The method for manufacturing a composite embedded component structure according to claim 13, wherein the material of the adhesive layer comprises polypropylene (PP). The method of fabricating a composite embedded component structure according to claim 13, wherein the wafer is a double-sided wafer having a second set of electrical contact pads on the back surface of the wafer, and by at least one through-wafer The vias are electrically connected to the first group and the second group of electrical contact pads. Composite buried component junction as described in claim 20 The manufacturing method further includes forming an additional build-up structure on the back surface of the wafer, wherein the additional build-up structure comprises an interlayer dielectric layer, an interconnect and a conductive metal blind via to electrically connect A second set of electrical contact pads of the wafer. A manufacturing method of a composite embedded component structure, comprising: providing a first wafer having a first set of electrical contact pads and a second wafer having a second set of electrical contact pads fixed on at least two insulating material stacks, Cutting and separating into a first and a second pre-package; pressing a first pre-package body, a first core board and a second core board to form a first embedded package member and the second pre-package a second embedded package member comprising a third core plate and a fourth core plate, wherein the first and second core plates are joined by a first adhesive layer, wherein the composite structure has an inverted convex a font space, and the first pre-package is embedded in the inverted convex space, and a gap between the first wafer and the second core substrate; wherein the third and fourth core boards are borrowed Bonded by a second bonding layer, wherein the composite structure has a convex space, and the second pre-package is embedded in the convex space, and the second wafer and the fourth core substrate are a void; and wherein the first and second buried The package member is disposed back to back, and is coupled by a third bonding layer; forming a plurality of guiding holes respectively penetrating the at least two insulating material stacks, and corresponding to the first group and the second group of electrical contact pads; forming a first insulating layer is disposed on the first embedded package member, and covers the via holes and the at least two insulating materials, and a second insulating layer is disposed on the second buried package. And covering the guiding blind holes and the at least two insulating material layers; and forming a first build-up structure disposed on the first insulating layer, and forming A second build-up structure is disposed on the second insulating layer. The method for fabricating a composite embedded component structure according to claim 22, further comprising forming a via structure penetrating the first and second buried package members, wherein the via sidewalls are on the inner sidewalls A conductive layer is disposed such that the first and second buried package members are electrically connected by a conductive layer. The method of fabricating a composite embedded component structure according to claim 22, further comprising removing the third adhesive layer to separate into two separate first and second buried package members.