TWI381466B - Flip chip bonding method for non-array bumps - Google Patents

Description

Flip chip bonding method for non-array bumps

The present invention relates to a fabrication technique for a semiconductor device, and more particularly to a flip chip bonding method for a non-array bump.

Flip Chip Package Technology is widely used in the field of chip packaging because of its advantages of reducing package area and shortening signal transmission path. In order to fully connect the wafer to the substrate, an underfill is usually filled between the wafer and the substrate to balance the difference in thermal expansion coefficient between the wafer and the substrate, and to completely bond the wafer to the substrate, and to protect the interface between the wafer and the substrate. Protect it from the environment (such as moisture).

However, in the conventional flip chip bonding process, the bumps must be arranged in an array, otherwise the wafer cannot obtain uniform and good support during bonding, which leads to wafer tilt problem, and generally the pad of the wafer is non-array configuration, so the crystal is An additional re-distribution layer (RDL) is required in the circular manufacturing process to obtain array bumps, but this results in an increase in wafer cost. For example, when the non-array bumps are used, especially the bumps of the wafer are centrally arranged, when the flip chip bonding is performed, the wafer lacks a balanced support point, and the upper and lower swings and tilts are caused like a seesaw. A plurality of resin stoppers are disposed between the substrate and the wafer to support the periphery of the active surface of the wafer. The related patents can be found in the US Patent No. 6,577,014 B2 "LOW-PROFILE SEMICONDUCTIVE DEVICE" and the new patent publication No. M345344 "Flip-chip package structure with non-array bumps". However, when the underfill is filled in this technique, the stoppers hinder the flow thereof, and since the stoppers are different from the material of the underfill, compatibility problems are easily generated, resulting in bonding. Poor force or cracking.

In order to solve the above problems, the main object of the present invention is to provide a flip chip bonding method for non-array bumps, which can properly maintain the parallelism between the wafer and the substrate, so that the wafer can be stably disposed on the substrate to enhance the overlay. The quality of the crystal bond allows the underfill to easily fill the gap between the wafer and the substrate, and there is no problem with the compatibility of the conventional resin stopper with the underfill.

The object of the present invention and solving the technical problems thereof are achieved by the following technical solutions. The present invention discloses a flip chip bonding method for non-array bumps, comprising the steps of: firstly, providing a bump wafer having an active surface on which a plurality of bumps are disposed. Next, a substrate is provided having an upper surface on which a plurality of connection pads are formed. Thereafter, a plurality of sacrificial stops are disposed on the upper surface of the substrate, and the sacrificial stops are not covered to the connection pads. Thereafter, the bumped wafer is flipped over the upper surface of the substrate in such a manner that the active surface faces the substrate, wherein the bumps are bonded to the connection pads, and the sacrificial stoppers are in contact Respond to the active surface. Thereafter, the sacrificial stops are removed. Finally, an underfill is filled between the bumped wafer and the substrate.

The object of the present invention and solving the technical problems thereof can be further achieved by the following technical measures.

In the aforementioned flip chip bonding method, the sacrificial stoppers may be in a block symmetrical configuration.

In the foregoing flip chip bonding method, the sacrificial stoppers may be fluxes, and the above method of removing the sacrificial stoppers is heating.

In the foregoing flip chip bonding method, the step of disposing the bumped wafer and the removing step of the sacrificial stopper are continuously performed.

In the foregoing flip chip bonding method, the method of forming the sacrificial stopper may be selected from one of printing, screen printing, stencil printing, and transfer.

In the foregoing flip chip bonding method, the sacrificial stoppers may be photoresists, and the above method of removing the sacrificial stoppers is to remove photoresist.

In the above flip chip bonding method, the bumps may be in a non-array type to omit a reconfigured wiring layer.

In the above flip chip bonding method, the bumps may be arranged at the center of the active surface.

In the above flip chip bonding method, the bumps may be arranged around the active surface.

In the foregoing flip chip bonding method, the bumped wafer system may have a plurality of pads, and the bumps are immediately adjacent or aligned on the pads.

In the above flip chip bonding method, the bumps may be columnar conductors.

In the above flip chip bonding method, in the step of providing the bumped wafer, the top surface of each bump may be provided with solder.

In the above flip chip bonding method, the method further includes the step of: providing a plurality of external terminals on a lower surface of the substrate.

It can be seen from the above technical solutions that the flip chip bonding method of the non-array bump of the present invention has the following advantages and effects:

1. Using a sacrificial stop formed on the upper surface of the substrate as one of the technical means, the parallelism between the bumped wafer and the substrate can be controlled, so that the wafer can be stably disposed on the substrate to enhance the flip chip bonding. Quality.

2. By removing the sacrificial stop as a technical means after bonding the bumped wafer to the substrate, the underfill can easily fill the gap between the bumped wafer and the substrate, and will not There are problems with the compatibility of conventional resin stoppers and underfills.

The embodiments of the present invention will be described in detail below with reference to the accompanying drawings in which FIG. The components and combinations related to this case, the components shown in the figure are not drawn in proportion to the actual number, shape and size of the actual implementation. Some size ratios are proportional to other related sizes or have been exaggerated or simplified to provide clearer description of. The actual number, shape and size ratio of the implementation is an optional design, and the detailed component layout may be more complicated.

According to an embodiment of the present invention, a flip chip bonding method of a non-array bump is exemplified in a cross-sectional view of the manufacturing process block diagram of FIG. 1 and the components of the processes of FIGS. 2A to 2I.

Referring to FIG. 1 , the flip chip bonding method of the non-array bump of the present invention mainly comprises the following steps: “Steps for providing a bumped wafer”, Step 2 of “providing a substrate”, “Forming a sacrificial stop” Step 3 of "on the upper surface of the substrate", "Step 4 of "overturning the bumped wafer to face the substrate toward the substrate", Step 5 of "Removing the sacrificial stopper", and "filling in" The step 6 of filling the underfill between the bumped wafer and the substrate is described in detail in conjunction with the first embodiment of FIGS. 2A-21, 3 and 4 as follows.

First, go to step 1. Referring to Figures 2A and 3, a bump wafer 110 is provided. The bumped wafer 110 can be a high frequency memory chip. More specifically, the bumped wafer 110 can be a DDR2 or DDR3 memory wafer. The bumped wafer 110 has an active surface 111 on which a plurality of bumps 112 are disposed. The bumps 112 are arranged at the center of the active surface 111. In particular, the bumped wafer 110 can have a plurality of pads 113 that are in close proximity or aligned with the pads 113. The bumps 112 may be formed on the pads 113 by plating, evaporation, or printing. Preferably, the bumps 112 can be of a non-array type to omit a reconfigured line (RDL) layer. In other words, the bumps 112 are concentrated in a certain area of the active surface 111 of the bumped wafer 110 without being dispersed by the reconfiguration line process, and may be central bumps or peripheral bumps. In this embodiment, the bumps 112 can be located in a central region of the active surface 111 and can be linearly arranged (as shown in FIG. 3). In detail, the bumps 112 are non-reflow bumps, such as gold bumps, copper bumps, aluminum bumps or polymer conductive bumps, and the bumps 112 The shape can be square, cylindrical, thin column, hemispherical or spherical. Preferably, the bumps 112 can be columnar conductors, such as copper pillars, which have the characteristics of high temperature resistance and no deformation, so that the bumps 112 can maintain a good interval maintaining effect. The excessive collapse of the bumps may occur during the flip chip bonding process, and the copper pillars may be formed at low cost by electroplating. The above copper column comprises a pure copper column, a copper alloy column or a high rigidity metal column having a hardness of not less than gold (Au). More preferably, as shown in FIG. 3, the top surface of each bump 112 is provided with solder 114, such as tin-lead or lead-free solder (such as tin 96.5%-silver 3%-copper 0.5% solder material), The flip chip bonding is a soldering using bumps, but there is no reflowing phenomenon in which the bumps are spherical, which is suitable for the fine pitch arrangement of the non-array bumps. The solder 114 can be formed on the bumps 112 by printing, electroplating or imprinting, so as to facilitate subsequent fusion bonding of the solder 114 to the pads 123 of the substrate 120 via reflow soldering. And the formation of electrical splicing and mechanical bonding (as shown in Figure 2F). In the specific operation, the wettability of the weld can be generated when the reflow temperature is about 217 degrees Celsius or higher, and the highest temperature is about 245 degrees Celsius, and the bumps 112 must have a melting point higher than the reflow temperature. To avoid distortion.

Then, go to step 2. Referring to FIG. 2B, a substrate 120 is provided. The substrate 120 has an upper surface 121 and an opposite lower surface 122. A plurality of connection pads 123 are formed on the upper surface 121. The connection pads 123 are formed at positions corresponding to the bumps 112 of the bump wafer 110, and are disposed along a center of a center line. The substrate 120 can be a unit arranged in an array in a substrate strip, and is substantially a non-porous or solid sheet having a small number of holes. The substrate 120 as in this embodiment is formed after being cut. The substrate 120 can be a printed circuit board (PCB), a ceramic wiring substrate, a flexible film or a chip. In the embodiment, the substrate 120 has a printed circuit board (PCB). Multi-layer lines and plated through holes to achieve a two-sided conductive printed circuit board.

After that, go to step 3. Referring to FIG. 2C, a plurality of sacrificial stoppers 130 are disposed on the upper surface 121 of the substrate 120, and the sacrificial stoppers 130 are not covered to the connection pads 123 to avoid contamination. Some connection pads 123. At the same time, referring to FIG. 4 , the sacrificial stoppers 130 can be arranged in a block shape, and are respectively disposed on the left and right sides of the connection pads 123 or the four corners of the upper surface 121 of the substrate 120 for uniform support. The bumped wafer 110. The method of forming the sacrificial stopper 130 may be selected from one of printing, screen printing, stencil printing, and transfer. Specifically, the sacrificial stoppers 130 may be fluxing agents or photoresists, and have characteristics that can be easily removed by heating or photoresist development. Preferably, the sacrificial stops 130 are fluxes, and the method of removal after the flip chip bonding is heating, which has the effect of simplifying the process (described in detail later).

After that, go to step 4. Referring to FIGS. 2D and 4, the bumped wafer 110 is flipped over the upper surface 121 of the substrate 120 in such a manner that the active surface 111 faces the substrate 120, that is, a flip chip bonding step. As shown in FIG. 2E, in the flip-chip bonding step, the bumps 112 are bonded to the connection pads 123, and the sacrificial stoppers 130 are in contact with the active surface 111 to avoid the bumps. The tilt of the wafer 110. When the bumped wafer 110 is placed on the substrate 120, the bumped wafer 110 indirectly contacts the upper surface 121 of the substrate 120 via the sacrificial stops 130, and the sacrificial stops The piece 130 is used to provide a standoff required for the bumped wafer 110 to be disposed on the substrate 120, and the thickness of the sacrificial stop 130 can be adjusted to be between the bumped wafer 110 and the The gap distance between the substrates 120. Therefore, the sacrificial stop 130 can control the parallelism between the bumped wafer 110 and the substrate 120, so that the bumped wafer 110 does not tilt, and the sacrificial stops can be The support of 130 is firmly disposed on the upper surface 121 of the substrate 120 to enhance the quality of the flip chip bonding.

After that, go to step 5. Referring to Figures 2E and 2F, the sacrificial stops 130 are removed. In one embodiment, the sacrificial stops 130 can be fluxes, and the method of removing the sacrificial stops 130 is heating. In a variant embodiment, the sacrificial stops 130 can be photoresists, and the method of removing the sacrificial stops 130 is to remove photoresist. Preferably, the sacrificial stops 130 are fluxes. When the sacrificial stops 130 are removed by heating, the flip chip bonding step 4 also needs to be heated to bond the bump wafers 110. And the substrate 120, by using the element temperature difference or the adjustment of the heating temperature curve, the step of disposing the bumped wafer 110 and the removing step 5 of the sacrificial stop 130 can be continuously performed to simplify Process and operating costs. For example, in the step 4 of the bumped wafer 110, the bumped wafer 110 may be heated to bring the solder 114 into a meltable or Microsoft solderable state, such that the sacrificial stop 130 and the substrate are opposite. 120 is maintained at a lower temperature to perform the step of disposing the bumped wafer 110. In the above process, the bumped wafer 110 can be supplemented with ultrasonically oscillated friction, and the bumped wafer 110 can be further reduced. Heating temperature; then, slowly heating the substrate 120 until the sacrificial stoppers 130 (flux) are volatilized to complete the removal step of the sacrificial stoppers 130, which can be in the same The steps are executed continuously.

In addition, when the sacrificial stoppers 130 are photoresists, they can be formed into a patterned block by exposure and development, and the sacrificial stoppers 130 are removed by a photoresist removal method. The step 4 of applying the bumped wafer 110 (pressure heating) and the removing step 5 of the sacrificial stopper 130 (cleaning of the photoresist) are performed in different steps. Preferably, a dry film photoresist is selected as the sacrificial stop 130 to exert a superior stop effect. After the sacrificial stops 130 are removed, a relatively wide gap of glue is left between the bumped wafer 110 and the substrate 120 in addition to the bumps 112.

Finally, go to step 6. Referring to FIG. 2G, an underfill 140 is filled between the bumped wafer 110 and the substrate 120. As shown in FIGS. 2G and 2H, after the bump wafer 110 is thermally pressed with the substrate 120, the underfill adhesive 140 can be electrically insulated by a glue application needle 10, and the underfill is made by capillary action. The 140 series is filled between the bump wafer 110 and the substrate 120. And heating causes the underfill 140 to be thermally cured to achieve a more stable mechanical bond. Since the sacrificial stoppers 130 have been removed, the underfill 140 can easily fill the gap between the bumped wafer 110 and the substrate 120, and there is no conventional resin stopper and the like. The problem of compatibility of the underfill 140.

As shown in FIG. 2I, after the underfill 140 is filled, a plurality of external terminals 150 may be disposed on the lower surface 122 of the substrate 120 for external bonding. The external terminals 150 may include solder balls, solder pastes, contact pads or contact pins. In this embodiment, the external terminals 150 are solder balls. The substrate 120 can be diced into individual flip-chip bonded structures 100 of non-array bumps. In this embodiment, the flip chip bonding structure 100 of the non-array bump is a ball grid array package.

Therefore, the flip chip bonding method of the non-array bump of the present invention can control the parallelism between the bump wafer 110 and the substrate 120, so that the bump wafer 110 can be stably disposed on the substrate 120. To improve the quality of flip chip bonding. In addition, after the sacrificial stop 130 is removed, the underfill 140 can easily fill the gap between the bumped wafer 110 and the substrate 120, and there is no conventional resin stopper and The underfill 140 has a problem of compatibility.

In addition, the flip chip bonding method of the non-array bump of the present invention may be applied not only to the centrally disposed bumps but also to the peripherally disposed bumps on one side, two sides or four sides. The steps included in the second embodiment may be the same as those in the first embodiment, and the same elements will be used in conjunction with the drawings of the first embodiment.

Perform Step 1, Step 2, and Step 3. As shown in FIG. 5A, a bump wafer 110 is provided, and a plurality of bumps 112 are disposed on the active surface 111. In the embodiment, the bumps 112 are arranged on the active surface 111. The bumps 112 are arranged on both sides of the active surface 111 as shown in FIG. 5A. In a variant, the bumps 112 may also be arranged on one side of the active surface 111. . Further, a substrate 120 is provided, and a plurality of connection pads 123 are formed on the upper surface 121 thereof. Thereafter, a plurality of sacrificial stops 130 are disposed on the upper surface 121 of the substrate 120, which may be in the form of a central agglomerate, but the sacrificial stops 130 do not cover the connection pads 123. Thereafter, step 4 is performed. As shown in FIGS. 5A and 5B, the bumped wafer 110 is flipped over to face the substrate 120 toward the substrate 120, and the bumps are disposed on the upper surface 121 of the substrate 120. The block 112 is coupled to the connection pads 123 and the sacrificial stops 130 are in contact against the active surface 111. Thereafter, step 5 is performed, as shown in FIGS. 5B and 5C, the sacrificial stops 130 are removed. Finally, as shown in FIG. 5D, step 6 is performed by a glue of a glue application needle 10 to fill an underfill layer 140 on the bump wafer 110 and the substrate 120. between. By the above method, the bumped wafer 110 having the non-array bumps 112 can be prevented from being excessively inclined, and the underfill layer 140 can be filled to fill the gap of the flip chip bonding without the conventional resin stopper. The problem of compatibility with the underfill.

The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention. Any simple modifications, equivalent changes and modifications made without departing from the technical scope of the present invention are still within the technical scope of the present invention.

1. . . Bulk wafer

2. . . Providing a substrate

3. . . Forming a sacrificial stop on the upper surface of the substrate

4. . . Flip the bumped wafer so that the active surface faces the substrate and is disposed on the upper surface of the substrate

5. . . Remove sacrificial stop

6. . . Fill the underfill between the bumped wafer and the substrate

10. . . Glue needle

100. . . Flip bonded structure of non-array bumps

110. . . Bumped wafer

111. . . Active surface

112. . . Bump

113. . . Solder pad

114. . . solder

120. . . Substrate

121. . . Upper surface

122. . . lower surface

123. . . Connection pad

130. . . Sacrificial stop

140. . . Underfill

150. . . External terminal

Fig. 1 is a block diagram showing the main flow of a flip chip bonding method of a non-array bump according to the present invention.

2A to 2I are schematic cross-sectional views of elements in a flip chip bonding method of a non-array bump according to a first embodiment of the present invention.

Fig. 3 is a perspective view showing a bump wafer used in a flip chip bonding method of a non-array bump according to a first embodiment of the present invention.

4 is a perspective view showing a flip-chip wafer in which a driving surface faces an upper surface of a substrate in a flip chip bonding method of a non-array bump according to a first embodiment of the present invention.

5A to 5D are cross-sectional views showing elements in a flip chip bonding method of a non-array bump according to a second embodiment of the present invention.

110. . . Bumped wafer

111. . . Active surface

112. . . Bump

113. . . Solder pad

114. . . solder

120. . . Substrate

121. . . Upper surface

122. . . lower surface

123. . . Connection pad

130. . . Sacrificial stop

Claims (11)

A flip chip bonding method for non-array bumps, comprising the steps of: providing a bump wafer having an active surface on which a plurality of bumps are provided; and providing a substrate having an upper surface Forming a plurality of connection pads on the upper surface; setting a plurality of sacrificial stoppers on the upper surface of the substrate, the sacrificial stoppers not covering the connection pads; flipping the protrusions The block wafer is disposed on the upper surface of the substrate such that the active surface faces the substrate, wherein the bumps are coupled to the connection pads, and the sacrificial stops are in contact with the active surface Removing the sacrificial stops, wherein the sacrificial stops are fluxes, and the method of removing the sacrificial stops is heating; and filling an underfill Between the bumped wafer and the substrate. The flip chip bonding method of the non-array bump according to the first aspect of the patent application, wherein the sacrificial stoppers are in a block symmetrical configuration. The flip chip bonding method of the non-array bump according to the first aspect of the patent application, wherein the step of disposing the bumped wafer and the removing step of the sacrificial stopper are performed continuously. The flip chip bonding method of the non-array bump according to claim 1, wherein the sacrificial stopper is formed by one of printing, screen printing, stencil printing and transfer. The flip chip bonding method of non-array bumps according to claim 1, wherein the bumps are of a non-array type to omit a reconfigured wiring layer. The flip chip bonding method of non-array bumps according to claim 1, wherein the bumps are arranged at a center of the active surface. The flip chip bonding method of non-array bumps according to claim 1, wherein the bumps are arranged around the active surface. The flip chip bonding method of non-array bumps according to claim 1, wherein the bumped wafer has a plurality of pads, and the bumps are immediately adjacent or aligned on the pads. The flip chip bonding method of non-array bumps according to claim 1, wherein the bumps are columnar conductors. The flip chip bonding method of non-array bumps according to claim 9, wherein in the step of providing the bumped wafer, solder is provided on a top surface of each bump. According to the flip chip bonding method of the non-array bump of claim 1, the method further comprises the step of: providing a plurality of external terminals on a lower surface of the substrate.