1234423 玖、發明說明： 【發明所屬之技術領域】 本發明係、關於-種電路基板之製造方法，特別是一種具 有貫穿孔之電路基板之製造方法。 一 【先.前技術】 具有貫穿孔（Plated Thr〇ugh H〇le，pTH)之電路基板在 現今之應用越來越廣，例如為了電氣連接電路基板之側 邊白用的做法為於該側邊上開設複數個貫穿孔，且於該 等貝牙孔之孔壁上電鐘一層金屬層以作為接點。一般來 說，該等形成於電路基板側邊之貫穿孔必須經過一切割步 驟。 ° / 參考圖1，顯示習用位於電路基板側邊之貫穿孔之示意 圖。由圖中可看出，該習用電路基板1之側邊上具有複數 貝穿孔12同時該專貫穿孔12於形成過程中會留下毛邊 (burr)13 〇 參考圖2至圖4，顯示習用形成電路基板側邊之貫穿孔之 示意圖。首先，如圖2所示，一成形刀18以箭頭方向八旋 轉同時以箭頭方向B接近一貫穿孔14。接著，如圖3所示， 田名成形刀18接觸該貫穿孔14時，會先切斷孔壁。之前側 而形成一前側邊（leading edge)17，一但該前側邊口形成 後，可以抵擋該成形刀18之力只剩下該金屬層16與該孔壁 15間之黏著力，而該成形刀18通過該貫穿孔14後所產生之 熱會使位於該前側邊17之金屬層16被撕開而脫離該前側 邊Π’這是因為金屬層16與前側邊17間之黏著力不足之關1234423 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates to a method for manufacturing a circuit board, and more particularly to a method for manufacturing a circuit board having a through hole. A. [Previous Technology] Circuit boards with through holes (Plated Through Hole, pTH) are more and more widely used today, for example, to electrically connect the side of the circuit board to the white side. A plurality of through holes are opened on the side, and a metal layer is used as a contact point on the wall of the hole of these bayonet holes. Generally, the through-holes formed on the side of the circuit substrate must undergo a cutting step. ° / Refer to Figure 1 for a schematic view of a conventional through hole located on the side of the circuit board. It can be seen from the figure that the conventional circuit substrate 1 has a plurality of shell perforations 12 on the side, and the special through-hole 12 will leave a burr 13 during the formation process. Referring to FIG. 2 to FIG. 4, the conventional formation is shown. A schematic view of a through hole on the side of the circuit substrate. First, as shown in FIG. 2, a forming blade 18 is rotated eight times in the direction of the arrow while approaching a through hole 14 in the direction of the arrow B. As shown in FIG. Next, as shown in FIG. 3, when the Tianming forming blade 18 contacts the through hole 14, the hole wall is cut off first. A leading edge 17 is formed on the front side. Once the front edge is formed, the force of the forming knife 18 can be resisted, and only the adhesive force between the metal layer 16 and the hole wall 15 is left. The heat generated by the forming blade 18 after passing through the through hole 14 will tear the metal layer 16 on the front side 17 away from the front side Π ′. This is because the distance between the metal layer 16 and the front side 17 is Inadequate adhesion
O:\92\92847 DOC 1234423 係。最後，如圖4所示，當該成形刀18通過該貫穿孔14後， P幵y成圖1中之貝穿孔i 2，且位於該前側邊i 7之金屬層會 被考折’而形成圖1中之毛邊1 3。 忒等毛邊13之缺點在於其明顯地會影響電氣連接，例如 紐路（short circuit)或接觸不良，再者其會影響接點測試。 因此，有必要提供一創新且富進步性的電路基板之製造 方法’以解決上述問題。 【發明内容】 本發明之主要目的係提供一種電路基板之製造方法，其 係於切割製程後以姓刻方式去除一小部份之貫穿孔壁上 之金屬層，以去除該金屬層於切割面上不平整之殘留金 屬，防止毛邊之發生。 本發明之另一目的係提供一種電路基板之製造方法，包 括： (a) 提供一板材，該板材之上下表面具有一導電層，且 該板材具有至少一貫穿孔，該貫穿孔之孔壁上鍍有一金 屬； (b) 填滿一絕緣材於該貫穿孔中； (0分割該貫穿孔及該絕緣材； (d)蝕刻該貫穿孔孔壁上金屬之一部份；及 (0去除該絕緣材。 【實施方式】 參考圖5至圖12，顯示本發明之電路基板製造方法第一 實施例之示意圖。參考圖5，首先提供一板材2，該板材2 O:\92\92847.DOC -6- 1234423 之中心為一核心板材（cor e)21，且其上下表面皆具有一導 電層22(例如一銅箔（copper foil))。 接著，參考圖6，於該板材2上形成至少一貫穿孔23，形 成該貫穿孔23之方式係為習知，諸如機械鑽孔法 (mechanical drilling)、雷射燒融法（laser ablation)、光化 學反應法（photochemical reaction)或電漿钱刻法（piasma etching)等。參考圖6a，顯示圖6之俯視示意圖，在本圖中 係以二排共六個等貫穿孔23為例。 接著，參考圖7，電鍍一金屬層24於該貫穿孔23之孔壁 上，該電鍍方法可以是無電電鍍或是直接電鍍等習知方 法。在本實施例中，該金屬層之材質係為銅。 接著’參考圖8，顯示進行圖案化製程後之板材，該圖. 案化製程係為習知，包括：貼光阻、曝光顯影、蝕刻、去 光阻等，藉此，使該導電層22及該金屬層24形成圖案化之 金屬線路（trace)25。 接著，參考圖9，填滿一絕緣材26於該貫穿孔23中，該 絕緣材26之材質可以是一可剝除之油墨。 接著’參考圖9a，顯示圖9之俯視示意圖。在本圖中係 沿著切割線27分割該板材2上之該等貫穿孔23及該等絕緣 材26 〇 參考圖10，顯示圖9a之板材2經切割後之局部立體示意 圖，此時由於添加該等絕緣材26之緣故，可使該貫穿孔23 孔壁上之金屬層24於切割過程中不易產生毛邊。然而更佳 之做法係於切割製程後再針對該金屬層24進行一微蝕刻O: \ 92 \ 92847 DOC 1234423 system. Finally, as shown in FIG. 4, after the forming knife 18 passes through the through hole 14, P 幵 y becomes the perforation i 2 in FIG. 1, and the metal layer located on the front side i 7 will be folded. The burrs 13 in FIG. 1 are formed. The disadvantage of the burr 13 is that it will obviously affect the electrical connection, such as short circuits or poor contact, and it will also affect the contact test. Therefore, it is necessary to provide an innovative and progressive manufacturing method of circuit substrate 'to solve the above problems. [Summary of the Invention] The main purpose of the present invention is to provide a method for manufacturing a circuit substrate, which is to remove a small part of the metal layer on the wall of the through-hole in a engraved manner after the cutting process to remove the metal layer on the cutting surface Residual metal on uneven surface prevents burrs. Another object of the present invention is to provide a method for manufacturing a circuit substrate, including: (a) providing a plate having a conductive layer on the upper and lower surfaces thereof, and the plate having at least one through hole, and the hole wall of the through hole is plated A metal; (b) filling an insulating material in the through hole; (0 dividing the through hole and the insulating material; (d) etching a part of the metal on the wall of the through hole; and (0 removing the insulation [Embodiment] Referring to FIG. 5 to FIG. 12, a schematic diagram of a first embodiment of a circuit substrate manufacturing method of the present invention is shown. Referring to FIG. 5, a plate 2 is first provided, and the plate 2 O: \ 92 \ 92847.DOC- The center of 6-1234423 is a core plate 21, and the upper and lower surfaces thereof have a conductive layer 22 (for example, a copper foil). Next, referring to FIG. 6, at least one pattern is formed on the plate 2. The perforations 23 are formed in a conventional manner, such as mechanical drilling, laser ablation, photochemical reaction, or plasma engraving ( piasma etching), etc. Referring to FIG. 6 is a schematic plan view, and in this figure, two rows of six equal through holes 23 are taken as an example. Next, referring to FIG. 7, a metal layer 24 is plated on the hole wall of the through hole 23. It is a conventional method such as electroless plating or direct plating. In this embodiment, the material of the metal layer is copper. Next, with reference to FIG. 8, the plate after the patterning process is shown. Conventionally, including: photoresist, exposure and development, etching, photoresist removal, etc., thereby forming the conductive layer 22 and the metal layer 24 to form a patterned metal trace 25. Next, referring to FIG. 9, fill in An insulating material 26 is filled in the through hole 23, and the material of the insulating material 26 may be a peelable ink. Next, referring to FIG. 9a, a schematic plan view of FIG. 9 is shown. In this figure, it is along the cutting line 27 Dividing the through holes 23 and the insulating materials 26 on the board 2 〇 Referring to FIG. 10, a partial three-dimensional schematic diagram of the board 2 after cutting is shown in FIG. 9 a. The metal layer 24 on the wall of the through hole 23 is not cut during the cutting process. It is easy to produce burrs. However, it is better to perform a micro-etching on the metal layer 24 after the cutting process.
O:\92\92847.DOC 1234423 (kr〇 etching)製权，以去除該金屬層以表面不平整之殘 留金屬，如圖11所示。 取後，去除該等絕緣材26，即可得所需之具有貫穿孔之 包路基板，如圖12所不。再者，如果需要的話，可以再進 行以下步驟·覆盍一防焊層（s〇lder 於該圖案化之金 屬線路25上、去除部分該防焊層以露出部分該金屬線路及 電鍍一鎳/金層於該露出之金屬線路，例如接腳（figure)之 位置。 在本實施例中，電鍍該金屬層24於該貫穿孔23之孔壁後 即進行圖案化製程，然而可以理解的是，該圖案化製程亦 可於該切割步驟（即圖9a)之後進行。 參考圖13至圖23，顯示本發明之電路基板製造方法第二 實施例之示意圖。參考圖13，首先提供一板材3,該板材3 之中心為一核心板材（c〇re)3丨，且其上下表面皆具有一導 電層32(例如一銅箔（c〇pper f〇ii))。 接著，參考圖14，於該板材3上形成至少一貫穿孔33， 心成該貝牙孔3 3之方式係為習知，諸如機械鑽孔法 (mechanical drilling)、雷射燒融法〇aser ablati〇n)、光化 學反應法（photochemical reaction)或電漿蝕刻法（piasma etching)等。參考圖14a，顯示圖14之俯視示意圖，在本圖 中係以二排共六個等貫穿孔33為例。 接著，參考圖15，電鍍一金屬層34於該貫穿孔33之孔壁 上，該電錢方法可以是無電電鍍或是直接電鍍等習知方 法。在本貫施例_，該第一金屬層之材質係為銅。O: \ 92 \ 92847.DOC 1234423 (kr0 etching), to remove the residual metal on the metal layer and uneven surface, as shown in Figure 11. After removal, the insulating material 26 can be removed to obtain the required package substrate with through holes, as shown in FIG. 12. Furthermore, if necessary, the following steps can be performed: • Overlaying a solder mask layer (solder on the patterned metal circuit 25, removing a part of the solder mask layer to expose a part of the metal circuit and electroplating a nickel / The gold layer is at the position of the exposed metal circuit, such as a figure. In this embodiment, the metal layer 24 is patterned after plating the hole wall of the through hole 23, but it can be understood that The patterning process can also be performed after the cutting step (ie, FIG. 9a). Referring to FIGS. 13 to 23, a schematic diagram of a second embodiment of the circuit substrate manufacturing method of the present invention is shown. Referring to FIG. 13, a plate 3 is first provided. The center of the plate 3 is a core plate 3 and a conductive layer 32 (such as a copper foil) is provided on the upper and lower surfaces. Next, referring to FIG. 14, At least one through-hole 33 is formed in the plate 3, and the method of forming the shell hole 33 is conventional, such as mechanical drilling, laser ablation (aser ablati), and photochemical reaction method. (Photochemical reaction) or plasma etching method ( piasma etching) and so on. Referring to Fig. 14a, a schematic plan view of Fig. 14 is shown. In this figure, two rows of six equal through holes 33 are taken as an example. Next, referring to FIG. 15, a metal layer 34 is plated on the hole wall of the through hole 33. The electric money method may be a conventional method such as electroless plating or direct plating. In this embodiment, the material of the first metal layer is copper.
O:\92\92847.DOC 1234423 接著，茶考圖16，顯示進行圖案化製程後之板材，該圖 案化製程係為習知’包括··貼光阻、曝光顯影、#刻、去 光阻等，藉此，使該導電層32及該金屬層34形成圖案化之 金屬線路（trace)35。 —，考圖17，覆盍一防焊層（solder mask)3 7於該圖 案化之金屬線路3 5上。 著4考圖18，去除部分該防焊層37以露出部分該金 屬線路35之步驟。 接著，參考圖19,填滿一絕緣材36於該貫穿孔”中，該 絕緣材36之材質可以是一可剝除之油墨。在本實施例中， 去除部分該防焊層37以露出部分該金屬線路35後係進行 填滿絕緣材36於該貫穿孔33之步驟，然而在其他應用. 中，亦可於去除部分該防焊層37以露出部分該金屬線路乃 後直接電鍍一鎳/金層於該圖案化金屬線路25之特定位置 上。 接著，參考圖20，覆蓋一乾膜38於該防焊層37上。 接著，沿著預定之切割線（圖中未示）分割該板材3上之 該等貫穿孔33及該等絕緣材36。 參考圖2 1，顯不圖20之板材3經切割後之局部立體示意 圖，此％由於添加該等絕緣材3 6之緣故，可使該貫穿孔3 3 孔壁上之金屬層34於切割過程中不易產生毛邊。然而更佳 之做法係於切割製程後再針對該切割面上之金屬層34進 行一微蝕刻（micro-etching)製程，以去除該金屬層34表面 不平整之殘留金屬，如圖22所示。O: \ 92 \ 92847.DOC 1234423 Next, the tea examination of Figure 16 shows the plate after the patterning process, which is known as' including photoresist, exposure development, #etching, photoresist removal. As a result, a patterned metal trace 35 is formed on the conductive layer 32 and the metal layer 34. —, Consider FIG. 17, a solder mask 3 7 is overlaid on the patterned metal circuit 35. Referring to FIG. 18, a step of removing a part of the solder resist layer 37 to expose a part of the metal wiring 35 is shown. Next, referring to FIG. 19, an insulating material 36 is filled in the through hole. The material of the insulating material 36 may be a peelable ink. In this embodiment, a part of the solder resist 37 is removed to expose a portion After the metal circuit 35 is filled with the insulating material 36 in the through-hole 33, however, in other applications, it is also possible to remove a part of the solder resist layer 37 to expose a part of the metal circuit or directly electroplating a nickel / A gold layer is at a specific position of the patterned metal circuit 25. Next, referring to FIG. 20, a dry film 38 is covered on the solder resist layer 37. Next, the plate 3 is divided along a predetermined cutting line (not shown) The above-mentioned through holes 33 and the insulating materials 36. Referring to FIG. 21, a partial three-dimensional schematic diagram of the plate 3 in FIG. 20 after cutting is shown, which can be caused by the addition of the insulating materials 36. The metal layer 34 on the wall of the through-hole 3 3 is not prone to burrs during the cutting process. However, a better method is to perform a micro-etching process on the metal layer 34 on the cutting surface after the cutting process. Removal of unevenness on the surface of the metal layer 34 Metal, as shown in Figure 22.
O:\92\92847.DOC 1234423 最後，去除該等絕緣材36及該乾膜38,即可得所需之具 有貝穿孔之電路基板3，如圖23所示。再者，如果需要的 話，可以電鍍一鎳/金層於該圖案化金屬線路35之特定位 置上，例如接腳（figure)之位置。 上述貫施例僅為說明本發明之原理及其功效，並非限制 本發明，因此習於此技術之人士對上述實施例進行修改及 羑化仍不脫本發明之精神。本發明之權利範圍應如後述之 申請專利範圍所列。 【圖式簡單說明】 圖1顯示習用位於電路基板側邊之貫穿孔之示意圖； 圖2至圖4顯示習用形成電路基板側邊之貫穿孔之示意 圖； 圖5、6、6a、7至9、9a及10至圖12顯示本發明之電路基 板製造方法第一實施例之示意圖；及 圖13、14、14a及15至圖23，顯示本發明之電路基板製 k方法苐二實施例之示意圖。 【圖式元件符號說明】 A 箭頭方向 B 箭頭方向 1 習用電路基板 2 板材 3 板材 12 貫穿孔 13 毛邊O: \ 92 \ 92847.DOC 1234423 Finally, by removing the insulating materials 36 and the dry film 38, the required circuit board 3 with shell holes can be obtained, as shown in FIG. Further, if necessary, a nickel / gold layer may be plated on a specific position of the patterned metal circuit 35, such as a position of a pin. The above-mentioned embodiments are only for explaining the principle of the present invention and its effects, but not for limiting the present invention. Therefore, those skilled in the art can modify and transform the above embodiments without departing from the spirit of the present invention. The scope of rights of the present invention should be as listed in the patent application scope mentioned later. [Brief description of the drawings] Figure 1 shows a schematic view of a conventional through hole located on the side of the circuit substrate; Figures 2 to 4 show schematic views of a conventional through hole formed on the side of the circuit substrate; Figures 5, 6, 6a, 7 to 9, 9a and 10 to 12 show schematic diagrams of a first embodiment of a circuit substrate manufacturing method of the present invention; and FIGS. 13, 14, 14a, and 15 to 23 show schematic diagrams of a second embodiment of a circuit substrate manufacturing method k of the present invention. [Illustration of Symbols of Schematic Elements] A direction of arrow B direction of arrow 1 conventional circuit board 2 plate 3 plate 12 through hole 13 burr
O:\92\92847.DOC -10- 1234423 14 貫穿孔 15 孔壁 16 金屬層 17 前側邊 18 成形刀 21 核心板材 22 導電層 23 貫穿孔 24 金屬層 25 圖案化之金屬線路 26 絕緣材 27 切割線 31 核心板材 32 導電層 33 貫穿孔 34 金屬層 35 圖案化之金屬線路 36 絕緣材 37 防焊層 38 乾膜 O:\92\92847.DOC -11 -O: \ 92 \ 92847.DOC -10- 1234423 14 through hole 15 hole wall 16 metal layer 17 front side 18 forming knife 21 core sheet 22 conductive layer 23 through hole 24 metal layer 25 patterned metal circuit 26 insulating material 27 Cutting line 31 Core sheet 32 Conductive layer 33 Through hole 34 Metal layer 35 Patterned metal circuit 36 Insulating material 37 Solder mask 38 Dry film O: \ 92 \ 92847.DOC -11-