TW201811136A - Printed circuit board with thick copper conducting line and method same - Google Patents
Printed circuit board with thick copper conducting line and method same Download PDFInfo
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- TW201811136A TW201811136A TW105133114A TW105133114A TW201811136A TW 201811136 A TW201811136 A TW 201811136A TW 105133114 A TW105133114 A TW 105133114A TW 105133114 A TW105133114 A TW 105133114A TW 201811136 A TW201811136 A TW 201811136A
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- layer
- circuit board
- conductive
- openings
- conductive circuit
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 78
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 50
- 239000010949 copper Substances 0.000 title claims abstract description 50
- 238000000034 method Methods 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 claims abstract description 21
- 238000005530 etching Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 110
- 239000011889 copper foil Substances 0.000 claims description 28
- 239000011241 protective layer Substances 0.000 claims description 25
- 239000003292 glue Substances 0.000 claims description 17
- 239000010408 film Substances 0.000 claims description 16
- 239000013039 cover film Substances 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 11
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- 238000009413 insulation Methods 0.000 claims description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 238000007747 plating Methods 0.000 claims description 2
- 238000000608 laser ablation Methods 0.000 claims 1
- 230000000717 retained effect Effects 0.000 claims 1
- 238000011161 development Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000000084 colloidal system Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09672—Superposed layout, i.e. in different planes
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
Description
本發明涉及電路板製作領域,尤其涉及一種具厚銅線路的電路板及其製作方法。The invention relates to the field of circuit board manufacturing, in particular to a circuit board with thick copper lines and a manufacturing method thereof.
隨著電子產品的高速發展, 作為元器件支撐體與傳輸電信號載體的印製電路板也應逐漸步向微型化、輕量化、高密度與多功能,進而對印製電路板精厚銅線路的製作提出了更高的要求。常規印製電路板生產工藝線寬受限於銅層厚度, 銅層厚度越薄線路越厚銅, 故用厚銅來製作厚銅線路本身有局限性;並且常規印製電路板的導電線路通常為減成法,但受限於銅厚,製作厚銅線路只能搭配薄銅,且製作後有蝕刻因數差,蝕刻不凈形成毛邊;防焊油墨難以填充,易產生氣泡等問題。With the rapid development of electronic products, printed circuit boards used as component supports and carriers for transmitting electrical signals should also gradually move towards miniaturization, light weight, high density, and multi-function, and then to fine copper circuits on printed circuit boards. The production made higher requirements. The width of the conventional printed circuit board production process is limited by the thickness of the copper layer. The thinner the copper layer, the thicker the copper, so using thick copper to make thick copper circuits has its own limitations; and the conductive lines of conventional printed circuit boards are usually For the subtractive method, but limited by the thickness of copper, the production of thick copper lines can only be matched with thin copper, and there is a poor etching factor after fabrication, and the etching does not form burrs; the solder resist ink is difficult to fill, and it is easy to generate bubbles.
有鑑於此,有必要提供一種能夠解決上述技術問題的電路板製作方法製作而成的電路板。In view of this, it is necessary to provide a circuit board manufactured by a circuit board manufacturing method capable of solving the above technical problems.
一種具厚銅線路的電路板的製作方法,其步驟如下:A method for manufacturing a circuit board with thick copper lines includes the following steps:
提供覆銅基板,該覆銅基板包括絕緣層以及形成在該絕緣層其中一個表面的第一銅箔層;Provide a copper-clad substrate, which includes an insulating layer and a first copper foil layer formed on one surface of the insulating layer;
在該第一銅箔層表面形成一層感光性薄膜;Forming a photosensitive film on the surface of the first copper foil layer;
在該感光性薄膜中形成多個開口,該開口暴露該第一銅箔層;Forming a plurality of openings in the photosensitive film, the openings exposing the first copper foil layer;
從該開口的位置對該第一銅箔層進行第一次蝕刻,得到第一導電線路圖案,該第一導電線路圖案包括多個相連的梯形及形成在相鄰梯形之間的第一開口部,該第一開口部包括兩個側壁以及連接兩個該側壁的底壁;The first copper foil layer is etched for the first time from the position of the opening to obtain a first conductive circuit pattern. The first conductive circuit pattern includes a plurality of connected trapezoids and first openings formed between adjacent trapezoids. The first opening includes two side walls and a bottom wall connecting the two side walls;
在該側壁的表面形成一層防護層;Forming a protective layer on the surface of the side wall;
從該底壁的位置對該第一銅箔層進行第二次蝕刻,形成第二導電線路圖案;及Performing a second etching on the first copper foil layer from the position of the bottom wall to form a second conductive circuit pattern; and
移除該該幹膜,該第一導電線路圖案與該第二導電線路圖案共同構成導電線路層,從而得到具厚銅線路的電路板。The dry film is removed, and the first conductive circuit pattern and the second conductive circuit pattern together form a conductive circuit layer, thereby obtaining a circuit board with a thick copper circuit.
一種具厚銅線路的電路板,其包括:絕緣層及形成在絕緣層表面的導電線路層,該導電線路層包括形成在該絕緣層表面的第二導電線路圖案以及與第二導電線圖案相堆疊的第一導電線路圖案,該第一導電線路圖案包括多個相連的梯形及形成在相鄰梯形之間的第一開口部,該第一開口部包括兩個側壁以及連接兩個側壁的底壁,該側壁形成有一層防護層,該第一導電線路圖案形成有多個第一開口部,該第二導電線路圖案形成有多個分別與所述第一開口部相通的第二開口部,該第二開口部暴露該絕緣層。A circuit board with a thick copper circuit includes an insulating layer and a conductive circuit layer formed on a surface of the insulating layer. The conductive circuit layer includes a second conductive circuit pattern formed on the surface of the insulating layer and a phase corresponding to the second conductive line pattern. A stacked first conductive circuit pattern including a plurality of connected trapezoids and a first opening formed between adjacent trapezoids, the first opening including two side walls and a bottom connecting the two side walls A wall, the side wall is formed with a protective layer, the first conductive line pattern is formed with a plurality of first openings, and the second conductive line pattern is formed with a plurality of second openings respectively communicating with the first opening, The second opening portion exposes the insulating layer.
一種具厚銅線路的電路板,其包括:絕緣層及形成在絕緣層相背兩個表面的兩個導電線路層,每個該導電線路層包括形成在該絕緣層表面的第二導電線路圖案以及與第二導電線圖案相堆疊的第一導電線路圖案,該第一導電線路圖案包括多個相連的梯形及形成在相鄰梯形之間的第一開口部,該第一開口部包括兩個側壁以及連接兩個側壁的底壁,該側壁形成有一層防護層,該第一導電線路圖案形成有多個第一開口部,該第二導電線路圖案形成有多個分別與所述第一開口部相通的第二開口部,該第二開口部暴露該絕緣層。A circuit board with a thick copper circuit includes an insulating layer and two conductive circuit layers formed on two surfaces opposite to each other, each of the conductive circuit layers including a second conductive circuit pattern formed on a surface of the insulating layer. And a first conductive line pattern stacked with a second conductive line pattern, the first conductive line pattern includes a plurality of connected trapezoids and a first opening formed between adjacent trapezoids, the first opening includes two A side wall and a bottom wall connecting the two side walls, the side wall is formed with a protective layer, the first conductive circuit pattern is formed with a plurality of first openings, and the second conductive circuit pattern is formed with a plurality of first openings respectively. A second opening portion that communicates with each other, the second opening portion exposing the insulating layer.
與先前技術相比,本發明提供的具厚銅線路的電路板製作方法及由此製作而成的電路板,對於該絕緣層其中一個表面的該第一銅箔層經過兩次蝕刻形成該導電線路層,如此,可以降低線路側壁被蝕刻的風險,有效減少線路的毛邊現象,並且可以得到更厚銅的線路,經過檢測,線寬大約為50μm,形成在第一導電線路圖案側壁的金屬錫,可以對導電線路層進行保護,使導電線路層的抗氧化能力更強。Compared with the prior art, the present invention provides a method for manufacturing a circuit board with a thick copper circuit and a circuit board made therefrom. The first copper foil layer on one surface of the insulation layer is etched twice to form the conductive layer. The circuit layer, in this way, can reduce the risk of etching of the sidewall of the circuit, effectively reduce the phenomenon of burr of the circuit, and can obtain thicker copper circuits. After testing, the line width is about 50 μm. The metal tin formed on the sidewall of the first conductive circuit pattern It can protect the conductive circuit layer and make the conductive circuit layer more resistant to oxidation.
圖1是本發明第一實施例提供的覆銅基板的剖視圖。FIG. 1 is a cross-sectional view of a copper-clad substrate provided by a first embodiment of the present invention.
圖2是在覆銅基板表面形成感光性薄膜的剖視圖。2 is a cross-sectional view of a photosensitive film formed on a surface of a copper-clad substrate.
圖3是對感光性薄膜進行曝光顯影形成開口的剖視圖。FIG. 3 is a cross-sectional view of an opening formed by exposure and development of a photosensitive film.
圖4是對第一銅箔層進行第一次蝕刻形成第一導電線路圖案的剖視圖。4 is a cross-sectional view of a first copper foil layer etched for the first time to form a first conductive circuit pattern.
圖5是在第一導電線路圖案表面形成防護層的剖面圖。5 is a cross-sectional view of a protective layer formed on a surface of a first conductive circuit pattern.
圖6是移除第一導電線路圖案的底壁的防護層的剖視圖。6 is a cross-sectional view of a protective layer with a bottom wall of the first conductive circuit pattern removed.
圖7是對第一銅箔層進行第二次蝕刻形成第二導電線路圖案的剖面圖。FIG. 7 is a cross-sectional view of performing a second etching on the first copper foil layer to form a second conductive circuit pattern.
圖8是移除蝕刻阻擋層的剖視圖。FIG. 8 is a cross-sectional view with the etch stop layer removed.
圖9是將在該絕緣層表面、該導電線路層之間填充純膠的剖視圖。FIG. 9 is a cross-sectional view in which pure glue is filled between the surface of the insulating layer and the conductive circuit layer.
圖10是在該導電線路層表面壓合一層覆蓋膜、形成具厚銅線路的電路板的剖視圖。FIG. 10 is a cross-sectional view of a circuit board with a thick copper circuit laminated on the surface of the conductive circuit layer.
圖11是本發明第三實施例提供的又一個具厚銅線路的電路板的剖視圖。FIG. 11 is a cross-sectional view of another circuit board with a thick copper circuit provided by a third embodiment of the present invention.
下面將結合附圖及實施例,對本發明提供的電路板及其製作方法作進一步的詳細說明。The circuit board and the manufacturing method thereof provided by the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.
請參閱圖1-10,本發明第一實施例提供一種具厚銅線路的電路板的製作方法,其步驟包括:Please refer to FIGS. 1-10. A first embodiment of the present invention provides a method for manufacturing a circuit board with thick copper lines. The steps include:
第一步,請參閱圖1,提供一個覆銅基板10,該覆銅基板10為單面覆銅基板。該覆銅基板包括絕緣層12以及形成在該絕緣層12表面的第一銅箔層14。該第一銅箔層14的厚度為70μm,該絕緣層12的厚度約為25um。In the first step, referring to FIG. 1, a copper-clad substrate 10 is provided. The copper-clad substrate 10 is a single-sided copper-clad substrate. The copper-clad substrate includes an insulating layer 12 and a first copper foil layer 14 formed on a surface of the insulating layer 12. The thickness of the first copper foil layer 14 is 70 μm, and the thickness of the insulating layer 12 is approximately 25 μm.
第二步:請參閱圖2及圖3,在該第一銅箔層14的表面形成一層感光性薄膜16及在該感光性薄膜16中形成多個開口160,該開口160暴露該第一銅箔層14。在本實施方式中,該感光性薄膜16為幹膜,該多個開口160通過微影制程形成。該感光性薄膜16的厚度為15μm。被曝光顯影後的該感光性薄膜16形成蝕刻阻擋層162,被該蝕刻阻擋層162覆蓋的該第一銅箔層14不會被蝕刻。Step 2: Referring to FIG. 2 and FIG. 3, a photosensitive film 16 is formed on the surface of the first copper foil layer 14 and a plurality of openings 160 are formed in the photosensitive film 16, and the openings 160 expose the first copper. Foil layer 14. In this embodiment, the photosensitive film 16 is a dry film, and the plurality of openings 160 are formed by a lithography process. The thickness of this photosensitive film 16 is 15 μm. The photosensitive film 16 after exposure and development forms an etch stop layer 162, and the first copper foil layer 14 covered by the etch stop layer 162 is not etched.
第三步,請參閱圖4,從該開口160的位置對該第一銅箔層14進行第一次蝕刻,得到第一導電線路圖案20,該第一導電線路圖案20包括多個相連的梯形201及形成在相鄰梯形201之間的第一開口部202,第一開口部202包括側壁22以及連接相鄰側壁22的底壁24。從該開口160的位置對該第一銅箔層14進行第一次蝕刻的深度約為第一銅箔層14厚度的一半,在本實施方式中,第一次蝕刻的深度為35μm。由於對第一銅箔層14進行蝕刻時存在蝕刻因數的現象,從而使形成的該多個第一開口部202的截面大致為彼此間隔的倒梯形。In the third step, referring to FIG. 4, the first copper foil layer 14 is etched for the first time from the position of the opening 160 to obtain a first conductive circuit pattern 20. The first conductive circuit pattern 20 includes a plurality of connected trapezoids. 201 and a first opening 202 formed between adjacent trapezoids 201. The first opening 202 includes a side wall 22 and a bottom wall 24 connecting the adjacent side walls 22. The depth of the first etching of the first copper foil layer 14 from the position of the opening 160 is about half of the thickness of the first copper foil layer 14. In this embodiment, the depth of the first etching is 35 μm. Because the etching factor occurs when the first copper foil layer 14 is etched, the cross sections of the plurality of first openings 202 formed are substantially inverted trapezoids spaced apart from each other.
第四步,請參閱圖5,在該底壁24與側壁22的表面形成防護層240。該防護層240通過電鍍金屬形成。該電鍍的金屬為錫或者鎳。該電鍍的金屬的厚度約1-3um。在其他實施方式中,也可以通過化錫(沉錫)的方式在該第一導電線路圖案20表面形成該防護層240。被該防護層240覆蓋的該第一導電線路圖案20不會被蝕刻。該防護層240用於保護該第一線路圖案20,以防該第一線路圖案20氧化。In the fourth step, referring to FIG. 5, a protective layer 240 is formed on the surfaces of the bottom wall 24 and the side wall 22. The protective layer 240 is formed by metal plating. The plated metal is tin or nickel. The thickness of the plated metal is about 1-3um. In other embodiments, the protective layer 240 may be formed on the surface of the first conductive circuit pattern 20 by tinning (sinking). The first conductive circuit pattern 20 covered by the protective layer 240 is not etched. The protective layer 240 is used to protect the first circuit pattern 20 from being oxidized.
第五步,請參閱圖6,除去該底壁24上形成的該防護層240,使該第一開口部202暴露部分該第一銅箔層14。在本實施方式中,可以利用雷射燒蝕(Laser Ablating)的方式除去該底壁24的該防護層240。In a fifth step, referring to FIG. 6, the protective layer 240 formed on the bottom wall 24 is removed, so that the first opening portion 202 exposes a part of the first copper foil layer 14. In this embodiment, the protective layer 240 of the bottom wall 24 can be removed by a laser ablating method.
第六步,請參閱圖7,從該底壁24的位置對該第一銅箔層14進行第二次蝕刻,將被第一次蝕刻之後剩餘的第一銅箔層14製作形成第二導電線路圖案30,該第二導電線路圖案30包括有多個依次相連的梯形301以及形成在相鄰梯形之間的第二開口部302。每個第二開口部302分別與一個所述第一開口部202相通,該第二開口部302暴露該絕緣層12。該多個第二開口部302的截面大致為彼此間隔的倒梯形。第一導電線路圖案20與該第二線路圖案30共同形成位於該絕緣層12表面的導電線路層60。該導電線路層60的線寬可以達到50μm。The sixth step, please refer to FIG. 7, the second copper foil layer 14 is etched from the position of the bottom wall 24 a second time, and the first copper foil layer 14 remaining after the first etching is made to form a second conductive layer. A circuit pattern 30. The second conductive circuit pattern 30 includes a plurality of trapezoids 301 connected in sequence and second openings 302 formed between adjacent trapezoids. Each of the second opening portions 302 is in communication with one of the first opening portions 202, and the second opening portion 302 exposes the insulating layer 12. The plurality of second openings 302 have a substantially inverted trapezoidal shape in cross section. The first conductive circuit pattern 20 and the second circuit pattern 30 together form a conductive circuit layer 60 on the surface of the insulating layer 12. The line width of the conductive circuit layer 60 can reach 50 μm.
第七步,請參閱圖8,剝去該第一導電線路圖案20表面的該蝕刻阻擋層162。In a seventh step, referring to FIG. 8, the etching stop layer 162 on the surface of the first conductive circuit pattern 20 is peeled off.
第八步,請參閱圖9與圖10,在該絕緣層12表面、該導電線路層60包括的第一開口部202與該第二開口部302填充純膠40,該純膠40充滿該第一開口部202、第二開口部302及覆蓋該第一導電線路圖案20,在該純膠40的表面壓合一層覆蓋膜50(CoverLay),從而得到具厚銅線路的電路板200。Eighth step, please refer to FIG. 9 and FIG. 10. On the surface of the insulating layer 12, the first opening portion 202 and the second opening portion 302 included in the conductive circuit layer 60 are filled with pure glue 40. The pure glue 40 fills the first glue portion 40. An opening 202, a second opening 302, and the first conductive circuit pattern 20 are covered, and a cover film 50 (CoverLay) is laminated on the surface of the pure glue 40, so as to obtain a circuit board 200 having a thick copper circuit.
由於本案形成的是厚銅厚銅線路,由第一導電線路圖案20及第二導電圖案30形成的導電線路層60包括的第一開口部202與第二開口部302(Pitch)較窄,而僅在導電線路層60表面壓合覆蓋膜50,很難使覆蓋膜50包括的熔融膠體充滿第一開口部202與該第二開口部302,所以,在本實施方式中,是先在該導電線路層60的第一開口部202與該第二開口部302填充純膠40,然後再在該導電線路層60的表面壓合覆蓋膜50,該純膠40與該覆蓋膜50共同用於對該導電線路層60進行保護。Since a thick copper thick copper circuit is formed in this case, the conductive circuit layer 60 formed by the first conductive circuit pattern 20 and the second conductive pattern 30 includes a first opening portion 202 and a second opening portion 302 (Pitch) which are narrower, and It is difficult to fill the first opening portion 202 and the second opening portion 302 with the molten colloid included in the cover film 50 only by laminating the cover film 50 on the surface of the conductive circuit layer 60. Therefore, in this embodiment, the conductive layer The first opening 202 and the second opening 302 of the circuit layer 60 are filled with pure glue 40, and then a cover film 50 is laminated on the surface of the conductive circuit layer 60. The pure glue 40 and the cover film 50 are used for The conductive circuit layer 60 is protected.
請再次參閱圖10,本發明第二實施例還提供由上述具厚銅線路的電路板製作方法製作而成的電路板200,其包括絕緣層12及形成在絕緣層12表面的導電線路層60,該導電線路層60包括形成在該絕緣層12表面的第二導電線路圖案20以及與第二導電線圖案20相堆疊的第一導電線路圖案30。Please refer to FIG. 10 again. The second embodiment of the present invention further provides a circuit board 200 manufactured by the method for manufacturing a circuit board with thick copper lines, which includes an insulating layer 12 and a conductive circuit layer 60 formed on a surface of the insulating layer 12. The conductive circuit layer 60 includes a second conductive circuit pattern 20 formed on a surface of the insulating layer 12 and a first conductive circuit pattern 30 stacked on the second conductive line pattern 20.
該第一導電線路圖案20包括多個相連的梯形201及形成在相鄰梯形201之間的第一開口部202,該第一開口部202包括兩個側壁22以及連接兩個側壁22的底壁24,該側壁22形成有一層防護層240。該防護層240為金屬防護層。The first conductive circuit pattern 20 includes a plurality of connected trapezoids 201 and a first opening 202 formed between adjacent trapezoids 201. The first opening 202 includes two side walls 22 and a bottom wall connecting the two side walls 22. 24. A protective layer 240 is formed on the sidewall 22. The protective layer 240 is a metal protective layer.
該第二導電線路圖案30與第一導電線路圖案20的形狀大致相同,其包括多個相連的梯形301及形成在相鄰梯形301之間的第二開口部302,每個第二開口部302分別與一個所述第一開口部202相通、尺寸與所述第一開口部202大致相等,該第二開口部302暴露該絕緣層12。第一開口部202、第二開口部302的截面大致為倒梯形The shape of the second conductive circuit pattern 30 is substantially the same as that of the first conductive circuit pattern 20. The second conductive circuit pattern 30 includes a plurality of connected trapezoids 301 and second openings 302 formed between adjacent trapezoids 301. Each second opening 302 The second openings 302 are in communication with one of the first openings 202 and are substantially equal in size to the first openings 202. The second openings 302 expose the insulating layer 12. The cross sections of the first opening 202 and the second opening 302 are approximately inverted trapezoids.
該第一開口部202、該第二開口部302填充有純膠40,純膠40還覆蓋該第一導電線路圖案20的表面,該純膠40表面的形成有覆蓋膜50。The first opening portion 202 and the second opening portion 302 are filled with pure glue 40. The pure glue 40 also covers the surface of the first conductive circuit pattern 20. A cover film 50 is formed on the pure glue 40 surface.
請參閱圖11,本發明第三實施例還提供由上述具厚銅線路的電路板製作方法製作而成的電路板300,其包括絕緣層及形成在絕緣層12相背兩個表面的兩個導電線路層60,每個該導電線路層60包括形成在該絕緣層12表面的第二導電線路圖案30以及與第二導電線圖案30相堆疊的第一導電線路圖案20。Please refer to FIG. 11, a third embodiment of the present invention further provides a circuit board 300 manufactured by the method for manufacturing a circuit board with thick copper lines, which includes an insulating layer and two formed on two opposite surfaces of the insulating layer 12. Each of the conductive circuit layers 60 includes a second conductive circuit pattern 30 formed on a surface of the insulating layer 12 and a first conductive circuit pattern 20 stacked on the second conductive line pattern 30.
該第一導電線路圖案20包括多個相連的梯形及形成在相鄰梯形之間的第一開口部202,該第一開口部202包括兩個側壁22以及連接兩個側壁22的底壁24,該側壁22形成有一層防護層240。該防護層240為金屬防護層。The first conductive circuit pattern 20 includes a plurality of connected trapezoids and a first opening portion 202 formed between adjacent trapezoids. The first opening portion 202 includes two side walls 22 and a bottom wall 24 connecting the two side walls 22. A protective layer 240 is formed on the sidewall 22. The protective layer 240 is a metal protective layer.
該第二導電線路圖案30包括多個相連的梯形及形成在相鄰梯形之間的第二開口部302,每個第二開口部302分別與一個所述第一開口部202相通。The second conductive circuit pattern 30 includes a plurality of connected trapezoids and second opening portions 302 formed between adjacent trapezoids, and each of the second opening portions 302 communicates with one of the first opening portions 202, respectively.
該第一開口部202、該第二開口部302填充有純膠40,純膠40還覆蓋該第一導電線路圖案20的表面,該純膠40表面的形成有覆蓋膜50。The first opening portion 202 and the second opening portion 302 are filled with pure glue 40. The pure glue 40 also covers the surface of the first conductive circuit pattern 20. A cover film 50 is formed on the pure glue 40 surface.
綜上所述,本發明提供的具厚銅線路的電路板製作方法及由此製作而成的電路板,對於該絕緣層其中一個表面的該第一銅箔層14經過兩次蝕刻形成該導電線路層60,如此,可以降低線路側壁被蝕刻的風險,有效減少線路的毛邊現象,並且可以得到更細的線路,經過檢測,線寬大約為50μm,形成在第一導電線路圖案20側壁的該防護層240,可以對導電線路層60進行保護,使導電線路層60的抗氧化能力更強。In summary, the present invention provides a method for manufacturing a circuit board with thick copper lines and a circuit board manufactured therefrom. The first copper foil layer 14 on one surface of the insulating layer is etched twice to form the conductive layer. In this way, the wiring layer 60 can reduce the risk of etching the sidewalls of the wiring, effectively reduce the phenomenon of burrs on the wiring, and obtain a finer wiring. After testing, the wiring width is about 50 μm. The wiring formed on the sidewall of the first conductive wiring pattern 20 The protective layer 240 can protect the conductive circuit layer 60 and make the conductive circuit layer 60 more resistant to oxidation.
綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。In summary, the present invention has indeed met the requirements for an invention patent, and a patent application was filed in accordance with the law. However, the above are only preferred embodiments of the present invention, and the scope of patent application in this case cannot be limited by this. For example, those who are familiar with the skills of this case and equivalent modifications or changes made in accordance with the spirit of the present invention should be covered by the following patent applications.
200,300200,300
具厚銅線路的電路板: Circuit board with thick copper wiring:
10‧‧‧覆銅基板10‧‧‧ Copper-clad substrate
14‧‧‧第一銅箔層14‧‧‧The first copper foil layer
12‧‧‧絕緣層12‧‧‧ Insulation
16‧‧‧感光性薄膜16‧‧‧ photosensitive film
160‧‧‧開口160‧‧‧ opening
162‧‧‧蝕刻阻擋層162‧‧‧Etching barrier
20‧‧‧第一導電線路圖案20‧‧‧ the first conductive circuit pattern
24‧‧‧底壁24‧‧‧ bottom wall
22‧‧‧側壁22‧‧‧ sidewall
240‧‧‧防護層240‧‧‧ protective layer
30‧‧‧第二導電線路圖案30‧‧‧ the second conductive line pattern
40‧‧‧純膠40‧‧‧Pure rubber
50‧‧‧覆蓋膜50‧‧‧ cover film
60‧‧‧導電線路層60‧‧‧Conductive circuit layer
201,301‧‧‧梯形201, 301‧‧‧ trapezoid
202‧‧‧第一開口部202‧‧‧First opening
302‧‧‧第二開口部302‧‧‧Second opening
無no
200‧‧‧具厚銅線路的電路板 200‧‧‧ Circuit board with thick copper wiring
12‧‧‧絕緣層 12‧‧‧ Insulation
20‧‧‧第一導電線路圖案 20‧‧‧ the first conductive circuit pattern
30‧‧‧第二導電線路圖案 30‧‧‧ the second conductive line pattern
40‧‧‧純膠 40‧‧‧Pure rubber
50‧‧‧覆蓋膜 50‧‧‧ cover film
60‧‧‧導電線路層 60‧‧‧Conductive circuit layer
201,301‧‧‧梯形 201, 301‧‧‧ trapezoid
202‧‧‧第一開口部 202‧‧‧First opening
302‧‧‧第二開口部 302‧‧‧Second opening
Claims (12)
提供覆銅基板,該覆銅基板包括絕緣層以及形成在該絕緣層其中一個表面的第一銅箔層;
在該第一銅箔層表面形成一層感光性薄膜;
在該感光性薄膜中形成多個開口,該開口暴露該第一銅箔層;
從該開口的位置對該第一銅箔層進行第一次蝕刻,得到第一導電線路圖案,該第一導電線路圖案包括多個相連的梯形及形成在相鄰梯形之間的第一開口部,該第一開口部包括兩個側壁以及連接兩個該側壁的底壁;
在該側壁的表面形成一層防護層;
從該底壁的位置對該第一銅箔層進行第二次蝕刻,形成第二導電線路圖案;及
移除該感光性薄膜,該第一導電線路圖案與該第二導電線路圖案共同構成導電線路層,從而得到具厚銅線路的電路板。A method for manufacturing a circuit board with thick copper lines includes the following steps:
Provide a copper-clad substrate, which includes an insulating layer and a first copper foil layer formed on one surface of the insulating layer;
Forming a photosensitive film on the surface of the first copper foil layer;
Forming a plurality of openings in the photosensitive film, the openings exposing the first copper foil layer;
The first copper foil layer is etched for the first time from the position of the opening to obtain a first conductive circuit pattern. The first conductive circuit pattern includes a plurality of connected trapezoids and first openings formed between adjacent trapezoids. The first opening includes two side walls and a bottom wall connecting the two side walls;
Forming a protective layer on the surface of the side wall;
Etch the first copper foil layer for a second time from the position of the bottom wall to form a second conductive circuit pattern; and remove the photosensitive film, the first conductive circuit pattern and the second conductive circuit pattern together form electrical conductivity Circuit layer to obtain a circuit board with thick copper wiring.
對該底壁與側壁分別進行電鍍一層金屬層;
利用雷射燒蝕的方式將底壁的該金屬層去掉僅保留該側壁的金屬層,保留的該金屬層形成該防護層。The method for manufacturing a circuit board with a thick copper circuit according to claim 1, wherein the step of forming the protective layer on the sidewall is:
Plating a metal layer on the bottom wall and the sidewall respectively;
The laser ablation method is used to remove the metal layer on the bottom wall and only the metal layer on the side wall is retained, and the remaining metal layer forms the protective layer.
The circuit board with a thick copper circuit according to claim 11, wherein the first opening portion and the second opening portion are further filled with pure glue, and a cover film is formed on a surface of the pure glue.
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| ??201610604631.3 | 2016-07-28 | ||
| CN201610604631.3A CN107666782A (en) | 2016-07-28 | 2016-07-28 | Has circuit board of thick copper circuit and preparation method thereof |
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| CN114501801A (en) * | 2020-10-28 | 2022-05-13 | 深南电路股份有限公司 | Circuit board processing method and circuit board |
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| CN112312682B (en) * | 2019-07-30 | 2023-07-21 | 宏启胜精密电子(秦皇岛)有限公司 | Circuit board with thick copper circuit and manufacturing method thereof |
| CN113630977B (en) * | 2020-05-06 | 2023-01-17 | 鹏鼎控股(深圳)股份有限公司 | Thick copper circuit board and manufacturing method thereof |
| CN119183259B (en) * | 2023-06-21 | 2025-10-14 | 庆鼎精密电子(淮安)有限公司 | Circuit board and manufacturing method thereof |
| CN119342678B (en) * | 2023-07-18 | 2025-10-24 | 宏恒胜电子科技(淮安)有限公司 | Circuit board and method for manufacturing the same |
| CN117393497B (en) * | 2023-11-03 | 2025-09-19 | 江西万年芯微电子有限公司 | Side etching method of copper layer circuit of copper-clad ceramic substrate and application of side etching method |
| CN117395880A (en) * | 2023-11-17 | 2024-01-12 | 淮安特创科技有限公司 | A method for etching ultra-thick copper PCB boards |
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| US4943346A (en) * | 1988-09-29 | 1990-07-24 | Siemens Aktiengesellschaft | Method for manufacturing printed circuit boards |
| TW551016B (en) * | 2002-07-31 | 2003-09-01 | Uni Circuit Inc | Circuit board manufacturing process of embedded resistor |
| WO2012148332A1 (en) * | 2011-04-29 | 2012-11-01 | Telefonaktiebolaget L M Ericsson (Publ) | Manufacturing method for printed circuit boards |
| CN102291941B (en) * | 2011-06-23 | 2013-05-22 | 深南电路有限公司 | Method for processing lines of thick copper plate |
| CN103491714B (en) * | 2012-06-11 | 2016-08-03 | 深南电路有限公司 | Circuit board line processing method |
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| CN114501801A (en) * | 2020-10-28 | 2022-05-13 | 深南电路股份有限公司 | Circuit board processing method and circuit board |
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