1233775 玖、發明說明： 【發明所屬之技術領域】 係關於一種用 、本發明係關於—種電源層系統，詳言之 於多層結構之電源層系統。 【先前技術】 相關之先前技術可參閱美國專利第6G84779、6557154及 6518930號等專利。 —在南速數位電路中，訊號線與電源平面相接，其間存在 -寄生勺甩感、電谷、電阻效應，當積體電路（1C )快速 切換時，導致暫態電壓Δν產生於電源平面間，該暫態電壓 為一雜訊，稱之為地彈雜訊（Ground Bounce Noise)。若將 提供電源之電源層視為一平行導波結構，此地彈雜訊將造 成電源層共振，可發現在共振頻率點附近，地彈雜訊對訊 號品質（SI)與電磁干擾（EMI)的影響相當顯著。 為了減低地彈雜訊的影響，習知之技術有兩種··第一為 加一去耦合電容，該去耦合電容能提供一低阻抗路徑，使 該地彈雜訊順利導引到金屬接地面；第二種習知技術請參 考圖1 ’ ό知之電源層結構1 〇包括一基板11、一電源層12及 一接地層13。該電源層12係形成於該基板丨丨之上，該接地 層13係形成於該基板11之下。該電源層12係一金屬平面板 121 ’為避免地彈雜訊’於該金屬平面板121上切割一狹縫 122，該狹縫122界定一區域123，可將地彈雜訊束縛於該狹 缝122所界定之區域123，而不會使内部之地彈雜訊雜訊干 擾到該區域外其他元件的正常工作。另外，切割該狹縫12 21233775 发明 Description of the invention: [Technical field to which the invention belongs] The invention relates to a type of power supply, and the present invention relates to a power supply layer system, specifically, a power supply layer system of a multilayer structure. [Prior art] For related prior art, please refer to US Patent Nos. 6G84779, 6557154, and 6518930. —In the South-speed digital circuit, the signal line is connected to the power plane, and there are parasitic shake, power valley, and resistance effects. When the integrated circuit (1C) is quickly switched, the transient voltage Δν is generated on the power plane. In the meantime, the transient voltage is a noise called Ground Bounce Noise. If the power supply layer that provides power is regarded as a parallel guided wave structure, the ground bomb noise will cause the power layer to resonate. It can be found that near the resonance frequency point, the ground bomb noise affects signal quality (SI) and electromagnetic interference (EMI) The impact is quite significant. In order to reduce the impact of ground bomb noise, there are two known techniques. The first is to add a decoupling capacitor, which can provide a low impedance path, so that the ground bomb noise can be smoothly guided to the metal ground plane. ; For the second conventional technology, please refer to FIG. 1. The known power layer structure 10 includes a substrate 11, a power layer 12, and a ground layer 13. The power source layer 12 is formed on the substrate 11, and the ground layer 13 is formed under the substrate 11. The power layer 12 is a metal plane plate 121 'to avoid ground bounce noise'. A slit 122 is cut on the metal plane plate 121. The slit 122 defines a region 123, which can restrain the ground bounce noise to the narrow space. The area 123 defined by the slit 122 does not allow the internal noise of the bomb to interfere with the normal operation of other components outside the area. In addition, the slit 12 2 is cut
O:\90\90608.DOC 1233775 使得平㈣面積減小，造成電_射共振職高頻遷移， 如此可達到在工作頻率點内有良好的雜訊_效果#較 低的電磁輻射場。 然而’利用第一種習知技術所加之實際去耦合電容且有 寄生電感效應，且愈大的電容值此電感效應越明顯，所以 去搞合電容對雜訊的抑制效果，會因為電感效應而隨工作 頻率增加，抑制效果下降。在第二種習知技術中，電源平 面層若以完整切劉狹缝方式來抑制接地彈跳效應（亦即益 通道124)，不但阻斷了狹縫内外直流電位準位，當内部訊 號線與外部元件相連接時，勢必要跨越狹縫而造成更嚴重 的訊號品質（si)與電磁輻射問題。因此，—般之狹縫122周 圍會預留-通道124,以維持内外準位的—致性與避免訊號 線跨越狹縫情況產生。然而，實驗結果發現，該通道124之 通道效應们寻抑制雜訊與電磁輕射的效果降⑯，另外於低 頻帶處會產生新的共振頻率點。 因此，實有必要提供一種創新且富進步性之電源層系 統，以解決上述問題。 【發明内容】 本發明 < 目的在於提供一種用於多層結構之電源層系 統，包括：一基板、一電源層及一接地層。該電源層用以 提供藏多層結構之電源，該電源層具有複數個金屬單元， 忒等金屬單元間係以複數個單元狹缝區隔，且該等金屬單 兀係以複數個通道連接，該等通道係由複數個通道狹缝所 界定。該接地層用以提供該多層結構之接地，該接地層具O: \ 90 \ 90608.DOC 1233775 reduces the flat area, causing high-frequency migration of the electrical resonance radiation, which can achieve good noise at the operating frequency point. # The lower electromagnetic radiation field. However, 'the actual decoupling capacitor added by the first conventional technology has a parasitic inductance effect, and the larger the capacitance value, the more obvious the inductance effect, so the noise suppression effect of the capacitor will be affected by the inductance effect. As the operating frequency increases, the suppression effect decreases. In the second conventional technique, if the power plane layer cuts the slit in a complete way to suppress the ground bounce effect (that is, the benefit channel 124), it not only blocks the DC potential level inside and outside the slit. When the internal signal line and the When external components are connected, it is necessary to cross the slit to cause more serious signal quality (si) and electromagnetic radiation problems. Therefore, the-channel 124 is reserved around the general slit 122 to maintain the internal and external level consistency and to avoid the signal line from crossing the slit. However, the experimental results show that the channel effect of this channel 124 is to reduce the effect of suppressing noise and electromagnetic light emission. In addition, a new resonance frequency point will be generated at a low frequency band. Therefore, it is necessary to provide an innovative and progressive power layer system to solve the above problems. [Summary of the Invention] The present invention < aims to provide a power layer system for a multi-layered structure, which includes a substrate, a power layer and a ground layer. The power supply layer is used to provide a power source with a multi-layer structure. The power supply layer has a plurality of metal units, and metal units such as rhenium are separated by a plurality of unit slits, and the metal units are connected by a plurality of channels. The isochannel is defined by a plurality of channel slits. The ground layer is used to provide the ground of the multilayer structure.
O:\90\90608.DOC 1233775 有'^接地金屬板。 利用本發明之電源層系統，該電源層之通道可等效為電 感，該金屬單元間之該等單元狹缝可等效為啦— ^ ’电谷，加上該 等金屬單元與基板間之電容，提供—合成之等效電容。因 此，利用並接之等效電容及電感效應，可達到—具寬頻之 截止帶’在該截止帶中之訊號不易向外傳播，可達到抑制 雜訊干擾之目m在截止帶的電磁輕射亦可被有效地 抑制。 【實施方式】 請參閱圖2,其顯示本發明用於多層結構之電源層系統扣 之結構示意圖。本發明之電源層系統20主要包括··一基板 3〇、一接地層40及一電源層5〇。該基板3〇具有一第一表面 及一第二表面，該第二表面係相對於該第一表面。該電源 層50係形成於該基板3〇之第一表面。該接地層仙係形成於 ?褒基板30之第二表面。然而，因本發明之電源層系統可應 用於多層結構，故該電源層及該接地層並不限須形成於^ 一基板之結構，可分別形成於不同之基板上。 忒基板可為印刷電路板，使本發明之電源層系統可應用 於^層印刷電路板之架構。另外，該基板可為半導體封裝 基板’使本發明之電源層系統可應用於多層半導體封装之 架構。 清參考圖3 ’該電源層包括複數個金屬單元51、52、53 等，金屬單元間係以複數個單元狹縫區隔，例如金屬單元 51及52間係以單元狹縫56區隔。請同時參閱圖4，以金屬單O: \ 90 \ 90608.DOC 1233775 has' ^ grounded metal plate. With the power supply layer system of the present invention, the channel of the power supply layer can be equivalent to an inductor, and the cell slits between the metal units can be equivalent to ^ 'Electric Valley, plus the metal unit and the substrate. Capacitance, provide-equivalent equivalent capacitance. Therefore, by using the equivalent capacitance and inductance effects connected in parallel, it can be achieved that the signal with a wide cut-off band in the cut-off band is difficult to propagate outward, and the purpose of suppressing noise interference can be achieved. Can also be effectively suppressed. [Embodiment] Please refer to FIG. 2, which shows a schematic structural diagram of a power layer system button for a multi-layer structure according to the present invention. The power layer system 20 of the present invention mainly includes a substrate 30, a ground layer 40, and a power layer 50. The substrate 30 has a first surface and a second surface, and the second surface is opposite to the first surface. The power supply layer 50 is formed on the first surface of the substrate 30. The ground layer fairy is formed on the second surface of the base substrate 30. However, since the power supply layer system of the present invention can be applied to a multilayer structure, the power supply layer and the ground layer need not be formed on a single substrate structure, and may be formed on different substrates, respectively. The substrate can be a printed circuit board, so that the power supply layer system of the present invention can be applied to the structure of a printed circuit board. In addition, the substrate can be a semiconductor package substrate 'so that the power supply layer system of the present invention can be applied to the structure of a multilayer semiconductor package. Referring to FIG. 3, the power layer includes a plurality of metal units 51, 52, 53 and the like. The metal units are separated by a plurality of unit slits. For example, the metal units 51 and 52 are separated by a unit slit 56. Please also refer to Figure 4 for a metal sheet
O:\90\90608.DOC 1233775 兀5 1為例說明。該金屬單元5丨具有一金屬單元板5丨丨、複數 個通道512、513等。利用該等通道512、513等使該金屬單 元51與相鄰之金屬單元可電氣連接。例如，通道512可使金 屬單元51及金屬單元52電氣連接。 該等通道512、513等係由複數個通道狹缝所界定。以通 道512為例說明，該通道512係由成對之通道狹縫5丨4及 所界定。該等通道狹縫514及515係由單元狹缝兄朝該金屬 單元板511延伸，俾形成該通道512。 本發明上述實施例中之金屬單元係呈正方形，並以通道 互相連接。然而，本發明之金屬單元並不限於正方形，亦 可為，、角形等可以互相接續之形&，或是為不規則形狀但 彼此可以狹縫區隔並以通道連接。 以等效電路之觀點而言，該等金屬單元間係以通道（例 如：通道512)相連接，該等通道可等效為電感效應。另外， 該等金屬單元（例如：金屬單元51及52)間之該等單元狹 缝（例如：單元狹縫56)可等效為—電容，再加上該等金 屬早几與基板間之電容，可提供—合成之等效電容。因此， 利用上述並接之等效電容及電感效應，可達到一具有寬頻 之截止帶（Stop Band)’在該截止帶中之訊號不易向外傳 播，可達到抑制雜訊干擾之目的，並且在截止帶的電磁輕 射亦可被有效地抑制。 在多層結構中，另有—元件層或複數Μ件層，該元件 層具有-基板及複數個元件（通常為積體電路），因此設二 財金屬單元可對應於供給特定之某—或某些積體電路之O: \ 90 \ 90608.DOC 1233775 Wu 51 1 is taken as an example. The metal unit 5 丨 has a metal unit plate 5 丨 丨, a plurality of channels 512, 513, and the like. The channels 512, 513, etc. are used to electrically connect the metal unit 51 to an adjacent metal unit. For example, the channel 512 can electrically connect the metal unit 51 and the metal unit 52. The channels 512, 513, etc. are defined by a plurality of channel slits. Take channel 512 as an example. The channel 512 is defined by the pair of channel slits 5 and 4 and. The channel slits 514 and 515 are extended from the unit slit brother toward the metal unit plate 511 to form the channel 512. The metal units in the above embodiments of the present invention are square and connected to each other by channels. However, the metal unit of the present invention is not limited to a square, and may be a shape & which can be connected to each other, or an irregular shape but can be separated by slits and connected by channels. From the perspective of equivalent circuits, the metal units are connected by channels (for example, channel 512), and these channels can be equivalent to the inductance effect. In addition, the unit slits (eg, unit slits 56) between the metal units (eg, metal units 51 and 52) can be equivalent to-capacitance, plus the capacitance between the metal and the substrate , Can provide-equivalent equivalent capacitance. Therefore, by using the above-mentioned parallel equivalent capacitance and inductance effects, it is possible to achieve a stop band with a wide frequency band (Stop Band). The signal in the stop band is difficult to propagate outward, and the purpose of suppressing noise interference can be achieved. The electromagnetic light emission of the cutoff band can also be effectively suppressed. In a multi-layer structure, there is another—a component layer or a plurality of M component layers. The component layer has a substrate and a plurality of components (usually integrated circuits). Therefore, a second metal unit can be provided to a specific one—or a certain one. Of integrated circuits
O:\90\90608.DOC 1233775 電源。當在該金屬單元内之奚 κ系一積體電路因高速切換產生 地彈雜訊時，該地彈雜訊將會限制於該金屬單元内，而不 會向外傳遞’因此不會影響在該金屬單元外之其他元件。 可有效達到抑制雜訊干擾之目的。 參考圖5所示’其中曲線58係參考板“―） 之頻率響應，曲線59為本發明之電源層系統由金屬單元53 率響應D上述之參考板為未具任何狹缝之電源 θ因此本發明之％源層系統於1〇1^〜40112間有極深的 截止帶’若雜訊頻率落在此頻帶内，該雜訊則不易傳播到 周邊其他元件。反觀在未具狹縫之參考板，其頻率響應則 不具有此一特性，顯示雜訊將傳遞至其他元件。 參考圖6 ’以數值分析方法（時域有限差分法；FDTD )探 时本發明足電源層系統各方向的遠場輻射效應並取其最大 值。其中曲線61係參考板之輻射效應，曲線62為本發明之 電源層系統之輻射效應。模擬結果發現，本發明之電源層 系統其共振輻射場於截止帶（1(3^12〜4(3112)處大幅被抑制， 由此可證明本發明之電源層系統在抑制雜訊與電磁輻射場 方面具全向性。 惟上述實施例僅為說明本發明之原理及其功效，而非限 制本發明。因此，習於此技術之人士可在不達背本發明之 精神對上述實施例進行修改及變化。本發明之權利範圍鹿 如後述之申請專利範圍所列。 【圖式簡單說明】 圖1為習知之電源層結構示意圖；O: \ 90 \ 90608.DOC 1233775 power supply. When the 弹 κ series integrated circuit in the metal unit generates ground bomb noise due to high-speed switching, the ground bomb noise will be limited to the metal unit, and will not be transmitted to the outside. Other elements outside the metal unit. Can effectively achieve the purpose of suppressing noise interference. Referring to FIG. 5, where the curve 58 is the frequency response of the reference board “—”, the curve 59 is the power layer system of the present invention with a metal unit 53 rate response D. The above reference board is a power source without any slit θ. The% source layer system of the invention has a very deep cut-off band between 101 and 4012. 'If the noise frequency falls within this band, the noise will not easily propagate to other peripheral components. In contrast, there is no reference in the slit Board, its frequency response does not have this characteristic, showing that noise will be transmitted to other components. Refer to Figure 6 'using a numerical analysis method (finite difference time domain method; FDTD) to test the distance of the foot power layer system of the present invention in all directions. The field radiation effect takes its maximum value. Among them, curve 61 is the radiation effect of the reference plate, and curve 62 is the radiation effect of the power layer system of the present invention. The simulation results show that the resonance radiation field of the power layer system of the present invention is in the cutoff band ( 1 (3 ^ 12 ~ 4 (3112) is greatly suppressed, which can prove that the power layer system of the present invention is omnidirectional in suppressing noise and electromagnetic radiation fields. However, the above embodiments are only for explaining the principle of the present invention. and The invention is effective, rather than limiting the invention. Therefore, those skilled in the art can modify and change the above embodiments without departing from the spirit of the invention. The scope of the rights of the invention is listed in the scope of the patent application described below. Brief description of the drawings] Figure 1 is a schematic diagram of a conventional power layer structure;
O:\90\90608.DOC 1233775 圖2為本發明用於多層結構之電源層系統之示意圖； 圖3為本發明電源層系統之電源層之結構示意圖； 圖4為本發明電源層系統之金屬單元之結構示意圖； 圖5為本發明之電源層系統之頻率響應示意圖；及 圖6為本發明之電源層系統之輻射效應示意圖。 【圖式元件符號說明】 10 :電源層結構 11 :基板 12 :電源層 121 ··金屬平面板 122 :狹缝 123 :區域 124 :通道 13 :接地層 20 :電源層系統 30 :基板 40 :接地層 50 :電源層 51、52、53 ··金屬單元 5 11 :金屬單元板 512、513 :通道 514、515 :通道狹縫 56 :單元狹縫 O:\90\90608.DOC -10-O: \ 90 \ 90608.DOC 1233775 Figure 2 is a schematic diagram of a power layer system for a multilayer structure of the present invention; Figure 3 is a schematic diagram of a power layer of the power layer system of the present invention; Figure 4 is a metal of a power layer system of the present invention Unit structure diagram; Figure 5 is a schematic diagram of the frequency response of the power layer system of the present invention; and Figure 6 is a schematic diagram of the radiation effect of the power layer system of the present invention. [Illustration of Symbols of Schematic Elements] 10: Power supply layer structure 11: Substrate 12: Power supply layer 121 · Metal flat plate 122: Slot 123: Area 124: Channel 13: Ground layer 20: Power supply layer system 30: Substrate 40: Connection Ground layer 50: Power supply layer 51, 52, 53 Metal unit 5 11: Metal unit plate 512, 513: Channel 514, 515: Channel slit 56: Unit slit O: \ 90 \ 90608.DOC -10-