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TWI291315B - Electrical connection layout structure of passive component - Google Patents

Electrical connection layout structure of passive component Download PDF

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Publication number
TWI291315B
TWI291315B TW95118402A TW95118402A TWI291315B TW I291315 B TWI291315 B TW I291315B TW 95118402 A TW95118402 A TW 95118402A TW 95118402 A TW95118402 A TW 95118402A TW I291315 B TWI291315 B TW I291315B
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TW
Taiwan
Prior art keywords
electrical connection
passive component
substrate
connection layout
passive
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Application number
TW95118402A
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Chinese (zh)
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TW200744421A (en
Inventor
Bg Fan
David Wei
Original Assignee
Inventec Corp
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Publication of TWI291315B publication Critical patent/TWI291315B/en

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Abstract

An electrical connection layout structure of a passive component is used in a substrate. The layout structure includes a solder region and at least one electrically connecting terminal. The solder region has two pads disposed opposite to each other for installation of the passive component. The electrically connecting terminal is located on one side of a base line passing the pads and is perpendicular to the base line. Through the layout, the stress uneven across the base line while soldering the passive component and the Tombstone effect are prevented. Thus, the product quality is improved.

Description

1291315 九、發明說明: 【發明所屬之技術領域】 本發明係有關於一種被動元件之電性連接佈局於 -構,更詳而言之,係關於一種應用於基板中以防止被動元 •件於銲接時產生墓碑效應(Tombstone effect)之電性連 接佈局結構。 【先前技術】 由於半導體製程之進步,以及半導體晶片之電性功能 馨不斷提昇’使得半導體裝置之發展趨於高度集積化。而該 電子產品在高功能及高速化的趨勢下,漸需在半導體封裝 件上佈設有例如電阻器(Resistors)、電容器叩狀it〇rs) .及電感器(Inductors)等被動元件(passive .c〇mponent),以消除雜訊與穩定電路,藉以提昇或穩定電 子產品的電性功能。 目前,多數之被動元件係安置於基板之表面,該基板 #可為一般印刷電路板(Printed Circuit B〇ard,pcB)或半 導體晶片之封裝基板,然為避免該等被動元件阻礙半導體 •晶片與多數銲接墊(Bonding fingers)間之電性連結,傳旦 統上多將該等被動元件安置於印刷電路板之角端位置,並 .係利用習知表面黏接技術(Surface-Mounting1291315 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to an electrical connection arrangement of a passive component, and more particularly to an application to a substrate to prevent passive components from being The electrical connection layout structure of the Tombstone effect is generated during welding. [Prior Art] As the progress of the semiconductor process and the electrical function of the semiconductor wafer continue to increase, the development of the semiconductor device tends to be highly integrated. In the trend of high-performance and high-speed electronic products, it is increasingly necessary to provide passive components such as resistors, capacitors, and inductors on the semiconductor package. C〇mponent) to eliminate noise and stabilize circuits to enhance or stabilize the electrical functions of electronic products. At present, most of the passive components are disposed on the surface of the substrate, and the substrate # can be a printed circuit board (PCB) or a package substrate of a semiconductor chip, but the passive components are prevented from obstructing the semiconductor wafer and the The electrical connection between most of the bonding fingers, the passive components are placed at the corner end of the printed circuit board, and the surface bonding technology is used (Surface-Mounting)

Technology,SMT)而將該等被動元件藉由銲黏劑(s〇iderTechnology, SMT) and these passive components by solder paste (s〇ider

PaSte)固接至該基板預設銲接位置之銲墊(Solder Pad) 上,藉以電性連接至電路板。並且,再透過設於該銲墊之 側旁之例如導電通孔(Via)而可將該被動元件電性連接 19494 5 1291315 至該基灰之例如為電泝 .請參閱第1圖其=接:層或其他線路之線路層。 之電性連接佈局社構。士、、不白知應用於基板之被動元件 -10係提供兩相對設置且右Μ 4板1之預設銲接區 可電性連接於基板1之例如被動元件110 路層120,亦忐甘从 书源層、接地或其它線路之線 々曰 ’、或,、他電子元件,於該銲接區10之:ϋ中— 、干墊100且對應平行於該二桩 _成之基準線❸m n 1G2直線連接所構 拉山〇Λ “而〇又有一例如為導電通孔(Via)之電性連 鳊,亚透過-寬導電線路13〇以 ⑽’而於㈣之銲墊_以—細導電線路14q電= 接至其他訊號線。 准上述之電性連接佈局結構,該係如導電通孔(Via) 之屯性連接端20、二銲墊1〇〇、1〇2及細導電線路ι4〇係 同在一基準線上,當以迴銲(Refl〇[s〇ldaind製程將該 _被動元件110銲接至該預設銲接區1〇之對應銲墊1⑽、 1〇2上時,該電性連接之該銲墊1〇〇之寬導電線路13〇會 •因其線寬較大而可能有偷錫作用,而將銲黏劑自銲墊1〇〇 吸引到寬導電線路130上,並引發二侧之銲黏劑因劑量及 熔化狀態不一致,致使該被動元件11〇之二端受到銲黏劑 之拉力不一致,如圖所示之箭頭A1、A2方向,其中該粗 導線130相較於細導線14〇,具有較大之拉應力,故而容 易產生墓碑效應(Tombstone effect),使該被動元件no 產生翹起的現象,嚴重者甚至使該被動元件丨丨〇翹起之一 19494 6 1291315 端無法電性連接該銲墊1〇2; '細導電線請具有近似於散熱:之 期間可將熱量自銲藝_帶走,而該寬導 、^接 -於另端細導電線路140之散埶 、广、 相較 J速度不―,亦容易產生墓碑^’。造成二鮮塾冷 為電:第2圖,其係顯示該被動元件11。例如 -'、、备™,且係笔性連接於電源端及接地端 於該銲墊100、102平行於w用例中; 99 9/1 、基卓、,泉處個別設有電性連接 :】):供其個別電性連接至電源端及接地端(未予 乂圖不)。然該連接端22、24係設於該薛塾10 予 應平行於該基準線,使該連接端22、24二者2 ;库導致電感效應過大’因而降低該電容器之電容 效>c ’進而影響產品之品質。 因此’如何提出一種被動元件之電性 Z免習知技術中之種種缺失,以於該被⑹件 防止發生墓碑現象,提高被動元件之銲接效果心 :提:某-類被動元件之電性品質,進而提升產品之品。 貝,貫為目前亟欲解決之技術課題。 【發明内容】 θ鑒於以上所述習知技術之缺點,本發明之主要目的係 f提供—種被動元件之電性連接佈局結構,得使該被動: 件於銲接時避免產生墓碑效應。 本發明之另一目的係在提供一種被動元件之電性連 接佈局結構,得提高被動元件之電性連接品質。 19494 7 1291315 _本發明之再—目的係在提供 *接佈局結構,偟栌古& 件之電性連 、稱俾如尚佈局設計之靈活性。 : 4達上述及其他相關之目的,本發明提 -件之電性連接佈月έ 種被動70 」系包括:-銲接區,俜,…土敬"佈局結構 之輝墊,以供對應接置—被動 相對设直 端,係以一導電線路電 ν電性連接 •之其中一銲執日午板之線路層與該銲接區 . 且垂直於該二銲墊直線連接所成之 籲線’错以供該被動元件 成之基準 產生受力不均的情、兄 避免二鮮塾在基準線方向 M月况,亚防止產生墓碑效應。 八中’該_墊係設於該基板上 -之位置,於一較佳垂浐如士 曰亍今版日日片设置 ,+ 叙牷μ%例中,該銲墊可例如為矩形紝禮。 ,于接技術以銲接於該基板之銲執 二:被動元件可例如為電阻器、電之:塾 >車父佳貫施例中,當該被動元件係為電容器且其一 二鮮墊直線連接電性連接端係同側位於該 之間距、,,崎低電感效應對電容效應之影響。接而 上述該電性連接端係為導 接至該基板之例如電、肩# 孔(Vla),用以電性連 層。 ’源層、接地層或訊號傳輸層之線路 本發明之被動元件之電性連接佈令 電性連接端設於銲接區t _ D、、《構係透過將該 〒接Q之—銲墊直線連接的基準線側 19494 8 1291315 邊且對應垂直於該基準線’以避免該被動元件於銲接時 口又力不均產生暴碑效應;同時,透過本發明之被動元件 之接佈局結構,相較於習知技術,特別係對於例如 為電容器之被動元件,由於該電性連接端係垂直設於基準 線側邊’以縮短二電性連接端之間距,俾可降低電感效應 ^增強電容效應,並可提高該被動元件之電性品質及 該產品之品質。 【實施方式】 、以下係藉由特定的具體實例說明本發明之實施方 熟悉此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點與功效。 差實施例 請參閱第3圖,係顯示本發明之被動元件之電性連接 佈局結構之第-實施例之示意圖;如圖所示,本發明之被 動兀件之電性連接佈局結構錢勸―基板3中,係包 t.由一鲜接㊄3〇以及至少一電性連接端40,於該銲接區 中係供接置被動元件31G。於本#_巾,該基板3 可例如為印刷電路板(Printed Cireuit如邮咖)或供 接置半導體晶片之封裝基板,而該被動元件係可為電阻 器、電容器或電感器等元件。 該銲接區30係設於該基板3上,且具有二相 ^録墊_、3〇2,以供對應接置該被動元件31()。於本實 •J中D亥1〒墊300、302係設於該基板3之未影塑半導 體晶片設置之位置,且依該基板3所需接置之被動曰元件 19494 9 1291315 一數里而定,並可例如為矩形結構。於該銲接區30 =鮮墊_、302直線接連之基準線側邊設有垂直該基 性連接端4〇’且該電性連接端⑽電性連接該鲜 心 另一電性連接墊302電性連接一導線340,以 電性連接於電性連接墊3〇〇、3〇2之被動元件 性連接端4Q而電性連接至該基板3之線路 ^執本貫施例中’該電性連接端4〇係垂直設於該 ·=:二3〇2所成之基準線的側邊,並經由-粗導電 連接至該辉墊_,而另一銲墊_透 =、-,田Κ線路340電性連接於其他線路層或電子元件 利Γν .彳'圖丁),其中忒電性連接端40可例如為導電通 傅輸層,但亚不以此為限。 被動元件310以迴銲(Reflow-Soldering) f程 墊300之粗導雷蜱玖老 t U畫 亥在干 Γ 黏劑受熱時產生之拉應力 示之箭頭^ 〇、302直線連接之基準線,如圖所 則、向,使該銲墊300、302之受力方向呈垂直 向,相較於習知技術中拉應力係平行共 可免除受力不均以避免產生墓碑現象。相對之 第二實施 佈局4圖’係顯示本發明之被動元件之電性連接 例相同或近圖式。其中,與第-實施 兀件係以相同或近似之元件符號表示,並 19494 10 1291315 省略洋細=敍述’以使本案之說明更清楚易懂。 於本’:化例中’言亥被動元件係為電容器,且該銲墊 ‘ 別具有對應用以電性連接至電源層及接地 •層(未予以圖示)之電性連接端42、44,其中,該電性連 •接端42、44係垂亩执於外 生連 準線的同側邊,且:二;7:旱墊300、302直線連接之基 ‘ /、ίτ、各別透過導電線路332、334而雷 性連接至該銲墊300、302。 動7^牛31G銲接於該銲接區3G之對應銲塾 、3 2日守’因該料3〇〇、3〇2所受之拉應力係垂直於 ;二::二3〇2所成之基準線,故有效防止產生墓碑 〜―電性連接端42、44係同側設於基準線側邊, J技術,得以降低$广 的間距,相較於習 高該被動亓杜 避免影想電容效應,而可提 ^ 件之電性連接於基板之品質。 篇三實施ϋ 、 •佈局示本發明之被動元件之電性連接 處在於該銲塾=0例所緣製之圖式。與前述實施例不同 -準線兩端設有二,300、302直線連接所成之基 _美 有不止打貫穿孔之標示區50,俾可避免於該 土-义兩端形成電性連接端,導致前述之墓碑效應。 電性件,電性侧局結構,主要係將該 、真 ^、干接區之二銲墊直線連接的基準線側 二接端垂直該基準線,使該被動元件於鲜接 二以防止產生墓碑現象;且相較於習知技 19494 11 1291315 p山以係'如為電容器之被動元件’相對於該銲墊之電性連 =同側設於基準線側邊,而可縮短二電性連接端之間 之電tri低電感以提高電容效應,進而提升該被動元件 切實施例僅例示性說明本發明之原理及其功效,而 ==限制本發明:任±何熟習此項技藝之人士均可 二及㈣下’對上述實施例進行修飾與改 ^圍=’。本發明之權利保護範圍,應如後述之中請專利 【圖式簡單說明】 第1圖係顯示習知應詩基板之被動元件之 接佈局結構; 運 第2圖係顯示采用習知被動元件之電 構且當該被動元件係為電容器之應用例;以及 σ、、、口 第3圖係顯示本發明之被動元件 構之第-實施例之結構示意圖; 电性連接佈局結 第4圖係顯示本發明之被動元件 + 構之第二實施例之結構示意圖;以及%性連接佈局結 第5圖係顯示本發明之被動元件泰 構之第三實施例之結構示意圖。之包性連接佈局結 【主要元件符號說明】 1 ' 3 基板 1Q ' 30 銲接區 iOO、102、300、302 銲墊 19494 12 1291315 110 、 310 • 120 、 320 130、132、134、330、332、334 -140 、 340 ,20 、 22 、 24 、 40 、 42 、 44 50 mPaSte) is fixed to the pad (Solder Pad) of the preset soldering position of the substrate to be electrically connected to the circuit board. Moreover, the passive component can be electrically connected to the 19494 5 1291315 through the conductive via (Via) disposed on the side of the pad, for example, the traceback is electrically traced. Please refer to FIG. 1 : The layer of the layer or other line. The electrical connection layout community. The passive component-10 used in the substrate is provided with two opposite arrangements and the right soldering zone of the right panel 4 is electrically connected to the substrate 1, for example, the passive component 110, the layer 120, The source layer, the grounding or other line of wires 、', or, its electronic components, in the welding zone 10: ϋ中—, dry pad 100 and corresponding to the reference line of the two piles ❸m n 1G2 The straight-line connection of the pull-up mountain ridge "and the 〇 has another electrical connection such as a conductive via (Via), the sub-transmission-wide conductive line 13 〇 (10)' and the (4) pad _ to - fine conductive line 14q electricity = connected to other signal lines. The above-mentioned electrical connection layout structure, such as the conductive connection end of the conductive via (Via) 20, the two pads 1〇〇, 1〇2 and the thin conductive line ι4〇 The same as a reference line, when reflowing (Refl〇[s〇ldaind process to solder the _passive component 110 to the corresponding pads 1 (10), 1 〇 2 of the preset lands 1), the electrical connection The wide conductive line 13 of the pad 1 may have a tint effect due to its large line width, and the solder paste self-weld 1〇〇 is attracted to the wide conductive line 130, and the soldering agent on both sides is inconsistent due to the dose and the molten state, so that the two ends of the passive component 11 are inconsistent with the tensile force of the soldering agent, as shown by the arrow A1. The direction of the A2, wherein the thick wire 130 has a larger tensile stress than the thin wire 14〇, so that a tombstone effect is easily generated, causing the passive element no to be lifted, and even severely One of the passive components 丨丨〇 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 1949 , ^ 接 - at the other end of the fine conductive line 140 divergence, wide, compared to the J speed is not -, it is easy to produce tombstone ^ '. Causes two fresh 塾 cold electricity: Figure 2, which shows the passive component 11 For example, '', TM, and pen-connected to the power supply terminal and the ground terminal in the pad 100, 102 parallel to the w use case; 99 9/1, Ji Zhuo, and springs are individually provided with electrical connections :]): For its individual electrical connection to the power supply terminal and ground terminal (not shown No. However, the connecting ends 22, 24 are arranged in the Xuexun 10 to be parallel to the reference line, so that the connecting ends 22, 24 are both 2; the library causes the inductance effect to be too large' thus reducing the capacitance effect of the capacitor> ;c 'In turn affects the quality of the product. Therefore, 'how to propose a kind of missing in the electrical Z-free technology of passive components, so that the (6) piece can prevent the occurrence of tombstoning phenomenon and improve the welding effect of passive components: The electrical quality of a certain type of passive component, and thus the product of the product. The present invention is a technical problem that is currently being solved. [Invention] In view of the disadvantages of the above-mentioned prior art, the main object of the present invention is f Providing an electrical connection layout structure of passive components, such that the passive: parts avoid the tombstoning effect during welding. Another object of the present invention is to provide an electrical connection layout structure for a passive component that improves the electrical connection quality of the passive component. 19494 7 1291315 _ The re-invention of the present invention is to provide a *connection layout structure, the electrical connection of the ancient & parts, and the flexibility of the layout design. : 4 up to the above and other related purposes, the electrical connection of the invention is carried out in the form of a passive 70" system including: - welding zone, 俜, ... earth respect " layout structure of the glow pad for the corresponding connection Set-passively oppositely set to a straight end, electrically connected by a conductive line ν. One of the welding leads to the circuit layer of the board and the soldering area. The line perpendicular to the two solder pads is connected. Wrong for the passive component to form the basis of the uneven force, the brother to avoid the two fresh 塾 in the direction of the baseline M month, to prevent the tombston effect. In the eighth place, the pad is placed on the substrate, and in a preferred cocoon, such as the 曰亍 曰亍 曰亍 曰亍 曰亍 , , , , + + + + + + + + + + + + + + + + + + + + . The soldering technique is soldered to the substrate. The passive component can be, for example, a resistor or an electric device. In the embodiment of the vehicle, when the passive component is a capacitor and the circuit is a straight line The connection of the electrical connection end is on the same side of the distance, and the effect of the low inductance effect on the capacitance effect. The electrical connection end is connected to the substrate, for example, an electrical and a shoulder hole (Vla) for electrically connecting. The line of the source layer, the ground layer or the signal transmission layer is electrically connected to the passive component of the present invention, and the electrical connection end is arranged in the soldering zone t_D, and the structure is passed through the soldering pad. The connected reference line side is located on the side of the 19494 8 1291315 and corresponds to the perpendicular to the reference line 'to avoid the uneven force of the passive component when the passive component is welded. At the same time, through the connection structure of the passive component of the present invention, In the prior art, especially for a passive component such as a capacitor, since the electrical connection end is vertically disposed on the side of the reference line to shorten the distance between the two electrical connection ends, the inductance effect can be reduced and the capacitance effect is enhanced. The electrical quality of the passive component and the quality of the product can be improved. [Embodiment] The following is a description of the embodiments of the present invention by way of specific specific examples. Those skilled in the art can readily appreciate other advantages and advantages of the present invention from the disclosure herein. For the poor embodiment, please refer to FIG. 3, which is a schematic view showing the first embodiment of the electrical connection layout structure of the passive component of the present invention; as shown in the figure, the electrical connection layout structure of the passive component of the present invention is In the substrate 3, the package t. is connected by a fresh connection 5 and 3 and at least one electrical connection 40, and the passive element 31G is connected to the soldering area. In the present invention, the substrate 3 can be, for example, a printed circuit board (Printed Cireuit) or a package substrate for receiving a semiconductor wafer, and the passive component can be a resistor, a capacitor or an inductor. The soldering area 30 is disposed on the substrate 3 and has a two-phase recording pad _, 3 〇 2 for correspondingly accommodating the passive component 31 (). In this embodiment, the D-Hing 1 and 300 pads 302 are disposed at the position of the unshaded semiconductor wafer of the substrate 3, and the passive germanium elements required to be connected to the substrate 3 are 19494 9 1291315. It can be, for example, a rectangular structure. The base of the reference line of the soldering zone 30 = fresh pad _, 302 is vertically connected to the base connecting end 4 〇 ' and the electrical connecting end (10) is electrically connected to the fresh heart and the other electrical connecting pad 302 Connecting a wire 340 electrically connected to the passive component terminal 4Q of the electrical connection pads 3〇〇, 3〇2 and electrically connected to the circuit of the substrate 3 in the present embodiment The connecting end 4 is vertically disposed on the side of the reference line formed by the ?=:3〇2, and is connected to the glow pad_ via a thick conductive connection, and the other soldering pad_透=,-,田Κ The line 340 is electrically connected to other circuit layers or electronic components. The electrical connection terminal 40 can be, for example, a conductive pass layer, but is not limited thereto. The passive element 310 is reflow-soldering (reflow-Soldering), the rough guide of the f-running pad 300, the old-fashioned t-shaped, the dry-drawn viscous agent, and the tensile stress generated by the arrow ^ 〇, 302 linearly connected reference line, As shown in the figure, the direction of the force of the pads 300, 302 is perpendicular, which is equivalent to the parallel stress in the prior art, so that the unevenness of the force can be avoided to avoid the occurrence of tombstoning. In contrast to the second embodiment, the layout 4 is a view showing the same or near-pattern of the electrical connection of the passive component of the present invention. Wherein, the first embodiment is denoted by the same or similar component symbol, and 19494 10 1291315 is omitted; the description is clearer and easier to understand. In this example, the 'Yihai passive component is a capacitor, and the pad' has an electrical connection end 42, 44 corresponding to the power supply layer and the grounding layer (not shown). , wherein the electrical connection ends 42 and 44 are on the same side of the exogenous alignment line, and: 2; 7: the base of the dry pad 300, 302 is connected to the base ' /, ίτ, each The pads 300, 302 are connected by lightning through the conductive lines 332, 334. The moving 7^牛 31G is welded to the corresponding welding bead of the welding zone 3G, and the 3rd day of the Guardian's tensile stress is perpendicular to the 3〇〇 and 3〇2 of the material; 2::2:3 The reference line, so effectively prevent the generation of tombstones ~ - the electrical connection ends 42, 44 are on the same side of the reference line side, J technology, can reduce the distance of $ wide, compared to the high height of the passive 亓 Du avoid the shadow capacitor Effect, and the quality of the electrical connection to the substrate can be improved. The third embodiment • , • The layout shows that the electrical connection of the passive component of the present invention lies in the pattern of the solder 塾 =0 case. Different from the foregoing embodiment - the two ends of the alignment line are provided with two, 300, 302 linear connection bases - the United States has more than the marking area 50 of the through hole, which can avoid the formation of electrical connection ends at the soil - meaning ends , leading to the aforementioned tombstone effect. The electrical component and the electrical side structure are mainly perpendicular to the reference line on the reference line side two ends of the two solder pads of the dry contact zone and the dry contact zone, so that the passive component is connected to the fresh wire to prevent generation. Tombstone phenomenon; and compared with the conventional technology 19494 11 1291315 p mountain to the 'passive component of the capacitor' relative to the electrical connection of the pad = the same side is set on the side of the reference line, and can shorten the two-electricity The electric tri low inductance between the terminals to improve the capacitance effect, thereby improving the passive element cutting embodiment only exemplifies the principle and function of the present invention, and == limit the present invention: any person who is familiar with the skill Both can be modified and changed to the above embodiment. The scope of protection of the present invention should be as described later in the patent [simplified description of the drawings]. Figure 1 shows the connection structure of the passive components of the conventional syllabus substrate; Figure 2 shows the use of the conventional passive components. Electrical structure and when the passive component is a capacitor application example; and σ, , and port 3 are a schematic structural view showing the first embodiment of the passive component structure of the present invention; A schematic diagram of the structure of the second embodiment of the passive component + structure of the present invention; and a schematic diagram of the % connection layout. FIG. 5 is a schematic structural view showing a third embodiment of the passive component of the present invention. Package connection layout [Main component symbol description] 1 ' 3 substrate 1Q ' 30 solder pads iOO, 102, 300, 302 pads 19494 12 1291315 110 , 310 • 120 , 320 130 , 132 , 134 , 330 , 332 , 334 -140 , 340 , 20 , 22 , 24 , 40 , 42 , 44 50 m

A1 、 A2 、 B 被動元件 線路層 粗導電線路 細導電線路 電性連接端 標示區 箭頭A1, A2, B Passive components Line layer Thick conductive line Fine conductive line Electrical connection End Marking area Arrow

13 1949413 19494

Claims (1)

1291315 十、申請專利範圍: •種被動元件之電性連接佈局結構,係應用於一基板 中,該佈局結構係包括·· 基板,具有線路層; 鈈接區,係設於該基板上,且具有二相對設置之 1干墊,以供對應接置一被動元件;以及 至v —電性連接端,係以導電線路電性連接該基 板之線路層與該銲接區之其中-銲墊,且垂直於該二 銲墊直線連接所成之基準線。 / 2.如申請專利 構,其中, 設置之位置 結 片 範圍苐1項之被動元件之電性連接佈局 该銲墊係設於該基板上未影響半導體晶 〇 &amp; =中請專利範圍第μ之被動元件之半導體封裳結 菁’其中’該銲墊係為矩形結構。 之電性連接佈局結 接置於該基板之銲 4·如申請專利範圍第丨項之被動元件 構,其中,該被動元件係以銲黏劑 墊上。 5. :申=利範圍第4項之被動元件之電性連接佈局結 ^^’該被動元件係以稍⑽丨瞥心 衣私銲接於該基板之銲墊上。 ^ ::申Π利之被動元件之電性連接佈局結 之其;:者為電阻器、電容器及電感器 如申請專利範圍第丨或6項之被動^件之電性連接佈 19494 14 6· 1291315 二:構’其中’當该被動元件係為電容 係各別具有對應之電性連接端時 :-=墊 8. „之間:,並可透過耦合以增強電容效應。 Μ甘士 肖㈣%件之電性連接佈局結 9. 冓,”中,該電性連接端係為導電通孔(Via)。 =申Ϊ:利範圍第1項之被動元件之電性連接佈局結 /、,该基板係為印刷電路板及半導體晶片之封 衣基板之其中一者。 10·如申請專利範圍第丨項之被動元件之電性連接佈局結 構,其中,該線路層係為電源層、接地層及訊號傳輸 層之其中一者。 •戈申明專利範圍第1項之被動元件之電性連接佈局結 構’復包括:於該銲墊區之二銲墊直線連接所成之基 準線兩端設有禁止打貫穿孔之標示區。1291315 X. Patent application scope: • The electrical connection layout structure of a passive component is applied to a substrate, the layout structure includes a substrate having a circuit layer; a splicing region is disposed on the substrate, and a dry pad having two opposite surfaces for correspondingly connecting a passive component; and to a v-electrical connection end, electrically connecting the circuit layer of the substrate and the solder pad of the soldering region with a conductive line, and The reference line formed by straight lines is connected perpendicular to the two pads. / 2. For example, the patented structure, wherein the position of the film is set to a range of 被动1 of the passive component of the electrical connection layout, the pad is disposed on the substrate without affecting the semiconductor wafer &amp; The semiconductor device of the passive component is in which the solder pad is a rectangular structure. The electrical connection layout is connected to the soldering of the substrate. 4. The passive component of the scope of the patent application, wherein the passive component is padded with a solder paste. 5. The electrical connection layout of the passive component of the fourth item of the claim = ^^' The passive component is soldered to the pad of the substrate with a slight (10) core. ^ :: The electrical connection layout of the passive components of Shenlili is the same; the resistors, capacitors and inductors are electrically connected to the passive components such as the scope of patent application No. 6 or 1949 14 14 14 1291315 Two: construct 'When' the passive components are capacitors with corresponding electrical connections: -= pads 8. Between: and can be coupled to enhance the capacitance effect. Μ甘士肖 (4)% The electrical connection layout is 9. 冓,", the electrical connection is a conductive via (Via). = 申Ϊ: The electrical connection layout of the passive component of the first item is the one of the printed circuit board and the sealing substrate of the semiconductor wafer. 10. The electrical connection layout structure of the passive component of claim </ RTI> wherein the circuit layer is one of a power layer, a ground layer, and a signal transmission layer. • The electrical connection layout structure of the passive component of the first item of the patent scope of the invention is as follows: a mark area for prohibiting the penetration of the through hole is provided at both ends of the reference line formed by the straight connection of the two pads of the pad region. 15 1949415 19494
TW95118402A 2006-05-24 2006-05-24 Electrical connection layout structure of passive component TWI291315B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI475939B (en) * 2013-10-15 2015-03-01 緯創資通股份有限公司 Method for forming heat-dissipating hollow and forming heat-dissipating hollow structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI475939B (en) * 2013-10-15 2015-03-01 緯創資通股份有限公司 Method for forming heat-dissipating hollow and forming heat-dissipating hollow structure

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