TWI290769B - Thin film transistor and method of forming the same - Google Patents

Abstract

A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least one layer of molybdenum-niobium alloy nitride. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.

Description

I29〇 mt. doc/006 IX. Description of the Invention: [Technical Field] The present invention relates to a semiconductor device and a cost thereof, and the invention relates to a thin film transistor and a method for fabricating the same, [Prior Art] Thin film transistors (TFTs) generally include a pole, a closed gate, and a source/drain, which are usually used in displays, and upper j (LCD), which is used as a shut-off element. Usually, ^疋 LCD display = pole. The gate is composed of Ming, Chromium, and Heart, or is composed of a plurality of metal layers. As early as the grace, the two belong to the second genus: when the opening is open, _ can not be effectively entered in the follow-up Jing Cheng; η lead (4) 嶋 super " _ source of the room. In addition, the above problem will also occur in Forming [Summary of the Invention] H ^明提Α - a transfer film transistor with a low-order W or line resistance between the interpole and the source/drain. Sister fir, the method of forming a film-forming transistor, the system The use of a oxy-peroxide-resistant material to form a gate and/or source/drain. 1290769 15380 twf.doc/006 The present invention provides a fine crystal, which includes a gate and a gate insulating layer. The semiconductor layer and the source/depolarization are disposed on the substrate, wherein the gate electrode comprises at least one layer of a molybdenum nitride alloy. The interlayer insulating layer is formed on the substrate to cover the gate. The semiconductor layer is disposed on the substrate. On the insulating layer of the earth gate, the source/drain is disposed on the semiconductor layer. The present invention further provides a thin film transistor including a gate electrode, a gate insulating layer, a semiconductor layer, and a source/drain The gate is disposed on the base φ. The gate insulating layer is formed on the substrate to cover The semiconductor layer is disposed on the gate insulating layer on the substrate. The source/drain is disposed on the semiconductor layer, wherein the source/drain includes at least one layer of molybdenum nitride. In one embodiment, the interlayer is composed of a pinch alloy layer and a tantalum nitride alloy layer. In an embodiment of the invention, the gate is made of a first nitrided yttrium alloy layer and a molybdenum-niobium alloy layer. The composition of the second molybdenum nitride alloy layer is composed of a molybdenum-niobium alloy layer and a molybdenum nitride-ruthenium alloy layer. In one embodiment of the present invention, The source/drainage layer is composed of a first nitrided, molybdenum-niobium alloy layer, a molybdenum-niobium alloy layer and a second molybdenum-rhenium-ruthenium alloy layer. The present invention further provides a method for forming a thin film transistor. The method first forms a gate on the substrate, wherein the gate includes at least one layer of nitriding alloy. Then, a gate insulating layer is formed on the substrate to cover the gate. Thereafter, a semiconductor layer is disposed on the gate insulating layer on the substrate. Next, configure the source/drain on the semiconductor layer. θ The present invention further proposes a method for forming a thin film transistor which is formed on a substrate by 1290769 15380 twf.doc/006. Then, after the gate insulating layer is overlaid on the substrate, the gate is applied to the substrate. A semiconductor layer is formed on the insulating layer. Next, a source/drain is formed on the semiconductor layer, wherein the source level electrode includes at least one layer of nitrided sharp alloy. In an embodiment of the invention, the gate is Or) source / bungee system • machi-like step lion into the money. Money on the silk shaft Axia money. Then • f “mesh, the money is nitrided, (10) into the lUb ship alloy layer. The Zn-impregnated sharp alloy layer is patterned to form a gate and/or source/; and a pole. In one embodiment of the invention, the gate and/or source/drain electrodes described above are formed in the following steps. First, a first molybdenum-resistant alloy layer 2 is formed on the substrate, and then a second molybdenum-rhenium alloy layer is formed on the first indium-bismuth alloy layer. Next, the first alloy layer is subjected to a nitridation step to form a molybdenum nitride-based alloy layer on the m-fiber alloy layer. The molybdenum nitride-ruthenium alloy layer is then patterned with the first indium-bismuth alloy layer to form a gate and/or source/drain. In one embodiment of the invention, the gate and/or source/drain electrodes described above are formed in the following steps. First, a first sharp alloy is formed on the substrate, ^ °, and a second nitriding step is performed on the first sharp alloy layer to form a first molybdenum nitride alloy layer. Next, an alloy layer is formed on the first molybdenum nitride layer. Thereafter, a third turn-over alloy layer is formed on the second nitrided gambling alloy layer. And performing a second nitridation step on the third domain alloy layer to form a second nitriding ytterbium alloy layer on the second molybdenum-niobium alloy layer. Next, the second tantalum nitride alloy layer, the second indium niobium alloy layer and the first indium niobium nitride alloy layer are smeared, (10) is gated and (5) Lai/dip. The electrode (gate and/or source/no-pole) of the thin film transistor of the present invention 1290769 15380 twf.doc/006 includes at least a layer of indium nitride, which has a layer of nitride on the surface of the reduced alloy Protected, so compared with the metal alloy of the ship in the prior art, it is relatively stable 'so that the electrode has better resistance to oxidation and erosion. The above and other objects, features and advantages of the present invention will become more apparent and understood. [Embodiment] Fig. 1 is a schematic cross-sectional view showing a thin film transistor in accordance with a preferred embodiment of the present invention. Please refer to the wafer transistor including a gate 102, an insulating layer 104, a semiconductor layer 105, and a source/drain 11 〇. The gate transfer system is disposed on the bottom 100, and the gate insulating layer 1〇4 is disposed above the substrate 1 to rewind the gate 102. The gate insulating layer 1〇4 is formed, for example, by a combination of a oxidized stone layer, a nitriding layer, or an oxygen-cut layer and a nitrogen-rich layer. The semiconductor layer 105 is disposed on the closed insulating layer 1〇4 above the gate 102. The source/hybrid 110 is disposed on the semiconductor layer 105. In the present embodiment, the germanium conductor_105 includes, for example, a channel layer 1?6 formed on the gate insulating layer 1?4 and an ohmic contact layer 1 formed between the channel layer 106 and the source/drain pole no. 8. In particular, in accordance with a preferred embodiment of the present invention, gate 1 〇 2 includes at least one layer of a molybdenum nitride alloy. In other words, the gate 1〇2 may be a single layer of a molybdenum nitride alloy or a composite layer comprising at least one layer of a molybdenum nitride alloy. If the gate 102 is a single layer, the gate 1〇2 is composed of a layer of a molybdenum nitride alloy. In the present embodiment, the method of forming the gate 1 2 of a single layer is as follows. First, a layer of molybdenum-niobium alloy is formed on the substrate 100 in a sputtering process chamber, an evaporation process chamber, or other conventional depositions 1290769 I5380twf.doc/006 to 2 . A nitriding step is performed on the tantalum alloy layer to form a nitrided turned-over alloy layer. For example, the step of reducing may be to introduce nitrogen into the deposition chamber after forming the molybdenum-niobium alloy layer, or to introduce nitrogen into the deposition chamber while depositing the molybdenum-niobium alloy layer. Thereafter, the nitride layer is patterned in a full layer by a lithography process and an etching process to form the gate 102. • If the gate 102 has a two-layer structure, the gate 1〇2 is composed of an indium saw alloy layer φ 1〇2a and a molybdenum nitride alloy layer 10沘. Referring to Fig. 2A, the method of forming the double-layer gate 102 in this example is as follows. First, a first molybdenum-rhenium alloy layer 102a is formed on the substrate 100. Then, a second molybdenum alloy layer (not shown) is formed on the first alloy layer 102a. The second molybdenum sharp gold layer is subjected to a nitridation reaction step to form a molybdenum nitride fine alloy layer 1〇2b. Thereafter, the indium-niobium-niobium alloy layer 10b is patterned with the first molybdenum-rhodium alloy layer 102a to form the gate 102. The first molybdenum-niobium alloy layer 1〇2a and the second antimony alloy layer were formed in the manner previously described, and the nitridation reaction step was also carried out in the same manner as previously described. The gate electrode 102 is composed of a first nitrided turned-rhodium alloy layer 102c, a molybdenum-niobium alloy layer 102a, and a second molybdenum-niobium alloy layer 102e. Please refer to FIG. 3A. In the present embodiment, the method of forming the gate 102 of the three layers is as follows. First, a first molybdenum alloy layer (not shown) is formed on the substrate 1 . Next, the first molybdenite alloy layer is subjected to a gasification step as described above to form a first indium nitride sharp alloy layer 102c. Then, a second indium antimony alloy layer 102d is formed on the first indium nitride sharp alloy layer i2c. Next, a third I29〇769fd_ key alloy layer (not shown) is formed on the second molybdenum-rhenium alloy layer i〇2d. Thereafter, the third indium-bismuth alloy layer is subjected to a nitridation step as described above to form a second molybdenum nitride-ruthenium alloy layer 1〇2e. Then, the second nitriding alloy layer l〇2e, the second molybdenum sharp alloy layer i〇2d, and the first molybdenum-rhenium alloy layer l〇2c are patterned to form the interpole 1〇2. In another embodiment, the source/drain 110 includes at least one layer of molybdenum nitride sharp alloy, please refer to FIG. In other words, the source/drain may be a single layer of molybdenum nitride or a composite layer comprising at least one layer of tantalum nitride. If the source/dump 110 is a single layer, the source/drain 11 is composed of a layer of a molybdenum nitride alloy. Similarly, the method of forming a single-layer source/drain is as follows. First, a bismuth alloy layer is formed on the gate insulating layer 104 to cover the semiconductor layer 105 in a sputtering process chamber, an evaporation process chamber, or other well-known deposition chamber. The molybdenum-niobium alloy layer is subjected to a nitriding step to form a molybdenum nitride-ruthenium alloy layer For example, the nitriding step may be to introduce nitrogen into the deposition chamber after forming the molybdenum-niobium alloy layer, or to introduce nitrogen into the deposition chamber while depositing the molybdenum-ruthenium alloy layer. Thereafter, the molybdenum nitride-rhodium alloy layer is patterned to form the source/drain 110. If the source/drain 110 is of a two-layer structure, the source/drain 11 is composed of a molybdenum-niobium alloy layer 11a and a molybdenum-niobium alloy layer 11b, see Fig. 2B. Similarly, the method of forming the double-layered source/drain 110 is as follows. First, a first molybdenum-rhenium alloy layer 11 〇 & is formed on the gate insulating layer 104 to cover the semiconductor layer 105. Then, a second molybdenum sharp alloy layer (not shown) is formed on the first molybdenum-rhenium alloy layer 11A. The second molybdenum-rhenium alloy layer is subjected to a nitridation step to form a molybdenum nitride-ruthenium alloy layer 11b. Thereafter, the molybdenum hydride alloy layer 110b is patterned with the first molybdenum-rhenium alloy layer 110a to form a source/drain Ι29〇769_/〇〇6 110. The first-deficient alloy layer 110a and the second turn-over alloy layer are formed by the previously described method, and the nitriding step is also carried out in the same manner as previously described. When the source/drain 110 is a three-layer structure, the source-level electrode 11 is composed of a first-nitrided pure alloy layer llGe, an alloy layer, and a second molybdenum-alkaline alloy layer llGe, please refer to 3B. . The method of forming the source/drain 110 of the second layer is as follows. First, the insulating layer is formed to form a first-lin alloy layer (not shown) to cover the semiconductor layer 10: the f-yttrium alloy layer is subjected to a nitridation step as described above to form the first a molybdenum nitride-ruthenium alloy layer 11〇c. Then, a second molybdenum-rhenium alloy layer 11〇d is formed on the first molybdenum-niobium alloy layer 110c. Next, a second crucible is formed on the second alloy layer 110d. An alloy layer (not shown). The third molybdenum sharp alloy layer is subjected to a nitriding step as described above to form a second molybdenum nitride alloy layer 110e. Then, the second tantalum nitride alloy layer 11 is 〇 e, the second molybdenum-rhenium alloy layer 110d and the first molybdenum-niobium alloy layer 11〇c are patterned to form the source/drain 110. In another embodiment, the gate 102 and the source/drain 110 All include at least one layer of a ruthenium nitride alloy layer. In other words, the closed pole 102 and the source pole 110 may be a single layer of a tantalum nitride or a composite layer comprising at least one layer of a gasified indium bismuth alloy. The composite layer of at least one layer of molybdenum nitride alloy layer may be a two-layer structure or a three-layer structure, please refer to FIG. 2A, FIG. 2B and FIG. 3A and Fig. 2B. It is worth noting that the molybdenum nitride alloy layer and the metal in the prior art are π 8 1290769 15380 twf. The comparison domain is more 峨 躺 躺 钱 钱 对于 对于 对于 对于 对于 对于 对于 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 If the temple is formed, the formation process of the three layers of the gate or the three layers of the source/dipole two Xianrui alloy layer in the middle of the 'nenbu 锢铌i layer and the amination reaction step can be used in the reaction chamber (in situ). If the formation of a two-layer structure or three layers can be carried out in the same reaction chamber (in situ), therefore, the process of the or the source / drain is not complicated ^ In addition, 'increasing her content, cutting money Oxidation resistance, but with increased niobium content _ sharp wire is quite expensive. In this fortune, the amount of the alloy in the alloy is increased by the step of the alloy, so there is a blemish, if the invention is a switch when the liquid crystal is used, and when using double The etching process of the layer or the three layers can also be used as an etch stop layer in the etching process of the contact window opening of the subsequent pixel structures. ^^ Limitation to the present invention, anyone who is familiar with this skill, can not make a little change from the chrome, and within the circumference, when it can make some changes and run the dance, so this February's "Fan Yuan Dangjia gazhi application view m The defined person turns. V's dull 8 12 1290769 [Simple diagram]

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a cross-sectional view showing a portion of the present invention. 2A is a cross-sectional view of a double layer gate in accordance with another aspect of the present invention. Figure 2B is a cross-sectional view showing the double-layer source/drain of a thin film battery in accordance with a further preferred embodiment of the present invention. Βθ FIG. 3A is a cross-sectional view showing a three-layer gate of a thin film transistor according to still another preferred embodiment of the present invention. 3 to 4 are schematic cross-sectional views showing a three-layer source/drain of a thin film transistor according to still another preferred embodiment of the present invention. [Main component symbol description] 100 Base plate 102: Gates 102a, 102d, 11A, 110d: Molybdenum-niobium alloy layers 102b, 102c, 102e, 110b, 110c, 110e: Molybdenum nitride-based alloy layer 104: Gate insulating layer 1〇5: semiconductor layer 106: channel layer 108: ohmic contact layer 110: source/drain

(D 13

Claims (1)

I290769 twf.doc/006 X. Patent Application Range: L A thin film transistor comprising: a gate disposed on a substrate, wherein the gate comprises at least a sharp-edged (Mo-Nb) alloy; a gate insulating layer Formed on the substrate to cover the gate; a semiconductor layer 'disposed on the gate insulating layer on the gate; and a source/drainage disposed on the semiconductor layer. 2. The thin film transistor according to claim 1, wherein the gate comprises: a molybdenum-niobium alloy layer; and a murine molybdenum alloy layer disposed on the parenchyloy layer. 3. The thin film transistor according to claim 1, wherein the gate comprises: a first molybdenum nitride alloy layer; an indium sharp alloy layer disposed on the first molybdenum nitride alloy layer ; A layer of nitrogen, an indium nitride alloy layer, is disposed on the indium-bismuth alloy layer. 4. The thin film transistor of claim 1, wherein the source/drain includes at least one layer of molybdenum nitride. 5. The thin film transistor of claim 4, wherein the source/drain includes: an indium sharp alloy layer; and a molybdenum nitride alloy layer disposed on the molybdenum alloy layer. 6. The thin film transistor according to claim 4, wherein the 丨twf.doc/006 1290769 15380t\ source/drain includes: a first molybdenum sharp alloy layer; And disposed on the first molybdenum nitride alloy layer; and a second molybdenum nitride alloy layer disposed on the molybdenum-ruthenium alloy layer. a thin film transistor comprising: a gate; a gate insulating layer disposed on the substrate to cover the gate; a semiconductor layer disposed on the gate insulating layer on the gate; and a source And a drain is disposed on the semiconductor layer, wherein the source/drain includes at least one layer of copper nitride sharp alloy. 8. The thin film transistor of claim 7, wherein the source/drain includes: a sharp alloy layer; and an indium nitride alloy layer disposed on the key alloy layer. 9. The thin film transistor of claim 7, wherein the source/3⁄4 pole comprises: a first molybdenum nitride alloy layer; an indium sharp alloy layer disposed on the first tantalum crucible And an indium dinitride fine alloy layer disposed on the molybdenum plump full layer Ji. 10. A method of forming a thin film transistor, comprising: forming a gate on a substrate, wherein the gate comprises at least one layer of nitrided sharp alloy; 5 15 1290769 15380 twf.doc/006 forming a gate insulating on the substrate a layer to cover the interpole; a source/nopole is formed on the semiconductor layer. The method of forming the gate according to the method of claim 10, wherein the step of forming the gate comprises: forming a tantalum alloy layer on the substrate; performing a nitriding step on the molybdenum sharp alloy layer To form a vaporized money two gold layer 'the towel after the nitriding step surface is formed into the reduced ore; and patterning (10) the nitride brittle alloy layer into the _. The method of forming a thin film transistor according to claim 10, wherein the step of forming the gate comprises: forming an indium sharp alloy layer on the substrate; alloy ί: ίί 二 二: nitriding The step of forming a molybdenum nitride sharp line; and depositing the indium-niobium alloy layer to pattern the nitriding alloy layer to form the layer. 13. The method according to claim 1, wherein the step of forming the first surface comprises: forming a first sharpening alloy sound on the substrate; forming a second on the first indium-bismuth alloy layer.合合合展. 锐合行—Stealing coffee g—indium to form the i22:=== layer to Γ The nitriding step is at 8 16 1290769 a 15380 twf.doc/006 Patterning with the first molybdenum-rhenium alloy layer to form the gate. 14. The method according to claim 1, wherein the step of forming the gate comprises: forming a first tantalum alloy layer on the substrate; and forming the first molybdenum alloy layer Forming a second molybdenum-rhenium alloy layer thereon; performing a nitriding step on the second molybdenum-rhenium alloy layer to form a-nitride alloy layer on the first molybdenum-niobium alloy layer, wherein the nitriding step is to deposit the The second molybdenum-niobium alloy layer is performed; and the molybdenum nitride-ruthenium alloy layer and the first molybdenum-niobium alloy layer are patterned to form the gate. The method of forming the gate in the method of the invention is as follows: forming a first sharp alloy layer on the substrate; a step of forming a layer of a ratified gorge alloy, wherein the first nitriding step may be to form a second pin sharp alloy layer on the layer forming the bismuth alloy; forming a third alloy layer on the alloy layer The second ringing alloy layer is formed by the second nitriding step (4) forming a second layer of molybdenum nitride bismuth alloy on the first slab, and the second ν step of a coughing may be forming the third layer of the lanthanum lanthanum alloy After that, the second nitriding pin sharp alloy layer and the (4) 17 1290769 15380 twf.doc/006 - nitriding alloy layer pattern are finely formed to form the _. 16. The method of forming a thin film transistor according to claim 1, wherein the step of forming the gate comprises: forming a first sharp alloy layer on the θ-base; ^ ^ it $ ^ iLib ^ After the bismuth alloy layer is performed, or when the __molybdenum-gold layer is formed; a second bismuth alloy layer is formed on the 一-molybdenum nitride bismuth alloy layer; a first layer is formed on the bismuth alloy layer a third molybdenum alloy layer; a second nitriding step is performed on the third domain alloy layer to form a second tantalum nitride alloy layer on the first alloy layer, wherein the second and V steps can be deposited The third indium-bismuth alloy layer is performed; the first layer of the molybdenum nitride alloy layer, the second layer of the molybdenum-niobium alloy and the layer of the first layer of the niobium alloy are patterned to form the gate. ^, the step of forming the source/drain in the thin film transistor forming method described in claim 10, comprising: forming a layer; forming an indium-bismuth alloy layer on the layer to cover the semiconductor person Into the indium sharp alloy layer - gasification step to form - molybdenum nitride 锟 = 'the towel, the nitriding step may be after the formation of the sensitive alloy layer %, and the nitriding alloy layer The shape of the source is extremely extreme. The method for forming a thin film transistor according to the above, wherein the step of forming the source/drain includes: forming a layer of a sharp alloy on the gate insulating layer to cover the half The nitriding layer is subjected to a nitriding step to form a nitriding alloy layer, wherein the nitriding step may be performed while depositing the _ alloy layer; and ..... The molybdenum-rhenium alloy layer is patterned to form the source/drain. And 10, wherein the step of forming the source/drain includes: forming a first-thick alloy layer on the insulating layer of the conductor to cover the half of the layer of the sharp alloy on the first plant to form a second turn a sharp alloy layer; 4 corps into the second layer of bismuth alloying - a nitriding step to form a nitriding alloy layer, wherein the nitriding step may be performed after forming the bismuth molybdenum alloy layer And the bismuth nitride alloy layer and the first-indium k-total axe 圄 化 化 成 成 该 into the source / bungee. The mouth layer is patterned to form a shape. 20, as claimed in claim 10, the 'method of forming the source/drainage step': the formation of the film-forming transistor forms a first layer on the gate insulating layer Molybdenum enters the conductor layer; 13 i layer covers the half of the first-domain alloy layer to form a second person and eight wastes. The second molybdenum-niobium alloy layer is subjected to a nitrogen half of 4, and a gasification step is used for the first a molybdenum 8 19 is patterned with a 'layer 1290769 15380twf.doc/006 A layer of molybdenum nitride is formed on the bismuth alloy layer, and the mountain is deposited in the second thief alloy layer during the deposition of the second thief alloy layer. A molybdenum-niobium alloy and the source/no-pole. The method of forming a thin film transistor according to the method of claim 10, wherein the step of forming the source/gt; and the pole comprises: forming a conductor-first insulating layer on the gate insulating layer to cover the half- The rfz alloy layer (4)-the first-n-methane is formed to form a t-woven alloy layer, and the first-nitriding is performed after the formation of the bismuth alloy layer, or the first-thickness reduction layer is deposited. And forming a second rectifying gold layer on the first layer of tantalum nitride alloy; forming a third tantalum alloy layer on the second molybdenum-niobium alloy layer; and the third molybdenum-niobium alloy layer Performing a second nitriding step to form a second nitrided sharp alloy layer on the first 锢锟5 gold layer, wherein the second nitriding step IX 疋 after forming the third I 铌 alloy layer And performing: patterning the second molybdenum-rhenium-ruthenium alloy layer, the second molybdenum-rhenium alloy layer and the first indium-fluoride alloy layer to form the source/drain. 22, as claimed in the patent application The thin film transistor forming method of claim 10, wherein the step of forming the source/drain includes: Forming a first molybdenum-niobium alloy layer on the edge layer to cover the semiconductor layer; performing a first nitridation step on the first molybdenum-rhenium alloy layer to form an 8 20 1290769 15380 twf.doc/0〇6 layer Forming a second alloy layer on the first tantalum nitride alloy layer; forming a third sharp alloy layer on the second molybdenum sharp alloy layer; performing a second nitriding step on the third pure alloy layer Forming a second nitride alloy layer on the first sharp alloy layer, wherein the second emulsification step may be performed while depositing the third squeaking alloy layer; and 'the second bismuth nitride layer The bismuth alloy layer, the second impurity alloy layer and the first molybdenum nitride ruthenium alloy layer are patterned to form the source/drain. 23 A method for forming a thin film transistor, comprising: forming a gate on a substrate Forming a gate insulating layer on the substrate to cover the gate insulating layer on the gate to form a semiconductor layer; and forming a source/drain on the 5-well semiconductor layer, wherein the source level The pole includes at least one layer of molybdenum nitride alloy. The method for forming a thin film transistor according to claim 23, wherein the step of forming the source/drain includes: forming a layer of molybdenum-niobium alloy on the gate insulating layer to cover the semiconductor The alloy layer is subjected to a nitridation step to form a gasification minus alloy layer 'where the nitridation step may be performed in forming the molybdenum sharp alloy layer; and 21 1290769 15380 twf.doc/006 The method for forming a thin film transistor according to claim 23, wherein the step of forming the source/gt; and the pole comprises: forming a gate on the gate insulating layer a molybdenum-niobium alloy layer covering the semiconductor layer; performing a nitriding step on the molybdenum-niobium alloy layer to form a molybdenum nitride-ruthenium alloy layer, wherein the nitriding step may be performed while depositing the molybdenum sharp alloy layer; The tantalum nitride alloy layer is patterned to form the source/no. The method of forming a thin film transistor according to claim 23, wherein the step of forming the source/drain includes: Γ 现 现 现 — — — * 合金 合金 合金 合金 合金 合金 合金 合金 合金 合金 合金 合金Forming a second indium-bonded full layer on the first indium sharp alloy layer; displacing into the f-alloy layer to perform a nitriding step, after the first yt is formed into the bis-molybdenum-bismuth alloy layer Carrying out and forming the (four) alloy layer shirt-shun alloy rhyme to form a thin object method as described in claim 23, wherein the step of forming the source/drainage is performed on the gate Forming a first input conductor layer on the insulating layer; a molybdenum-niobium alloy layer covering the half of the first indium alloy layer to form a second alloy layer; 22 I29〇769£d〇c/006 The second molybdenum-niobium alloy layer is subjected to a nitriding step to perform the first-molybdenum-nitriding gambling alloy layer, wherein the side step can be carried out when the eutectic alloy layer is formed The == 贱 alloy layer fresh gold layer map · by the shape method it Shen: monthly patent view circumference * 23 said thin film electric crystal stupid formation The step of forming the source/drain includes: forming a first-calling alloy layer to cover the semi-gold layer to perform a first-nitriding step to form a first ΐΓΠ, The first-nitriding step of the towel may be performed after forming the layer::; gold layer or forming a third molybdenum-kneaded full sound on the layer of the second-molybdenum alloy. The phase sharp alloy layer is carried out - the second nitriding step ^ 4 is formed on the Meng layer to form a second layer of molybdenum nitride alloy, and the second layer is formed into the third layer of the tantalum alloy. Her alloy layer, the second indium nitride bismuth alloy sound disk nitriding alloy layer _ cut off the pole pole. For example, in the 23rd magnetic method of the patent application, in which the source is formed, the step of forming the source is the formation of a square conductor layer, and a first indium alloy layer is formed on the surface layer to cover the half 23 1290769 15380 twf .doc/006 The first molybdenum-niobium alloy layer is subjected to a first molybdenum-niobium-niobium alloy layer, and the dragon is <a ratification step to form - the first bribe alloy layer after the formation step may be when the layer is formed疋 疋 沈 沈 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该 该The layer performs a second nitriding step to form a second molybdenum nitride alloy layer on the first molybdenum-rhenium alloy layer, wherein the reading the second nitriding step may be when depositing the third molybdenum-niobium alloy layer And performing: patterning the second molybdenum nitride layer, the second molybdenum nitride layer, and the first molybdenum niobium alloy layer to form the source/drain. twenty four