TW201911448A - Semiconductor manufacturing apparatus and method for manufacturing semiconductor device - Google Patents

Abstract

When abnormal detection on a surface of a semiconductor chip (die) is performed by an image difference method with binarizing or good products, cracks having a width of less than one pixel cannot be found. A semiconductor manufacturing device comprises: an imaging device imaging the die; a lighting device located on a line connecting the die and the imaging device; and a control device controlling the imaging device and the lighting device. The control device lights a part of the die on the lighting device to form a light part, a dark part and a gradation part between the light part and the dark part on the die, and images the die with the imaging device.

Description

Semiconductor manufacturing device and method for manufacturing semiconductor device

This case is related to a semiconductor manufacturing apparatus and can be applied to a die attacher equipped with a camera for identifying a die, for example.

When a semiconductor wafer is manufactured by cutting a disc-shaped wafer in advance, cracks extending from the cut section to the inside of the semiconductor wafer occur due to cutting resistance during dicing and the like. After the chipped semiconductor wafer is cracked, the presence or absence of cracks is inspected to determine whether the product is good or bad (for example, Japanese Patent Application Laid-Open No. 2008-98348). [Prior Art Literature] [Patent Literature]

[Patent Document 1] JP 2008-98348 [Patent Document 2] JP 2008-66452

(Problems to be solved by the invention)

When the abnormality detection on the surface of a semiconductor wafer (die) is performed by a method of binarizing a captured image or a difference method from a good image, a crack with a width of less than one pixel cannot be found.的 The object of this case is to provide a technology that can improve the recognition accuracy of cracks. Other problems and novel features can be clearly understood from the description of this specification and the drawings. (Means for solving problems)

A brief summary of the representative in this case is as follows. That is, the semiconductor manufacturing device includes: ： an imaging device that images a die; a lighting device arranged on a line connecting the die and the imaging device; and a control device that controls the imaging device and the lighting device. The control device uses the illumination device to illuminate a part of the crystal grain, forms a bright part, a dark part, and a gradation portion between the bright part and the dark part on the crystal grain, and uses the image pickup device to form the crystal grain. Video. [Effect of the invention]

According to the semiconductor manufacturing apparatus described above, it is possible to improve the recognition accuracy of cracks.

A part of the manufacturing process of a semiconductor device includes a process of assembling a package by mounting a semiconductor wafer (hereinafter referred to as a die) on a wiring board or a lead frame (hereinafter referred to as a substrate), and a part of the process of assembling the package includes a semiconductor wafer ( (Hereinafter referred to as a wafer) a process of dividing a die, and a joining process of mounting the divided die on a substrate. The semiconductor manufacturing apparatus used in the bonding process is a die attacher.

The die bonder is a device that uses solder, gold plating, and resin as bonding materials to bond (mount and adhere) the crystal grains to the substrate or the bonded crystal grains. In a die bonder for bonding crystal grains to, for example, the surface of a substrate, a suction nozzle called a collet is used to pick up the crystal grains from the wafer, pick them up, transfer them to the substrate, apply thrust, and The operation (work) of heating the bonding material for bonding is repeated. The chuck is a holder having an adsorption hole to attract air, and a chuck that adsorbs and holds the crystal grains, and has the same size as the crystal grains.

<Embodiment> (1) Hereinafter, a semiconductor manufacturing apparatus according to an embodiment will be described. The symbols in parentheses are examples and are not limited thereto. The semiconductor manufacturing device (10) includes: (i) an imaging device (ID) that images a die (D); (ii) an illumination device (LD) arranged on a line connecting the die (D) and the imaging device (ID); and controlling imaging Control device (8) of the device (ID) and the lighting device (LD). The control device (8) uses a lighting device (LD) to illuminate a part of the die (D), and divides the light portion (B), the dark portion (S), and the layer portion between the light portion (B) and the dark portion (S) ( M) is formed on the die (D), and the die (D) is imaged by an imaging device (ID). In this way, it is possible to find cracks with a width of less than 1 pixel that cannot be detected on the surface of the crystal grains by binarization or a method of difference with good-quality images, and the accuracy of crack recognition can be improved. .

Hereinafter, the embodiments will be described using drawings. However, in the following description, the same reference numerals are assigned to the same constituent elements, and redundant descriptions are omitted. In addition, in order to make the description clearer, the widths, thicknesses, shapes, and the like of each part may be schematically shown in comparison with the actual form. However, this is only an example and is not an interpreter for limiting the present invention.实施 [Example]

FIG. 1 is a top plan view showing an outline of a die attacher of the embodiment. FIG. 2 is a diagram illustrating the operation of the pickup head and the bonding head when viewed from the direction of arrow A in FIG. 1.

The die attacher 10 is roughly divided into: (1) a supply unit 1 for supplying a die D mounted on a substrate 9, which is printed with one or a plurality of product areas (hereinafter referred to as a package area P) to be the final 1 package; And a pickup section 2, an intermediate stage section 3, a joint section 4, a transport section 5, a substrate supply section 6, a substrate carry-out section 7, and a control section 8 that monitors and controls the operation of each section. The Y-axis direction is the front-back direction of the die attach machine 10, and the X-axis direction is the left-right direction. The die supply section 1 is arranged on the front side of the die attacher 10, and the bonding section 4 is arranged on the rear side.

First, the die supply unit 1 is a die D that supplies a package region P mounted on a substrate 9. The die supply unit 1 includes a wafer holding table 12 that holds the wafer 11, and a jacking unit 13 shown by a dotted line for lifting up the die D from the wafer 11. The die supply unit 1 is moved in the XY direction by a driving means (not shown), and the picked-up die D is moved to the position of the jack unit 13.

The pick-up section 2 includes a pick-up head 21 that picks up the die D, a Y drive section 23 that picks up the pick-up head 21 in the Y direction, and a not-shown section that moves the chuck 22 up and down, rotates, and moves in the X-direction. Drive section. The pick-up head 21 is a chuck 22 (see also FIG. 2) that holds and holds the jacked-up crystal grains D at the front end, picks up the crystal grains D from the crystal grain supply unit 1, and places them on the intermediate stage 31. The pick-up head 21 includes drive units (not shown) for raising, lowering, rotating, and moving the chuck 22 in the X direction.

The intermediate stage unit 3 includes an intermediate stage 31 on which the die D is temporarily placed, and a stage identification camera 32 for identifying the die D on the intermediate stage 31.

The bonding portion 4 picks up the die D from the intermediate stage 31 and is bonded to the package area P of the substrate 9 that is transferred, or is bonded to the die that is laminated on the package area P of the substrate 9 that has been bonded. The joint portion 4 includes: (1) A joint head 41 provided with a chuck 42 (also referred to in FIG. 2) for holding and holding the crystal grain D on the front end in the same manner as the pickup head 21; and a Y drive unit 43 which moves the joint head 41 to Y direction; and a substrate recognition camera 44 that picks up a position identification mark (not shown) of the package area P of the substrate 9 and recognizes a bonding position.如此 With such a configuration, the bonding head 41 corrects the pickup position based on the imaging data of the platform recognition camera 32, picks up the die D from the intermediate platform 31, and bonds the die D to the substrate based on the imaging data of the substrate recognition camera 44.

The transfer unit 5 includes a substrate transfer claw 51 that grips the substrate 9 and a transfer path 52 that moves the substrate 9. The substrate 9 is moved by driving a nut (not shown) of a substrate transfer claw 51 provided on the transfer path 52 with a ball screw (not shown) provided along the transfer path 52.如此 With such a configuration, the substrate 9 is moved from the substrate supply section 6 to the bonding position along the conveying path 52, and after the bonding, the substrate 9 is moved to the substrate carrying-out section 7 and the substrate 9 is transferred to the substrate carrying-out section 7.

The control unit 8 includes a memory that stores a program (software) that monitors and controls the operations of the various units of the die bonder 10, and a central processing unit (CPU) that executes the programs stored in the memory.

Next, the structure of the crystal grain supply part 1 is demonstrated using FIG.3 and FIG.4. FIG. 3 is a diagram showing an external perspective view of a die supply unit. FIG. 4 is a schematic cross-sectional view showing a main part of a crystal grain supply unit.

The die supply unit 1 includes: a wafer holding table 12 that moves in a horizontal direction (XY direction); and a jacking unit 13 that moves in an up-and-down direction. The wafer holding table 12 includes: (i) an expansion ring (15) that holds the wafer ring (14); and (ii) is held on the wafer ring (14) and positions a dicing tape (16) to which a plurality of crystal grains (D) are adhered on a horizontal support ring (17). The jack-up unit 13 is arranged inside the support ring 17.

The die supply unit 1 lowers the expansion ring 15 holding the wafer ring 14 when the die D is pushed up. As a result, the dicing tape 16 held by the wafer ring 14 will be stretched, and the interval between the crystal grains D will be enlarged. Picking up. In addition, as the thickness is reduced, the adhesive that adheres the crystal grains to the substrate changes from a liquid state to a thin film state, and a die-attach film (DAF) is attached between the wafer 11 and the dicing tape 16. Thin film-like adhesive material of 18. In the wafer 11 having the die-bonding film 18, dicing is performed on the wafer 11 and the die-bonding film 18. Therefore, in the peeling process, the wafer 11 and the die bonding film 18 are peeled from the dicing tape 16. It will be described later ignoring the existence of the crystal grain bonding film 18.

The die attacher 10 is: a wafer recognition camera 24 that recognizes the posture of the die D on the wafer 11; a platform recognition camera 32 that recognizes the attitude of the die D placed on the intermediate platform 31; and a bonding platform BS Mounting position on the substrate identification camera 44. (2) It is necessary to correct the posture deviation between the recognition cameras. The platform recognition camera 32 participating in the pickup of the bonding head 41 and the substrate recognition camera 44 participating in the bonding of the bonding head 41 toward the mounting position. In the present embodiment, the wafer recognition camera 24 is used to detect cracks in the die D.

The control unit 8 will be described using FIG. 5. FIG. 5 is a block diagram showing a schematic configuration of a control system. The control system 80 includes a control unit 8, a drive unit 86, a signal unit 87, and an optical system 88. The control unit 8 is roughly divided into: a control unit computing unit 81 constituted by a CPU (Central Processor Unit); a memory unit 82; an input / output unit 83; a bus line 84; and a power source unit 85. The memory device 82 includes a main memory device 82a constituted by a RAM such as a memory processing program, and an auxiliary memory device 82b constituted by an HDD such as control data or image data necessary for memory control. The input / output device 83 includes a monitor 83a that displays device status or information, a touch panel 83b for inputting an operator's instruction, a mouse 83c that operates the monitor, and an image acquisition device for acquiring image data from the optical system 88.入 装置 83d. The input / output device 83 is a motor control device 83e having a drive unit 86 that controls an XY stage (not shown) of the die supply unit 1 or a ZY drive shaft of the joint head stage, and various sensors or The signal unit 87 such as a switch of a lighting device or the like is an I / O signal control device 83f that receives or controls a signal. The optical system 88 includes a wafer identification camera 24, a platform identification camera 32, and a substrate identification camera 44. The control / calculation device 81 fetches necessary data via the bus line 84, performs calculations, and sends the information to the control of the pickup head 21 or the like or the monitor 83a or the like.

The control unit 8 stores the image data captured by the wafer identification camera 24, the platform identification camera 32, and the substrate identification camera 44 in the memory device 82 via the image taking device 83d. Based on the stored image data, the positioning unit of the die D and the package region P of the substrate 9 and the surface inspection of the die D and the substrate 9 are performed by the control unit 81 using a programmed software. Based on the positions of the die D and the package area P of the substrate 9 calculated by the control unit 81, the drive unit 86 is operated by the software via the motor control device 83e. By this process, the positioning of the crystal grains on the wafer is performed, and the driving portions of the pick-up portion 2 and the bonding portion 4 are operated to bond the crystal grains D to the package region P of the substrate 9. The wafer identification camera 24, the platform identification camera 32, and the substrate identification camera 44 to be used are gray scale, color, and the like, and the light intensity is quantified.

FIG. 6 is a flowchart illustrating a die bonding process of the die bonding machine of FIG. 1. In the die-bonding process of the embodiment, first, the control unit 8 removes the wafer ring 14 holding the wafer 11 from the wafer cassette, places the wafer ring 14 on the wafer holding table 12, and transfers the wafer holding table 12 to the die. Reference position for picking up D (wafer loading (process P1)). Next, the control unit 8 performs fine adjustment so that the arrangement position of the wafer 11 can accurately match the reference position thereof from the image acquired by the wafer recognition camera 24.

Next, the control unit 8 moves the wafer holding table 12 on which the wafer 11 is placed at a predetermined pitch and maintains it horizontally, thereby arranging the first picked-up die D at the pick-up position (die transfer (process P2) )). The wafer 11 is inspected for each die by an inspection device such as a probe in advance, and map data showing good and bad results for each die is generated and stored in the memory device 82 of the control unit 8. The determination of whether the crystal grain D to be picked is a good product or a defective product is performed based on the map data. When the die D is defective, the control unit 8 moves the wafer holding table 12 on which the wafer 11 is placed at a predetermined pitch, arranges the next picked die D at the pickup position, and skips the defective product. Grain D.

The control unit 8 picks up the principal surface (upper surface) of the pick-up die D by the wafer recognition camera 24, and calculates a displacement amount of the pick-up die D from the pickup position from the acquired image. The control unit 8 moves the wafer holding table 12 on which the wafer 11 is placed based on the amount of displacement, and correctly arranges the pick-up die D at the pick-up position (die positioning (process P3)).

Next, the control unit 8 performs a surface inspection of the die D from the image acquired by the wafer recognition camera 24 (process P4). The details of the surface inspection (appearance inspection) of the crystal grains will be described later. Here, the control unit 8 determines whether there is a problem in the surface inspection, and determines that there is no problem with the surface of the crystal grain D, and proceeds to the next process (process P9 described later), but when it is determined that there is a problem, the surface image is visually confirmed. ， If there is a problem, skip the process; if there is no problem, the next process will be processed. The skip process is performed after the process P9 of skipping the die D, and the wafer holding table 12 on which the wafer 11 is placed is moved at a predetermined pitch, and the next picked-up die D is arranged at the picking position.

The control unit 8 uses the substrate supply unit 6 to place the substrate 9 on the transfer path 52 (substrate loading (process P5)). The control unit 8 moves the substrate transfer claw 51 that grips the substrate 9 to the bonding position (substrate transfer (process P6)).

The substrate is recognized by the substrate recognition camera 44 and positioned (substrate positioning (process P7)).

Next, the control unit 8 performs a surface inspection of the package region P of the substrate 9 from the image acquired by the substrate recognition camera 44 (process P8). The details of the substrate surface inspection will be described later. Here, the control unit 8 determines whether there is a problem in the surface inspection and determines that there is no problem on the surface of the package area P of the substrate 9 to proceed to the next process (process P9 described later), but when it is determined that there is a problem, it is visually inspected. Check the surface image. If there is a problem, skip the process. If there is no problem, perform the next process. The skip processing is to skip the process P10 of the corresponding tab of the package area P of the substrate 9 and then perform a defective registration in the substrate operation information.

The control unit 8 picks up the die D to be picked up correctly at the picking position, and picks up the die D from the dicing tape 16 by the picking head 21 including the chuck 22 (die handling (process P9)) , Placed on the intermediate platform 31 ((Process P10). The control unit 8 detects the posture deviation (rotational deviation) of the crystal grains placed on the intermediate platform 31 using the platform recognition camera 32 to take an image (Process P11). Control When there is a posture deviation, the portion 8 corrects the posture deviation by rotating the intermediate platform 31 on a plane parallel to the mounting surface having the mounting position by a swing driving device (not shown) provided on the intermediate platform 31.

The control unit 8 performs a surface inspection of the crystal grain D from the image acquired by the platform recognition camera 32 (process P12). The details of the surface inspection (appearance inspection) of the crystal grains will be described later. Here, the control unit 8 determines whether there is a problem in the surface inspection, and determines that there is no problem with the surface of the crystal grain D, and proceeds to the next process (process P13 to be described later). ， If there is a problem, skip the process; if there is no problem, the next process will be processed. The skip process is performed after the process P13 of skipping the die D, and the wafer holding table 12 on which the wafer 11 is placed is moved at a predetermined pitch, and the next picked-up die D is arranged at the pickup position.

The control unit 8 picks up the die D from the intermediate stage 31 through the bonding head 41 including the chuck 42 and sticks the die to the package area P of the substrate 9 or the die (die) that has been bonded to the package area P of the substrate 9. Adhesion ((Engineering P13)).

The control unit 8 checks whether the bonding position of the bonded die D is correct (inspection of the relative position of the die and the substrate (process P14)). At this time, the center of the crystal grain and the center of the label are obtained in the same manner as the positioning of the crystal grain described later, and it is checked whether the relative position is correct.

Next, the control unit 8 inspects the surface of the crystal grain D and the substrate 9 from the image acquired by the substrate recognition camera 44 (process P15). Details of the surface inspection of the crystal grain D and the substrate 9 will be described later. Here, the control unit 8 determines whether there is a problem in the surface inspection, and determines that there is no problem on the surface of the bonded crystal grains D, and proceeds to the next process (process P9 described later), but when it is determined that there is a problem, it is visually Check the surface image. If there is a problem, skip the process. If there is no problem, perform the next process. The skip process is a bad registration in the board start information.

Thereafter, according to the same procedure, each of the die D is bonded to the package region P of the substrate 9. When the joining of one substrate is completed, the substrate 9 is moved to the substrate carrying-out portion 7 by the substrate carrying claw 51 (substrate carrying (process P16)), and the substrate 9 is delivered to the substrate carrying-out portion 7 (substrate unloading (process P17)). ).

Thereafter, in accordance with the same procedure, each of the crystal grains D is peeled from the dicing tape 16 (process P9). After the picking up of all the dies D except for defective products is completed, the dicing tape 16 and the wafer ring 14 holding the dies D in the shape of the wafer 11 are unloaded to the wafer cassette (process P18).

A method for crystal grain positioning will be described with reference to FIGS. 7 to 10. FIG. 7 is a flowchart for explaining an imitation operation. FIG. 8 is a diagram showing an example of a unique portion (selection area). FIG. 9 is a diagram showing an example of a registered image and a similar image. FIG. 10 is a flowchart for explaining a continuous start operation.

The grain positioning algorithm mainly uses template matching as the operation of the normalization correlation known in general. The result is used as the agreement rate. The template matching is a reference learning imitating action and a continuous starting action.

First, the imitation operation will be described. The control unit 8 transfers the reference sample to the pickup position (step S1). The control unit 8 acquires the image PCr of the reference sample with the wafer recognition camera VSW (step S2). The operator of the die attach machine selects a unique part UA as shown in FIG. 8 from the image through a human interface (touch panel 83b or mouse 83c) (step S3). The control unit 8 stores the positional relationship (coordinates) of the selected unique portion (selection area) UA and the reference sample in the memory device 82 (step S4). The control unit 8 stores an image (template image) PT of the selected area in the memory device 82 (step S5). The reference workpiece image and its coordinates are stored in a memory device.

Next, the continuous operation will be described. The control unit 8 transports a component (wafer for product) for continuous operation to a pick-up position (step S11). The control unit 8 obtains an image PCn of the product die using the wafer recognition camera VSW (step S2). As shown in FIG. 9, the control unit 8 compares the template image PT stored in the imitating operation with the obtained image PCn of the product grain, and calculates the coordinates of the image PTn of the most similar part (step S13). The coordinates are compared with the coordinates measured on the reference sample, and the positions of the crystal grains for the product (the offset between the image PTn and the template image PT) are calculated (step S14). The inspection of the appearance of the crystal grains (anomaly detection such as cracks or foreign objects) will be described with reference to FIGS. 11 to 14. FIG. 11 is a view showing a portrait of cracked crystal grains. FIG. 12 is a diagram showing an image obtained by binarizing the image of FIG. 11. FIG. 13 is a view showing an image of a good crystal grain. FIG. 14 is a diagram showing a difference between the image in FIG. 11 and the image in FIG. 13.

The abnormality detection on the surface of the crystal grain is performed by a method such as binarization or image difference method. An image PC2 (FIG. 12) obtained by binarizing the image PCa (FIG. 11) of crystal grains having cracked CR was generated, and an abnormal portion (cracked CR) was detected. A difference image PCa-n between the image PCa (FIG. 11) of the crystal grain with the cracked CR and the image PCn (FIG. 13) of the good crystal grain was generated, and the cracked CR was detected.

The problems related to the above-mentioned method will be described with reference to FIGS. 15 and 16. Fig. 15 is a portrait of a case where the crack is coarse. FIG. 16 is an image of a cracked case. The above method is to directly look at the crack. As shown in FIG. 15, when the crack CR1 of the image PCa1 is thick, it can be detected, but as shown in FIG. 16, if the crack CR2 of the image PCa2 becomes thinner or color Thinning makes it difficult to detect. That is, the above-mentioned technique has the following problems. (1) It is impossible to find a crack with a width of less than 1 pixel. If the width of a crack is less than 1 pixel, if the crack is to be reflected in a portrait, the image thickness cannot be recognized. Considering the direction of cracks, etc., it is practically impossible to detect the crack without a width of 3 pixels or more. (2) is easily affected by the surface pattern of the crystal grains. 有 When there is a complicated pattern on the surface of the crystal grains, it is difficult to identify the cracks walking on the surface. (3) It is difficult to control the brightness of cracks. It is difficult to make cracks bright or even dim.

The above-mentioned problem is to design a crack because of the problems caused by direct observation of cracks as in the case of grain positioning and identification, and the failure of the product depends on the presence or absence of cracks, and the width does not need to be considered. Indirect detection method.

FIG. 17 is a portrait for explaining an indirect detection method of cracks. The indirect detection method of cracks is a method of capturing changes occurring in the surroundings when cracks are present. For example, as shown in FIG. 17, with the crack CR as the realm, as long as the brightness of the portrait PC of the crystal grains changes, the width of the crack CR can be used to capture the crack. In FIG. 17, the right side image of the cracked CR is dim, and the left side image is bright. Hereinafter, a specific method for the indirect detection method of cracks will be described.

First, a board identification camera will be described with reference to FIG. 18. FIG. 18 is a diagram for explaining the optical system of the bonding portion, and shows the arrangement of a substrate recognition camera and a lighting unit that irradiates light for image capturing of crystal grains. The imaging unit ID of the substrate recognition camera 44 is connected to one end of the lens barrel BT, and an objective lens (not shown) is attached to the other end of the lens barrel BT, and becomes the main surface for taking in the crystal grain D through the objective lens. Composition of portraits. (2) An illumination unit LD including a surface-emission illumination (light source) SL and a half mirror (semi-transparent mirror) HM is disposed between the lens barrel BT and the crystal grain D on a line connecting the imaging unit ID and the crystal grain D. The irradiation light from the surface-emission illumination SL is reflected by the half mirror HM on the same optical axis as the imaging unit ID, and is irradiated to the crystal grain D. The scattered light irradiated to the crystal grain D with the same optical axis as the imaging unit ID is reflected by the crystal grain D, and the regular reflection light thereof passes through the half mirror HM to reach the imaging unit ID, and forms an image of the crystal grain D. That is, the illumination unit LD has a function of coaxial epi-illumination (coaxial illumination).

Although the substrate recognition camera 44 and its illumination unit LD will be described, the same applies to the platform recognition camera 32 and its illumination unit, and the wafer recognition camera 24 and its illumination unit.

A mechanism related to coaxial illumination will be described with reference to FIG. 19. FIG. 19 is a diagram for explaining a light source for coaxial illumination.

In the coaxial illumination, if the light source is arranged as it is, the light path between the die and the camera is blocked. Therefore, as shown in FIG. 19, a half mirror HM is placed and the light source SL is arranged at a position deviated from the light path. However, when viewed from the die D, the half mirror HM can also be regarded as having a light source (virtual light source) VSL at a virtual position between the die and the camera. However, the hypothetical light source VSL is less luminous than the actual light source SL. Hereinafter, the position of the light source of coaxial illumination is represented by a virtual light source VSL of light.

In this embodiment, a small angular difference that naturally occurs in a through crack is used. A small angle difference is difficult to detect, and therefore, a lighting method and a method for detecting a slight step difference of a crack portion penetrating through a crystal grain.

FIG. 20 is a diagram for explaining an indirect detection method of cracks. FIG. 21 is a diagram for explaining an indirect detection method of cracks. FIG. 21 (A) is a case where there are few areas where shadows are formed, FIG. 21 (B) is a case where the areas are where shadows are formed, and FIG. 21 (C) ) Is a case where there are many areas where a shadow is formed. FIG. 22 is a diagram illustrating an indirect detection method for cracks. FIG. 22 (A) is an image of cracks when an edge extraction filter is not used, and FIG. 22 (B) is an image of an edgeless filter. Fig. 22 (C) is a portrait of the crack when the edge extraction filter is used, and Fig. 22 (D) is a portrait of the crack when the edge extraction filter is used.

As shown in FIG. 20, for example, a part of the light emitting surface of the virtual light source VSL is shielded by the shielding plate SHL. As shown in Figs. 20 and 21, the shadowed area S is generated by the shadowed area, and the intermediate area M with layers is generated in the boundary between the shadow and the non-such area B. If a crack is generated in this intermediate region M, as shown in FIG. 22 (A), the boundary interface of the crack CR is used as a boundary, and the difference in light and dark is easy to appear clearly. The cracked CR is taken up with a slight step difference.

The image obtained in this way (Fig. 22 (A)) uses Sobel filter, Laplacian filter, Roberts filter, Puri As shown in Fig. 22 (C), an edge extraction filter such as a Prewitt filter can separate an existing pattern and a cracked portion from a hierarchical area.

The separated image (Fig. 22 (C)) can be used to separate the cracked part from the existing one by performing a differential process with the image (Fig. 22 (D)) which is subjected to the same processing on the crack-free (good) grains. appearance. This is because the reflection of cracked crystal grains is not the same as that of good crystal grains, so the density of the image (differential image) after the differential processing can be confirmed. This can detect the position or length of the cracked portion. In addition to differential images, edge detection (including the use of spatial filters such as Sobel filters and differential filters) that detects whether there are no unintended edges in the image can also be used, or the average of a specified area can be detected. Luminance hist Histogram changes in luminance data.

FIG. 23 is a diagram for explaining a light emitting surface and a shielding surface of the illumination, FIG. 23 (A) is a diagram showing an ideal example, and FIG. 23 (B) is a diagram showing an undesired example.

In FIG. 23 (A), the boundary interface A1 between the light-emitting surface EA and the shielding surface SA is clear, and there is no unevenness between the light-emitting surface EA and the shielding surface SA. In FIG. 23 (B), there is an intermediate region B1 between the light-emitting surface EA and the shielding surface SA, the boundary interface is unclear, and there is unevenness between the light-emitting surface EA and the shielding surface SA. There is no fade out at the interface, and it is ideal on both the light emitting surface and the shielding surface.

The indirect detection method of the crack in the embodiment uses the discontinuity of the plane with the crack as the environmental interface and the environmental interface of the illuminated area to give contrast to the lightness on both sides across the environmental interface, which is easy to detect Tiny width cracks. In general (for example, grain positioning identification by a direct detection method), coaxial illumination having a sufficient light emitting surface area is prepared in order to see the panoramic view of the grain. The area of the light emitting surface of the virtual light source VSL is made sufficiently larger than the area of the crystal grain D.

On the other hand, in the indirect detection method, a means for reducing a light emitting surface area (or an irradiation area) is provided to form a light emitting surface and a shielding surface. However, in order to switch between the direct detection method and the indirect detection method, a means for increasing or reducing the area of the light emitting surface (a means for controlling the light emitting surface) is provided. The means for controlling the light emitting surface is achieved by the following methods: (a) the movement of the shielding plate (the shielding plate SHL in FIG. 20) (b) the ON / OFF of the liquid crystal (c) the portion of the LED arranged in a plane Switching between ON / OFF light-emitting area and light-shielding area (d) Movement of the illumination of the irradiated crystal grains (e) Movement of the camera that captures cracks (f) For the interface of the discontinuous irradiation area, for example, using an intermediate platform Move the grains. Hereinafter, the control of the light-emitting surface will be described by taking the ON / OFF of a part of the LEDs arranged in the plane of (c) as an example. FIG. 24 is a perspective view of a lighting unit. FIG. 25 is a cross-sectional view of surface-emission lighting. FIG. 26 is a diagram showing a photographed image of a crack.

The surface-emission lighting SL in the lighting section LD is a surface-emission type LED light source, and includes an LED substrate SL1 having LEDs arranged in a plane, a diffusion plate SL2 facing the LED substrate SL1, and an LED substrate SL1. A shielding plate SL3 with the diffusion plate SL2. With the shielding plate SL3 as a realm, a region where the LED is turned on and a region where the LED is turned off are provided. For example, the LED substrate SL1 is divided into the upper first region SL1A and the lower second region SL1B. The direct detection method is to turn on the LEDs of both the first area SL1A and the second area SL1B to increase the area of the light emitting surface. In the indirect detection method, for example, the LEDs in the first region SL1A are turned on, the LEDs in the second region SL1B are turned off, and the light emitting surface area is reduced to form the light emitting surface and the shielding surface. Thereby, it is possible to form the same as FIG. 20.

As described above, if a shield plate is inserted inside the surface-emitting LED light source and the light emission is controlled for each realm, as shown in FIG. 26, in the crack detection possible area CDA, the visualization of cracks becomes possible. Visualize cracks that appear near the realm of the reflecting surface of the illumination on the surface of the die. At this time, the boundary of the light emitting surface on the surface of the diffusion plate that diffuses light is surely formed ideally.

By switching the light emitting surface and the shielding surface, the detection possible area can be enlarged. In addition, by moving the shielding plate SL3 or setting a plurality of areas to change the areas of the light emitting surface and the shielding surface, the detection possible area can be enlarged.

Instead of the diffuser plate SL2, a liquid crystal panel can also be used. In this case, the shielding plate SL3 is unnecessary. By controlling the transmission / non-transmission area of the liquid crystal panel, the inspection possible area can be enlarged.

The appearance inspection of cracks is performed at least one of the die supply section, the intermediate platform, and the joint platform where the position of the crystal grains is identified. However, it is desirable to perform the inspection at two places of the intermediate platform and the joint platform. More ideal. When carried out on the intermediate stage, cracks that were not detected in the die supply section or cracks that occurred after the picking process (cracks that were not surfaced before the bonding process) can be detected before bonding. In addition, if the bonding is performed on a bonding stage, cracks that cannot be detected in the crystal supply section and the intermediate stage can be detected before bonding of the next stacked crystals or before the substrate is discharged. Cracked).

The inventions developed by the present inventors have been specifically described based on the embodiments and examples, but the present invention is not limited to the above-mentioned embodiments and examples, and various modifications can be implemented.

For example, the embodiment describes the type in which the coaxial illumination is arranged between the objective lens and the crystal grains, but it may also be an insertion type in the lens. In addition, in the embodiment, the grain appearance inspection and recognition are performed after the grain position recognition, but the grain location recognition may be performed after the grain appearance inspection and recognition. In addition, in the embodiment, the DAF is attached to the back of the wafer, but the DAF may be omitted. In addition, in the embodiment, one pick-up head and one bonding head are provided, but two or more may be provided. In the embodiment, the intermediate platform is provided, but the intermediate platform may not be provided. In this case, the pickup head and the bonding head may be used in combination. In addition, in the embodiment, the surface of the crystal grains is used as the upper surface for joining, but the surface of the crystal grains may be reversed after picking up the crystal grains, and the rear surface of the crystal grains is used as the upper surface for bonding. In this case, the intermediate platform is optional. This device is called a flip-chip adapter. In addition, the embodiment is provided with a joint head, but it may be omitted. In this case, the picked crystal grains are placed in a container or the like. This device is called a pickup device.

In addition, it is also possible to readjust and recheck the light-shielding area of the light-emitting area in accordance with the direction of the previously detected cracks. This can increase the detection rate.

10‧‧‧ Sticky Crystal Machine

1‧‧‧Crystal Supply Department

13‧‧‧ jacking unit

2‧‧‧Pick up department

24‧‧‧ Wafer Identification Camera

3‧‧‧Middle Platform Department

31‧‧‧ intermediate platform

32‧‧‧Platform identification camera

4‧‧‧ Junction

41‧‧‧Joint head

42‧‧‧Chuck

44‧‧‧ substrate identification camera

5‧‧‧Transportation Department

51‧‧‧ substrate transfer claw

8‧‧‧Control Department

9‧‧‧ substrate

BS‧‧‧Joint Platform

D‧‧‧ Grain

P‧‧‧Packing area

LD‧‧‧Lighting Department

HM‧‧‧Half mirror

SL‧‧‧light source

SL1‧‧‧LED Substrate

SL1A‧‧‧Field 1

SL1B‧‧‧Field 2

SL2‧‧‧ diffuser

SL3‧‧‧shielding board

FIG. 1 is a schematic top view showing a configuration example of a die bonder. FIG. 2 is a diagram illustrating a schematic configuration when viewed from an arrow A direction in FIG. 1. FIG. 3 is an external perspective view showing the configuration of the crystal grain supply unit of FIG. 1. FIG. 4 is a schematic cross-sectional view showing a main part of the crystal grain supplying section of FIG. 2. FIG. 5 is a block diagram showing a schematic configuration of a control system of the die bonder of FIG. 1. FIG. 6 is a flowchart illustrating a sticking process of the sticking machine of FIG. 1. FIG. 7 is a flowchart for explaining the imitation operation. FIG. 8 is a diagram showing an example of a unique portion (selection area). FIG. 9 is a diagram showing an example of a registered image and a similar image. FIG. 10 is a flowchart for explaining a continuous start operation. FIG. 11 is a view showing a portrait of cracked crystal grains. FIG. 12 is a diagram showing an image obtained by binarizing the image of FIG. 11. FIG. 13 is a diagram showing a portrait of a good crystal grain. FIG. 14 is a diagram showing a difference between the image in FIG. 11 and the image in FIG. 13. FIG. 15 is a view showing an image in a case where the crack is coarse. FIG. 16 is a view showing an image in a case where cracks are fine. FIG. 17 is a diagram showing an image for explaining a crack indirect detection method. FIG. 18 is a diagram for explaining an optical system of a wafer supply unit. FIG. 19 is a diagram for explaining a light source for coaxial illumination. FIG. 20 is a diagram for explaining an indirect detection method of cracks. FIG. 21 is a diagram showing an image for explaining an indirect detection method of cracks. FIG. 22 is a diagram showing an image for explaining an indirect detection method of cracks. FIG. 23 is a diagram for explaining a light emitting surface and a shielding surface of the illumination. FIG. 24 is a diagram for explaining a lighting unit. FIG. 25 is a diagram for explaining surface-emission lighting. Figure 26 is a photographic image of a crack.

Claims (19)

A semiconductor manufacturing device is characterized by: (i) an imaging device that images a crystal grain; (ii) an illumination device that is disposed on a line connecting the aforementioned crystal grain and the aforementioned imaging device; and a control device that controls the aforementioned imaging device and The lighting device, the control device, illuminates a part of the die with the lighting device, and forms a bright part, a dark part, and a layered part between the bright part and the dark part on the die. Grain camera. For example, the semiconductor manufacturing device according to the first patent application range, wherein the control device performs an image obtained by processing an image of the crystal grain using an edge extraction filter and utilizing a crack-free crystal grain. The difference processing of the image of the processing of the edge extraction filter. For example, the semiconductor manufacturing device according to the first patent application range, wherein the lighting device has a light emitting surface and a shielding surface. For example, the semiconductor manufacturing device according to claim 3, wherein the illumination device is coaxial illumination provided with a half mirror disposed on a center line of the imaging device and a light emitting source disposed beside the half mirror. For example, the semiconductor manufacturing device of the fourth scope of the patent application, wherein the aforementioned light emitting source is a surface emitting source and has the first field and the second field, and the lighting of the first field and the second field can be individually controlled. For example, the semiconductor manufacturing device according to claim 5 of the application, wherein the first area is the light emitting surface, and the second area is the shielding surface. For example, the semiconductor manufacturing device according to item 6 of the patent application scope, wherein the aforementioned light source includes: an LED substrate having LEDs arranged in a plane; a diffuser plate provided opposite to the LED substrate; and a shielding plate It is disposed between the LED substrate and the diffusion plate, and the shielding plate is disposed in the boundary between the first area and the second area. For example, the semiconductor manufacturing device of the sixth aspect of the patent application, wherein the aforementioned light source includes: ： an LED substrate having LEDs arranged in a plane; and a liquid crystal panel provided opposite to the LED substrate; the liquid crystal The panel system forms the first area and the second area. For example, the semiconductor manufacturing device according to the first patent application range, wherein the control device moves the imaging device, illuminates a part of the die, and forms a bright portion, a dark portion, and a space between the bright portion and the dark portion on the die. The gradation section is configured to image the crystal grains with the imaging device. For example, the semiconductor manufacturing device according to the first patent application range, wherein the control device moves the crystal grains, illuminates a part of the crystal grains, and forms a bright part, a dark part, and a space between the bright part and the dark part on the crystal grain. The gradation section is configured to image the crystal grains with the imaging device. The semiconductor manufacturing device according to any one of claims 5 to 8 in the scope of the patent application, further comprising a mechanism for moving the light source, and the control device moves the light source to form the first field and The aforementioned second area. For example, the semiconductor manufacturing device according to the first patent application scope further includes a die supply unit having a wafer ring jig holding a dicing tape to which the aforementioned die is attached, and the aforementioned control device uses the aforementioned imaging device and the aforementioned The illuminating device captures an image of a die attached to the dicing tape. For example, the semiconductor manufacturing device according to the first patent application scope further includes a bonding head for bonding the above-mentioned crystal grains to a substrate or a bonded crystal grain. 控制 The aforementioned control device uses the aforementioned imaging device and the aforementioned illumination device. The dies bonded to the aforementioned substrate or dies are imaged. For example, the semiconductor manufacturing device according to the scope of patent application No. 1 further includes: a pickup head for picking up the aforementioned crystal grains; and an intermediate platform for mounting the picked up crystal grains; the aforementioned control device uses the aforementioned imaging device And the illumination device to image the die mounted on the intermediate platform. A method for manufacturing a semiconductor device, comprising: (a) a process for preparing a semiconductor manufacturing device according to any of items 1 to 10 of a patent application scope; (b) a dicing tape with a die attached to it The process of moving wafer ring fixtures; (c) the process of moving substrates; (d) the process of picking up the aforementioned dies; and (e) bonding the picked dies to the aforementioned substrate or the dies which have been bonded to the aforementioned substrate On the project. For example, the method for manufacturing a semiconductor device according to item 15 of the patent application, wherein: (d) the engineering is to place the picked die on an intermediate platform, and (e) the engineering is to pick up the Grain. For example, the method for manufacturing a semiconductor device according to item 15 of the application, further comprising (g) a process of inspecting the appearance of the crystal grains by using the imaging device and the illumination device before the step (d). For example, the method for manufacturing a semiconductor device according to item 15 of the application, further comprising (h) a process of inspecting the appearance of the crystal grains by using the imaging device and the lighting device after the step (e). For example, the method for manufacturing a semiconductor device according to item 16 of the application, further comprising (i) after the aforementioned (d) process and before the aforementioned (e) process, using the aforementioned imaging device and the aforementioned illumination device to inspect the crystal grains. Appearance works.