TW201327028A - Mask production method for maximizing the number of chips on a wafer - Google Patents

Abstract

The present invention relates to a mask production method for maximizing the number of chips on a wafer, the method comprising: adopting multiple scribing line widths when making scribing lines on the mask. The invention is characterized in that the width of scribing lines that require the test pattern to be placed or alignment marks are greater, and the width of scribing lines that require no test pattern to be placed or alignment marks are narrower. The present invention enables the mask scribing lines to have multiple scribing line widths. This method not only can meet the needs of test scribing, but also can satisfy the increase in the total number of die and the needs of instant shipping to customers.

Description

Photomask manufacturing method for maximizing the number of wafers on a wafer

The present invention relates to the field of semiconductor wafer fabrication, and more particularly to a method of fabricating a mask that maximizes the number of wafers on a wafer.

With the popularity of electronic products and competition in the market, no matter whether it is an IC design company or a foundry, there is no way to maximize the number of chips on the same wafer. Therefore, the narrowing of the width of the scriber line on the wafer is a goal of various manufacturers. According to experience, if the scribe line width of 10um is reduced, the number of wafers will increase by 1~2%, and the cost of a single wafer will be reduced.

However, due to the needs of the production process, the wafer foundry often needs to place a testing pattern or alignment mark (Align.Mark) on the cutting path, and the test pattern or alignment mark cannot be infinite due to the limitation of the machine. Zoom out.

Therefore, how to further reduce the width of the scribe line and increase the total amount of dies on a wafer is an urgent problem to be solved.

In view of the defects and deficiencies existing in the prior art, the object of the present invention is to make a reticle manufacturing method for maximizing the number of wafers on a wafer, which can retain the necessary test patterns or alignment marks and achieve the purpose of reducing the scribe lines.

In order to achieve the above object, the present invention provides a reticle fabrication method for maximizing the number of wafers on a wafer, the method comprising: using a plurality of scribe line widths when making a scribe line on the reticle.

As a preferred embodiment of the above technical solution, the width of the scribe line where the test pattern or the alignment mark is to be placed is wide, and the scribe line where the test pattern or the alignment mark is not required is not required. The width is narrower.

As a preferred aspect of the above technical solution, the width of the scribe line where the test pattern or the alignment mark is to be placed is the standard scribe line width, and the width of the scribe line where the test pattern or the alignment mark is not required to be placed is smaller than the standard scribe line width.

As a preferred aspect of the above technical solution, the width of the scribe line where the test pattern or the alignment mark is not required to be placed is such that the minimum width of the cut is satisfied.

The reticle of the reticle of the invention adopts the design of multiple scribe line widths, which can meet the requirements of test cutting, and can also meet the increase of the total die (Gross die) and the immediate shipment to the customer. Demand.

The specific embodiments of the present invention are further described in detail below with reference to the accompanying drawings. The above and other objects, features and advantages of the present invention will become apparent to those skilled in

In the traditional mask production, the same cutting width is used. As shown in Fig. 1, A1, A2, and A3 are standard cutting lane widths, and some of the cutting lanes are not placed with any test pattern. Moreover, today's technology is developed, and the Die size can be designed to be smaller, so cutting also invisibly becomes a waste of space affecting the Gross Die.

The present invention proposes a method of fabricating a reticle that maximizes the number of wafers on a wafer, wherein the scriber is formed with multiple scribe lane widths when the reticle is fabricated.

Specifically, the width of the scribe line where the test pattern or the alignment mark needs to be placed is wide, and the width of the scribe line where the test pattern or the alignment mark is placed is not required to be narrow.

For example, the width of the scribe line where the test pattern or alignment mark needs to be placed is the standard scribe line width in the prior art, without the need to place a test pattern or alignment mark The width of the scribe line can then be less than the standard scribe line width, and more preferably, the width of the scribe line where the test pattern or alignment mark is not placed needs to be sufficient to meet the minimum width for subsequent dicing of the wafer into a dies.

Referring to Figures 2 and 3, on the reticle, A4 and A5 use standard scribe line width for placement of alignment marks or test patterns; while B1, B2, B3, and B4 can be placed with smaller scribe line widths as long as they are satisfied. The rear cutting plant can be used. Subsequent reticle fabrication and wafer fabrication are no different than existing technologies. The Floor Plan, which actually places the reticle, is then provided to the test and cutting plant to facilitate the fabrication of the test and cutting machine settings.

Although the present invention has been clearly described by the above embodiments and the accompanying drawings, various modifications and changes can be made in accordance with the present invention without departing from the spirit and scope of the invention. However, such corresponding changes and modifications are intended to fall within the scope of the appended claims.

1 is a schematic view showing a width of a dicing street of a reticle in the prior art; FIG. 2 is a schematic view showing a width of a dicing street of a first reticle produced by the reticle manufacturing method of the present invention; and FIG. 3 is a second embodiment of the reticle manufacturing method according to the present invention. Schematic diagram of the width of the dicing channel.

Claims (4)

A method of fabricating a reticle that maximizes the number of wafers on a wafer, the method comprising: employing a plurality of scribe lane widths when making a scribe line on the reticle. A method of fabricating a reticle according to claim 1, characterized in that the width of the scribe line where the test pattern or the alignment mark is to be placed is wide, and the width of the scribe line where the test pattern or the alignment mark is not required to be placed is narrow. A method of fabricating a reticle according to claim 1 or 2, characterized in that the width of the scribe line to which the test pattern or the alignment mark is to be placed is a standard scribe line width, and the width of the scribe line where the test pattern or the alignment mark is not required to be placed is smaller than Standard cutting path width. A method of fabricating a reticle according to claim 3, characterized in that the width of the scribe line where the test pattern or the alignment mark is not required to be placed is such that the minimum width of the cut is satisfied.