201138581 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種電路板的結構及其製造方法，且特別是有 關於一種以全加成電鍍銅填平盲孔的電路板結構及其製造方法。 【先前技術】 現今大多數的電子產品，都必須藉由印刷電路柳rinteddrcuit board, PCB)來嵌載各種電子零組件。因此，一項電子產品的性能優 錢财用程度’與印刷電路板的品f、設計良财很大_係。隨 著電子產品走向輕、薄、短、小以及多功、快速、高能的發展，印 刷電路板亦走向高密度、小孔、細線、薄型、多層的趨勢。 -般電路板的結構包括有—銅祕板、—第—絕緣層、一第二 :美=三金屬層以及-第二絕緣層。首先，第-絕緣層形成 =基==著’在第一絕緣層上形成盲孔以暴露出部分的銅 地覆蓋-第1金屬露出的部分崎基板上順應 二:;層r:r影，然後將，·： 露出的嶋如⑽層以及暴 201138581 然而，以上述作法，當電路板積集度增加且線路越來越細時， 電路板的製造上將逐漸以液態光阻來取代乾式光阻的使用，而液態 光阻具有良好的流動性，將造成光阻流動至盲孔底部，而產生光阻 殘留的問題。如此，造成盲孔中的電性接觸不良；甚至是在電路板 的製程中’產生爆板的情形。此外，以上述作法，在電路板邊緣亦 容易產生彎翹的問題。其中，造成板彎翹的原因主要是電路板各層 籲間不同材料其熱膨脹係數(CTE)值不同，故在增層熱壓合製程時，層 間會產生不同之應力，而造成板彎翹。 【發明内容】 本發明提供—種電路板結構，肋解決盲孔光_留以及電路 板彎翹的問題。 ♦ *發明亦提供一種電路板結構的製造方法，以此方法形成的電 路板結構可解決盲孔光阻殘留以及電路板彎勉的問題。 本發明提出-種電路板結構，包含有—基板、—第—絕緣層、 金屬插塞、-第二金屬層、—第三金屬層以及—第二絕緣層。基 板有-核心絕緣層及至少一第一金屬層。第一絕緣層設於第一 八屬層上’其中第—絕緣層中具有至少―盲孔，曝露出部分的第一 金屬層。金屬插塞嵌於盲孔中。第二金屬層覆蓋於金屬插塞與部分 201138581 的第-絕緣層上。第三金屬層覆蓋於第二金屬層上 蓋於第三金>1層及第i緣層上。 H彖層覆 本發明提出-種·板結構，包含有—基板、—第— 金屬插塞、-第二金屬層、-第三金屬層以及—第二絕緣層 f有一核心絕緣層及至少—第—金屬層。第-絕緣層設於第= :層上，其中第-絕緣層中具有至少—盲孔，曝露出部分的第一金 第=塞層覆蓋於金屬插塞與部分的 1絕緣層上。第二金屬層覆盍於第二金屬層上，其中第三金屬声 具有一第一厚度以及—第二厚度，且第—厚度小於第二厚度。第二 絕緣層覆蓋於第三金屬層及第一絕緣層上。 在本發明之-實施例中，上述基板係為一銅箱基板，且銅狀 板例如為-雙面銅縣板。盲孔具有—漸縮的剖面輪廟，且此盲孔 2剖面輪廓可為-獅’的孔的上隸大於下孔徑。金屬插塞可 為填滿於盲孔巾_金屬插塞，射此插塞可由全域化學沈積銅 所構成者。第二金屬層例如為-化學銅層，而第三金屬層例如為一 ，銅層。在-實施例中，金屬插塞的結構較第二金屬層的結構緻 雄’而第三金屬層的結構又較金屬插塞的結構緻密。第—絕緣層以 及第二絕緣層包含有ABF (A細m〇t〇 Build哪Film)膜。在其他實施 例中，第二絕緣層亦可包含有防焊綠漆。此外，第三金屬層可包含 一週邊環狀金属結構，其具有第二厚度H施例中，第三金屬 層另可包含-連接塾，例如錫球銲塾’位於金屬插塞正上方，且連 201138581 於第一厚度。此外，連接墊可 接墊具有第一厚度，而第一厚度可小 以與週邊環狀金屬結構相連在—起。 包含Γ =板的製作方法，首先提供-基板傭 二===及至少—第—金屬層，再於第一金屬層上形成 第接續，於第一絕緣層中形成至少一盲孔，曝露部分 2金屬層，再選擇性的於盲孔中填人—導體層。接著，於第一絕 ^上=體層上形成—第二金屬層。额，於第二金屬層上形成 :金屬層阻Γ ’並在未被雜圖賴蓋的第二金屬層上形成一第 屬層。繼之，剝除第一光阻圆案。 在本發明之—實施例中可接續上述步驟，在剝除第 =第三金屬層上形成-第二光阻圖案，而第二光_案曝= 上電 土板的-週邊環狀區域。接著’於週邊環狀區域的第三金屬層 V成週邊環狀金屬結構。然後，剝除第二光阻圖案。 在本發明之一實施例中，上述基板係為一銅板，且銅絲 例如為-雙面銅縣板。導體層可為—銅金屬，而銅金屬可由全 加成化學沈積銅所構成者，且導體層填滿於盲孔中。第二金屬層例 如為一化學銅層，而第三金屬層例如為一電鍍銅層。在一實施例中， 導體層的結構較帛二诚層的結構随，而第三金屬層的結構又較 導體層的結構緻密。 201138581 藉中土i 4本發明之電频結觀其製造找可解決電路板製 中^阻流動至盲孔中造成光阻殘留或是電路板爆板的問題。此 卜本發明在製程中再另外增厚第三金屬層的週邊環狀區域的厚 度，如此可防止電路板邊緣彎翹的問題。 實施方式】 第1圖係為本發明顧在電路板之結構示意圖。請參考第！圖， 電路板結構刚包括-基板110、一第一絕緣層12〇、一金屬插塞 第-金屬層140、-第二金屬層15()以及一第二絕緣層^⑼， 其中在本發明較佳實施例中，電路板結構！⑻的製作除了可使用液 1、光阻外’亦可伽光阻乾财形成其圖案化線路結構，進而使電 路板結構100可更方便應用於覆晶封裝的產品中。 詳細來說，基板110包含有一核心絕緣層112及至少—第一金 屬層m。第一絕緣層12〇設於第—金屬層114上，其中第—絕緣 層120巾具有至少-盲孔122,曝露出部分的第一金屬層114。金屬 插塞130嵌於盲孔m中。第二金屬層M0覆蓋於金屬插塞π〇與 部分的第-絕緣層120上。第三金屬層15〇覆蓋於第二金屬層⑽ 上。第一絕緣層160覆蓋於第三金屬層15〇及第一絕緣層丨2〇上。 根據本發明較佳實施例’基板110為一銅箔基板，且為—雙面 銅箔基板。亦即，基板110係由核心絕緣層112及分別形成於核心 201138581 絕緣層112兩側之第一金屬層m所構成。當然，在其 峨要’只於核心絕緣層112之—側形成第一金 一雙面的對稱結構，故以下說明將僅以核心絕緣層112的一側2 月田然核心絕緣層lu的另一側的結構以及其製造方法亦相同°， 故在本說明書中不再贅述。 第一絕緣層120形成於第一金屬層114上，其中第一絕緣層120 之材料可為ABF膜、聚㈣(咖吻1哪，pp)絲魏胺_喊 pi) ’且可以真空加熱壓合的方式形成於第一金屬層ιΐ4上。接著， 以雷射或是機械鑽孔等方式在第一絕緣層12〇中形成多個盲孔 122 ’並在盲孔122底部暴露出第一金屬層114。值得注意的是，本 發明主要技術特徵在於當電路板積紐增高岐孔122直徑逐漸縮 小或其縱触逐_大時，為了枝祕光_使用，本實施例係 直接以無電解電鑛、全加成化學沉積（FullAdditivePr〇cess)等方 式’將盲孔122以例如銅等金屬材質填滿或填平，而形成金屬插塞 130。如此一來，即可避免如習知技術中，直接先形成晶種層時，後 續使用的液態光阻流動至盲孔122，造成盲孔122中的光阻殘留的 問題。當然，本實施例亦可使用於光阻乾膜的製程中，且本實施例 之盲孔122亦可視需要做全部填滿或部分填滿的金屬插塞13〇的製 程。此外，在一較佳的實施例中，盲孔122可具有一漸縮的剖面輪 廓，且此盲孔122的剖面輪廓可為一梯形。具體來說，盲孔122的 上孔徑大於下孔徑。 201138581 第二金屬層uo覆蓋於部分的第—絕緣層m以及金屬插塞 130上，其中第二金屬層140例如為一化銅層，其可以化學沉積 (Chemiea丨Vap㈣物iti⑽，CVD)的方式覆蓋於第-絕緣層⑶ 以及金屬插塞⑽上。再者，第三麵層⑼職蓋於第二金屬層 140上’其中第三金屬層15〇例如為—電鍍銅層。在本實施例中， 結構上因其形成的方式不同，金屬插塞13〇的結構較第二金屬層14〇 構、致也而第二金屬層U0的結構又較金屬插塞的結構緻 更進步來說，第二金屬層150的形成可先以一第一光阻（未 繪=)塗佈於第二金屬層⑽的表面上，再加以—第—光罩（未綠 :一於第-光阻上並將第—級曝光，而使第—光罩之影像轉移至 =阻。其後，以顯影方辦不需要之第—光阻移除。然後，以 電=將顯影後被移除之第一光阻的缺口填滿。最後，再將第 得到，化的第三金屬層15G。值得注意的是， 時的第三金屬層15G具有—均勻的第-厚度db 150^外ΐΓΓ覆蓋—第二光阻（未繪示）於圖案化的第三金屬層 以將一第為輪1㈣。狀，㈣二雜曝光顯影 第:)圖案轉移至第二光阻上。在本實施例中， 第嶋_三麵㈣賴咖域⑽。如 11以電鑛等方式將暴露出的週邊環狀區域m填滿，以形成 201138581 一週邊環狀金屬結構17G。因此，第二光町方未暴露出的第三金 屬=150具有原來的第一厚度⑴，而週邊環狀金屬結構⑺具有第 二厚度d2 ’其中第—厚度⑴小於第二厚度旧。如此設計，即可防 止電路板邊緣物關題。本發明藉由選擇性地在制線路層的周 邊區域形成厚度較厚之口形框結構，以平均不同層之間的應力，進 而防止板__題產生。並且’在其他實施财，亦可在任意層 中I成厚度|^厚之口形框結構以防止板—翹的情形，本發明並不僅 以一層為限。 再者，第二絕緣層16G覆蓋於第三金屬層15G及第-絕緣層12〇 上姻防止第三金屬層15〇及第—絕緣層12()直接暴露於大氣中。 在本實施例中，第二絕緣層16Q的材質為防焊綠漆；但在其他實施 例中’第—輯層16Q的材質亦可為娜膜、聚丙稀絲亞酿胺， 以方便進行後續線輯層。並且，在本實關中，第三金屬層lso 亦包含-連接塾180，例如錫球銲塾，位於金屬插塞13G正上方， 且連接塾180具有與第二金屬層⑼相同的第一厚度。當然，連接 塾180也可不位於金屬插塞13()的正上方連触⑽的設置位置 僅視實際連接錫_需要而決定。在—實關中，連雜⑽與週 狀金屬結構170可相連在一起；或者以一具體的實施方式來 -兒可在第一絕緣層⑽中形成複數個開孔以露出部分第三金屬層 15〇 (電性連接塾），再進行錫膏印刷、迴焊等製程，以在開孔中形 成錫球188 ’進而與外部元件（未％示）電性連接。 201138581 此外，在其他實施例中，亦可在第二絕緣層謂上，再以相同 於上述之形成第-絕緣層12G、製造盲孔122以及依序形成金屬插 塞no、第二金屬層ho、第三金屬層ls〇及第二絕緣層副的方式 堆疊更多層，例如第2圖係為本發明應用在電路板之另—結構示意 圖。賴，應用本發明之精神亦可形成其他類似結構之電路板，本 發明並不以此為限。 另外，為更瞭解本發明之結構特徵，請參考第Μ圖及第犯圖。 第3A圖係為習知技術的電路板中盲孔結構的示意圖。第犯圖係為 本發明應用於電路板中盲孔結構的示意圖。由第3a圖可知，習知 技術之電路板結構係在盲孔3G中先形成—晶種層4Q，然後再以光 阻曝光顯影，並進行賴等方式於晶種層4()上形成—金屬層5〇， 其中形成在盲孔中的插塞與線路係—起電鍍而成的^相較於習 術，本發明(見第3B圖)係以無電解電鍍或全加成化學沉積㈤！ Additive Process)等方式在盲孔122中先形成金屬插塞13〇，再 -第二金屬層M0，也就是銅晶種層，最後再形成—第三 150，也就是線路層，其中形成在盲孔中的插塞與線路係分咖成 的，中間被晶種層隔開。以此可知，本發明除了製程方法不同 知技術外，其結構特徵亦與習知技術不相同。 ' 白 第4A-4；[圖係為本發明應用在電路板之製程示意圖。 言，本實酬之㈣製造㈣係為先提供—基板^兑勺八 有一核心絕緣層m及一第一金屬層114 (如第从圖）。接著= 201138581 第金屬層114上形成一第一絕緣層12〇 (如第4B圖）。接續，、 第-絕緣層120中形成多個盲孔122以曝露部分第一金屬層: 第4c圖）。然後’再選擇性的於f孔122中填人—導體層，其 導體廣即為金屬插塞130 (如第4D圖）。繼之，於第一絕緣層 上與金屬插塞130上形成一第二金屬層14〇 (如第4£圖）。 再於第二金屬層14〇上形成一第一光阻圖案1〇 (如第#圖「並右 未被第-光阻圖案10覆蓋的第二金屬層14〇上形成一第三金屬層 # (々第4G圖）。繼之’剝除第一光阻圖案10以及位於第一光阻 圖案10下方的部分第二金屬層140，以露出第一絕緣層12〇後在 第三金屬層150與第一絕緣層12〇上再覆蓋一第二絕緣層16〇。並 且’可在第二絕緣層160中形成複數個開孔以部分露出部分的連接 墊180，例如錫球焊墊，再進行錫膏印刷、迴焊等製程，以在開孔 中形成錫球188，進而與外部元件（未繪示）電性連接（如第4i圖）。201138581 VI. Description of the Invention: [Technical Field] The present invention relates to a structure of a circuit board and a method of manufacturing the same, and more particularly to a circuit board structure for filling a blind hole by full-addition electroplating copper and Production method. [Prior Art] Most of today's electronic products must be embedded with various electronic components by means of printed circuit liu tededdrcuit board, PCB). Therefore, the performance of an electronic product is superior to that of a printed circuit board. As electronic products move toward light, thin, short, small, and multi-functional, fast, and high-energy development, printed circuit boards are also trending toward high density, small holes, thin lines, thin, and multi-layer. The structure of the general circuit board includes a copper secret plate, a first insulating layer, a second: a beautiful metal layer, and a second insulating layer. First, the first insulating layer is formed = the base == 'a blind hole is formed on the first insulating layer to expose a portion of the copper ground covering - the first metal is exposed on the portion of the substrate to conform to two:; layer r: r shadow, Then, ·:: exposed (10) layer and storm 201138581 However, in the above method, when the board accumulation increases and the line becomes thinner, the circuit board will gradually replace the dry light with liquid photoresist. The use of resistance, while the liquid photoresist has good fluidity, will cause the photoresist to flow to the bottom of the blind hole, resulting in the problem of photoresist residue. As a result, the electrical contact in the blind via is poor; even in the process of the board, a burst is generated. In addition, in the above manner, the problem of bending is also likely to occur at the edge of the board. Among them, the reason for the bending of the plate is mainly because the different coefficients of thermal expansion coefficient (CTE) of different materials in the layers of the circuit board are different. Therefore, when the laminating thermal compression bonding process, different stresses are generated in the layers, and the plate is bent. SUMMARY OF THE INVENTION The present invention provides a circuit board structure in which ribs solve the problem of blind hole light_retention and circuit board bending. ♦ * The invention also provides a method of manufacturing a circuit board structure. The circuit board structure formed by the method can solve the problem of blind hole photoresist residue and circuit board bending. The invention provides a circuit board structure comprising a substrate, a first insulating layer, a metal plug, a second metal layer, a third metal layer and a second insulating layer. The substrate has a core insulating layer and at least a first metal layer. The first insulating layer is disposed on the first octagonal layer, wherein the first insulating layer has at least a blind via to expose a portion of the first metal layer. The metal plug is embedded in the blind hole. The second metal layer covers the metal plug and the portion of the insulating layer of 201138581. The third metal layer covers the second metal layer and is covered on the third gold layer 1 and the i-th edge layer. H 层层层 The present invention proposes a seed plate structure comprising a substrate, a first metal plug, a second metal layer, a third metal layer, and a second insulating layer f having a core insulating layer and at least The first - metal layer. The first insulating layer is disposed on the 1:1 layer, wherein the first insulating layer has at least a blind via, and the exposed first gold plug layer covers the metal plug and a portion of the insulating layer. The second metal layer is overlying the second metal layer, wherein the third metal sound has a first thickness and a second thickness, and the first thickness is less than the second thickness. The second insulating layer covers the third metal layer and the first insulating layer. In the embodiment of the invention, the substrate is a copper box substrate, and the copper plate is, for example, a double-sided copper plate. The blind hole has a tapered cross-sectional temple, and the blind hole 2 has a cross-sectional profile that can be the upper portion of the hole of the lion's larger than the lower aperture. The metal plug can be filled with a blind burr-metal plug, which can be formed by a global chemical deposition of copper. The second metal layer is, for example, a chemical copper layer, and the third metal layer is, for example, a copper layer. In the embodiment, the structure of the metal plug is stronger than the structure of the second metal layer, and the structure of the third metal layer is denser than the structure of the metal plug. The first insulating layer and the second insulating layer include an ABF (A fine film) film. In other embodiments, the second insulating layer may also comprise a solder resist green lacquer. In addition, the third metal layer may include a peripheral annular metal structure having a second thickness H. In the embodiment, the third metal layer may further include a connection 塾, such as a solder ball 塾 'directly above the metal plug, and Even 201138581 at the first thickness. Additionally, the bond pad lands can have a first thickness and the first thickness can be small to connect with the peripheral annular metal structure. Including the method of manufacturing the Γ = plate, firstly providing - substrate commission 2 === and at least - the first metal layer, and then forming a splicing on the first metal layer, forming at least one blind hole in the first insulating layer, the exposed portion 2 metal layer, and then selectively filled in the blind hole - conductor layer. Next, a second metal layer is formed on the first layer. And forming a metal layer on the second metal layer and forming a first layer on the second metal layer not covered by the pattern. Following this, the first photoresist circle was stripped. In the embodiment of the present invention, the above steps may be continued to form a second photoresist pattern on the stripped third metal layer, and the second light is exposed to the peripheral ring region of the upper earth plate. Then, the third metal layer V in the peripheral annular region is formed into a peripheral annular metal structure. Then, the second photoresist pattern is stripped. In an embodiment of the invention, the substrate is a copper plate, and the copper wire is, for example, a double-sided copper plate. The conductor layer may be - copper metal, and the copper metal may be composed of fully-added chemically deposited copper, and the conductor layer is filled in the blind via. The second metal layer is, for example, a chemical copper layer, and the third metal layer is, for example, an electroplated copper layer. In one embodiment, the structure of the conductor layer is more closely related to the structure of the second layer, and the structure of the third metal layer is denser than the structure of the conductor layer. 201138581 By the middle earth i 4 the invention of the electric frequency junction view of its manufacture can solve the problem of the circuit board system in the resistance of the flow to the blind hole caused by photoresist residue or circuit board explosion. Therefore, the present invention further thickens the thickness of the peripheral annular region of the third metal layer in the process, thereby preventing the problem of edge bending of the board. Embodiments Fig. 1 is a schematic view showing the structure of a circuit board according to the present invention. Please refer to the first! The circuit board structure includes a substrate 110, a first insulating layer 12, a metal plug-metal layer 140, a second metal layer 15 (), and a second insulating layer (9), wherein the present invention In a preferred embodiment, the board structure! (8) In addition to the use of liquid 1, photoresist, but also gamma light resistance to form its patterned circuit structure, so that the circuit board structure 100 can be more conveniently used in flip chip packaging products. In detail, the substrate 110 includes a core insulating layer 112 and at least a first metal layer m. The first insulating layer 12 is disposed on the first metal layer 114, wherein the first insulating layer 120 has at least a blind via 122 exposing a portion of the first metal layer 114. The metal plug 130 is embedded in the blind hole m. The second metal layer M0 covers the metal plug π 〇 and a portion of the first insulating layer 120. The third metal layer 15 is covered on the second metal layer (10). The first insulating layer 160 covers the third metal layer 15 and the first insulating layer 〇2〇. According to a preferred embodiment of the present invention, the substrate 110 is a copper foil substrate and is a double-sided copper foil substrate. That is, the substrate 110 is composed of a core insulating layer 112 and a first metal layer m respectively formed on both sides of the core 201138581 insulating layer 112. Of course, the first gold-double-sided symmetrical structure is formed on the side of the core insulating layer 112 only, so the following description will only be the core of the core insulating layer 112. The structure of one side and the manufacturing method thereof are also the same, and therefore will not be described in detail in the present specification. The first insulating layer 120 is formed on the first metal layer 114, wherein the material of the first insulating layer 120 can be ABF film, poly (tetra), and pp can be vacuum heated. The combined manner is formed on the first metal layer ι4. Next, a plurality of blind vias 122' are formed in the first insulating layer 12A by laser or mechanical drilling, and the first metal layer 114 is exposed at the bottom of the blind via 122. It should be noted that the main technical feature of the present invention is that when the circuit board is increased, the diameter of the pupil 122 is gradually reduced or the longitudinal contact is large, and for the use of the light, the embodiment is directly electroless, The metal plug 130 is formed by filling or filling the blind hole 122 with a metal material such as copper in a manner such as full additive chemical deposition (Full Additive Prization). In this way, in the prior art, when the seed layer is formed first, the subsequent liquid photoresist flows to the blind via 122, causing the problem of residual photoresist in the blind via 122. Of course, this embodiment can also be used in the process of the photoresist dry film, and the blind via 122 of the embodiment can also be used to complete the process of fully filling or partially filling the metal plug 13〇. Moreover, in a preferred embodiment, the blind hole 122 can have a tapered profile profile and the profile of the blind hole 122 can be a trapezoid. Specifically, the upper aperture of the blind hole 122 is larger than the lower aperture. 201138581 The second metal layer uo covers part of the first insulating layer m and the metal plug 130, wherein the second metal layer 140 is, for example, a copper layer, which can be chemically deposited (Chemiea 丨 Vap (four) iti (10), CVD) Covered on the first insulating layer (3) and the metal plug (10). Further, the third facing layer (9) covers the second metal layer 140. The third metal layer 15 is, for example, an electroplated copper layer. In this embodiment, the structure is different in structure, the structure of the metal plug 13〇 is smaller than that of the second metal layer 14, and the structure of the second metal layer U0 is more than the structure of the metal plug. In advance, the formation of the second metal layer 150 may be first applied to the surface of the second metal layer (10) by a first photoresist (not shown), and then the first photomask (not green: one in the first - the photoresist is exposed and the first level is exposed, and the image of the first mask is transferred to the = resistance. Thereafter, the unnecessary photoresist is removed by the developing device. Then, the electricity is used to be developed. The gap of the removed first photoresist is filled up. Finally, the third metal layer 15G is obtained. It is noted that the third metal layer 15G has a uniform first-thickness db 150^ ΐΓΓ overlay—the second photoresist (not shown) is patterned on the third metal layer to transfer a first wheel (4), (4) di-differential development image:) pattern onto the second photoresist. In this embodiment, the third side (four) is the third domain (10). For example, 11 is filled with the exposed peripheral annular region m by means of electric ore to form a peripheral annular metal structure 17G of 201138581. Therefore, the third metal = 150 which is not exposed by the second optical ridge has the original first thickness (1), and the peripheral annular metal structure (7) has the second thickness d2' where the first thickness (1) is smaller than the second thickness. This is designed to prevent board edge problems. The present invention prevents the occurrence of the __ problem by selectively forming a thicker rectangular frame structure in the peripheral region of the wiring layer to average the stress between the different layers. And in other implementations, the thickness of the mouth frame structure can be made in any layer to prevent the plate from being warped, and the present invention is not limited to one layer. Furthermore, the second insulating layer 16G covers the third metal layer 15G and the first insulating layer 12, and prevents the third metal layer 15 and the first insulating layer 12 () from being directly exposed to the atmosphere. In this embodiment, the material of the second insulating layer 16Q is a solder resist green paint; however, in other embodiments, the material of the first layer 16Q may also be a naphthalene film or a polyacrylic silk amide, to facilitate subsequent operations. Line layer. Moreover, in the present embodiment, the third metal layer lso also includes a connection port 180, such as a solder ball bond, located directly above the metal plug 13G, and the connection port 180 has the same first thickness as the second metal layer (9). Of course, the connection port 180 may not be located at the position where the contact (10) of the metal plug 13 () is directly above. In the actual case, the interconnects (10) may be connected to the perimeter metal structure 170; or in a specific embodiment, a plurality of openings may be formed in the first insulating layer (10) to expose a portion of the third metal layer 15 〇 (electrical connection ,), and then solder paste printing, reflow soldering and other processes to form a solder ball 188 ' in the opening and electrically connected to external components (not shown). In other embodiments, the second insulating layer may be formed on the second insulating layer, and the first insulating layer 12G is formed, the blind via 122 is formed, and the metal plug no and the second metal layer are sequentially formed. The third metal layer ls〇 and the second insulating layer pair are stacked in a plurality of layers. For example, FIG. 2 is a schematic diagram of another structure applied to the circuit board of the present invention. Further, the circuit board of other similar structures may be formed by applying the spirit of the present invention, and the present invention is not limited thereto. In addition, in order to better understand the structural features of the present invention, please refer to the figure and the first diagram. Fig. 3A is a schematic view showing a blind hole structure in a circuit board of the prior art. The first diagram is a schematic diagram of the present invention applied to a blind hole structure in a circuit board. It can be seen from Fig. 3a that the circuit board structure of the prior art is formed first in the blind via 3G - the seed layer 4Q, and then exposed by photoresist exposure, and formed on the seed layer 4 ( The metal layer 5〇, wherein the plug formed in the blind hole is electroplated with the circuit system, the invention (see FIG. 3B) is electroless plating or full-addition chemical deposition (5) ! Additive Process) and the like form a metal plug 13〇 in the blind hole 122, and then a second metal layer M0, that is, a copper seed layer, and finally a third 150, that is, a circuit layer, in which a blind layer is formed. The plugs in the holes are separated from the lines, separated by a seed layer. As can be seen from the above, in addition to the different techniques of the process, the present invention is also different in structural features from the prior art. 'White 4A-4; [Figure is a schematic diagram of the process of the invention applied to the circuit board. In other words, (4) manufacturing (4) is provided first—the substrate is provided with a core insulating layer m and a first metal layer 114 (as shown in the figure). Next = 201138581 A first insulating layer 12 is formed on the metal layer 114 (as shown in FIG. 4B). Subsequently, a plurality of blind vias 122 are formed in the first insulating layer 120 to expose a portion of the first metal layer: FIG. 4c). Then, the conductor layer is 'optionally filled in the f hole 122, and the conductor is wide, that is, the metal plug 130 (as shown in Fig. 4D). Then, a second metal layer 14 is formed on the first insulating layer and the metal plug 130 (as shown in Fig. 4). Forming a first photoresist pattern 1 再 on the second metal layer 14 〇 (as shown in FIG. 1 and forming a third metal layer on the second metal layer 14 that is not covered by the first photoresist pattern 10) (々4G). Next, the first photoresist pattern 10 and a portion of the second metal layer 140 under the first photoresist pattern 10 are stripped to expose the first insulating layer 12 and then to the third metal layer 150. And a second insulating layer 16〇 is further covered with the first insulating layer 12 and “a plurality of openings may be formed in the second insulating layer 160 to partially expose a portion of the connection pads 180, such as solder ball pads, and then Solder paste printing, reflow soldering, etc., to form solder balls 188 in the openings, and then electrically connected to external components (not shown) (such as Figure 4i).
/另外’本發明之另—實關之製程亦可在形成—第三金屬層 後’僅剝除第-光阻圖案10,而形成一圖案化的第三金屬層15〇(如 第4H圖）’接著’請參考第5A_5D圖’可接續上述步驟，在剝除第 光阻圖案10後再於第三金屬層150上形成一第二光阻圖案2〇， 而第一光阻圖案20曝露出基板no的一週邊環狀區域116(如第5A 圖）。接著，於週邊環狀區域116的第三金屬層15〇上電鍍形成一週 邊環狀金屬結構170，其中週邊環狀金屬結構17〇的材質通常與第 二金屬層150相同（如第5B圖）。然後，剝除第二光阻圖案，並再 蝕刻掉部分的第二金屬層H0以暴露出第一絕緣層120 (如第5C 13 201138581 Θ ) ’進而元成線路圖案。繼之，可名笛▲ μ p j在第二金屬層150及第一絕緣層 120上再覆蓋第二絕緣層16〇。 ^ ^ 工且了在第一絕緣層160中形成複 數個開孔以露出部分的連接塾180，i、隹一i 1刀吸使f·，再進仃錫膏印刷、迴焊等製程， 以在開孔中形成錫球188，進而與外 第5D圖）。 興卜70件（未綠示）電性連接（如 1所述’本發明之電路板結構及其製造方法，應用了無電解 電=:力•學沉積⑽織wep_ss)料式直接先將盲 殘=此以解決電路板製程中’光阻流動至盲孔中而造成光阻 $疋電路板爆板關題。此外，本發明在製程巾另外以第 ^曝光並再進行電綱方式’來增厚第三金屬層週邊雜區域的厚 度，如此可防止電路板邊緣彎翹的問題。 以上所碰為树狀難魏例，職本發日科請專利範圍 文之均等變化與修飾，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1圖係為本發明應用在電路板之結構示意圖。 第2圖係為本發明應用在電路板之另—結構示意圖。 第从圖係為習知技術的電路板中盲孔結構的示意圖。 第圖係為本發明顧於電路板中f孔結構的示意圖。 第4八-41圖係為本發明應用在電路板之製程示意圖。 201138581 第5A-5D圖係為本發明應用在電路板之製程示意圖。 【主要元件符號說明】 10 :第一光阻圖案 20 :第二光阻圖案 30 :盲孔 40 :晶種層 鲁50 :金屬層 100 :電路板結構 110 :基板 112 :核心絕緣層 114 :第一金屬層 116 :週邊環狀區域 120 :第一絕緣層 φ 122 :盲孔 130 :金屬插塞 140:第二金屬層 150 :第三金屬層 160 :第二絕緣層 170 :週邊環狀金屬結構 180 :連接墊 188 :錫球 15 201138581 dl :第一厚度 d2 :第二厚度/ In addition, the other process of the present invention can also be used to form a patterned third metal layer 15 〇 after forming the third metal layer to form a patterned third metal layer 15 (eg, FIG. 4H) 'Next, please refer to FIG. 5A_5D' to continue the above steps, after stripping the photoresist pattern 10, a second photoresist pattern 2 is formed on the third metal layer 150, and the first photoresist pattern 20 is exposed. A peripheral annular region 116 of the substrate no (as shown in Fig. 5A). Next, a peripheral annular metal structure 170 is plated on the third metal layer 15 of the peripheral annular region 116, wherein the material of the peripheral annular metal structure 17 is generally the same as that of the second metal layer 150 (as shown in FIG. 5B). . Then, the second photoresist pattern is stripped, and a portion of the second metal layer H0 is etched away to expose the first insulating layer 120 (e.g., 5C 13 201138581 Θ)' to form a line pattern. Then, the second swell ▲ μ p j is overlaid on the second metal layer 150 and the first insulating layer 120 to cover the second insulating layer 16 〇. ^ ^ The formation of a plurality of openings in the first insulating layer 160 to expose a portion of the connection 塾 180, i, 隹 i i 1 knife suction f ·, then into the solder paste printing, reflow process, etc. Tin balls 188 are formed in the openings, and further to the outer 5D map). 70 pieces (not green) electrically connected (such as 1 described in the circuit board structure and its manufacturing method, the application of electroless electricity =: force • academic deposition (10) weav_ss) material directly blind first Residual = This is to solve the problem of 'resistance flowing into the blind hole in the circuit board process and causing the photoresist to smash the circuit board. Further, the present invention additionally thickens the thickness of the peripheral region of the third metal layer in the process towel by exposing and then performing the electric field mode, thereby preventing the problem of the edge of the circuit board being bent. The above is a difficult case of a tree, and the equivalent changes and modifications of the scope of the patent application should be within the scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing the structure of the present invention applied to a circuit board. Fig. 2 is a schematic view showing another structure applied to the circuit board of the present invention. The first diagram is a schematic diagram of a blind hole structure in a circuit board of the prior art. The figure is a schematic diagram of the present invention taking into account the structure of the f-hole in the circuit board. The fourth eight-41 figure is a schematic diagram of the process of the invention applied to the circuit board. 201138581 The 5A-5D diagram is a schematic diagram of the process of the invention applied to the circuit board. [Main component symbol description] 10: First photoresist pattern 20: Second photoresist pattern 30: Blind hole 40: Seed layer Lu 50: Metal layer 100: Circuit board structure 110: Substrate 112: Core insulating layer 114: a metal layer 116: a peripheral annular region 120: a first insulating layer φ 122: a blind via 130: a metal plug 140: a second metal layer 150: a third metal layer 160: a second insulating layer 170: a peripheral annular metal structure 180: connection pad 188: solder ball 15 201138581 dl: first thickness d2: second thickness