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TW201008407A - Printed circuit board and coexisting layout method thereof - Google Patents

Printed circuit board and coexisting layout method thereof Download PDF

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Publication number
TW201008407A
TW201008407A TW97130265A TW97130265A TW201008407A TW 201008407 A TW201008407 A TW 201008407A TW 97130265 A TW97130265 A TW 97130265A TW 97130265 A TW97130265 A TW 97130265A TW 201008407 A TW201008407 A TW 201008407A
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Taiwan
Prior art keywords
pair
conductive portion
component
circuit board
coupled
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TW97130265A
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Chinese (zh)
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TWI423744B (en
Inventor
Yung-Chieh Chen
Cheng-Shien Li
Shou-Kuo Hsu
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Hon Hai Prec Ind Co Ltd
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Priority to TW97130265A priority Critical patent/TWI423744B/en
Publication of TW201008407A publication Critical patent/TW201008407A/en
Application granted granted Critical
Publication of TWI423744B publication Critical patent/TWI423744B/en

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Abstract

A printed circuit board coupling to a electronic device includes a first element, a second element, a first layout layer and a second layout layer. A first conducted potion pair coupling to a control chip is disposed on the first layout layer. A third conducted potion pair is disposed between a second and a fourth conducted potion pair, and all of them are disposed on the second layout layer. If the second conducted potion pair coupled to the electronic device, the first and the second element make the second conducted potion pair to couple to the third conducted potion pair which is corresponding to and coupled to the first conducted potion pair of the first layout layer. If the fourth conducted potion coupled to the electronic device, the first and the second element make the third conducted potion pair to couple to the fourth conducted potion pair.

Description

201008407 九、發明說明: 【發明所屬之技術領域】 本發明涉及一種 電路板及其共存佈線 【先前技術】 電路板及其佈線方法 方法。 特別關於一種 隨著科技的進步,對於相同的產品,會因應不同使用 需求而改變㈣的—些功能,因而-種產品會有許多 ❺同的產σσ規格。對於產品的電路板而言,通常會使用一 &佈線方式’再藉由選擇烊接不同的線路而產生不同的功 =及,格’故⑤速訊號,例如高速差分訊號的共存佈線的 應用就更加廣泛。 β參&圖1所不’為f知的—種電路板i的共存佈線 的線路圖,電路板丄具有藉由單一佈線方式形成的一第一 傳輸線對11A、11B、-第二傳輸線對12A、12B及—第三 傳輸線對13A、13B,且第二傳輸線對12A、12B設置第一 ❹傳輸線對11A、11B及第三傳輸線對13A、i3B之間。 明同時參照圖2與圖3所示,兩個規格不同的電路板 ΙΑ 1B分別具有一控制晶片14,而控制晶片μ產生高速 訊號對S1、S2,例:高速差分訊號對並與第一傳輸線對 11A、11B麵接。電路板ία、1B並分別與一第一電子裝置 15(如圖2所示)及-第二電子裝置16(如圖3所示)麵接, 第電子裝置麵接電路板1A的第一傳輸線對 及第二傳輸線對12A、12B之間(如圖2所示);而第二電 子裝置16麵接電路板1B的第三傳輸線對DA、ub,而 201008407 電路板1B需再藉由耦接二個分隔元件,通常為阻值〇卩的 電阻裔Rl、R2在第二傳輸線對12A、12B及第三傳輸線 ,對13A、13B之間,即可將訊號傳輪至第二電子裝置16。 然而,上述方式,就第一電子裝置15而言,第二傳輸線對 12A、12B因無傳輸作用而造成電路殘段;就第二電子裝 置16而&,需增加二個區隔組件,進而提升成本。 、爰因於此,如何提供一種利用相同佈線即可依據不同 ❹需求產生不同訊號線連結,且免除區隔元件並降低成本的 電路板及其共存佈線方法,已成為重要課題之一。 【發明内容】 種利用相同佈 且免除區隔元 鑒於以上課題,本發明之目的為提供一 線Ρ ΊΓ依據不同需求產生不肖訊號線連結, 件並降低成本的電路板及其共存佈線方法。 禋1:路板 马達上述目的,依據本發明之 β電子裝置,其包含一第一元件 :了 :Μ 線層。本發明中,第一佈線層設有-輕接 部掛::導電部對,第二佈線層設有-第二導電 ^ 第二導電部對及一第四導電部對,第三導電邱银 设置於第二導電部對及第四導電部對之 :、 對_子;:時佈二導電, 及第三導電部對_,當第四二導電部對 第-元件及第二元件使第三導電電部: 1對及第四導電部對耦 8 201008407 接。 為達上述目的,依據本發明之一種電路板之共存佈線 方法包含下列步驟:於一第一佈線層上設置一第_導電部 •對,並使第一導電部對耦接一控制晶片;於一第二佈線層 上設置一第二導電部對、一第三導電部對及一第四導電部 對,其中第三導電部對設置第二導電部對及第四導電部對 之間;耦接第三導電部對及第一導電部對;以及當第二導 ❹電部對耦接一電子裝置時,使第二導電部對及第三導電部 對耦接;當第四導電部對耦接一電子裝置時,使第三導電 部對及第四導電部對耦接。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board and a coexisting wiring thereof. [Prior Art] A circuit board and a wiring method thereof. In particular, with the advancement of technology, for the same product, the functions of (4) will be changed according to the different use requirements, and thus the product will have many different σσ specifications. For the circuit board of the product, it is usually used to use a & wiring method to generate different powers by selecting different lines. Therefore, the application of the 5-speed signal, such as the coexistence wiring of high-speed differential signals. It is more extensive. A reference circuit diagram of a common circuit wiring of a circuit board i, which has a first transmission line pair 11A, 11B, and a second transmission line pair formed by a single wiring method. 12A, 12B and - the third transmission line pair 13A, 13B, and the second transmission line pair 12A, 12B is disposed between the first transmission line pair 11A, 11B and the third transmission line pair 13A, i3B. Referring to FIG. 2 and FIG. 3 simultaneously, two different boards ΙΑ 1B have a control chip 14 respectively, and the control chip μ generates high-speed signal pairs S1 and S2, for example, a high-speed differential signal pair and a first transmission line. Face to face 11A, 11B. The circuit boards ία, 1B are respectively connected to a first electronic device 15 (shown in FIG. 2) and a second electronic device 16 (shown in FIG. 3), and the first electronic transmission device is connected to the first transmission line of the circuit board 1A. And the second transmission line pair 12A, 12B (as shown in FIG. 2); and the second electronic device 16 is connected to the third transmission line pair DA, ub of the circuit board 1B, and the 201008407 circuit board 1B needs to be coupled again Two separate components, typically resistors R1, R2 of resistance 〇卩 between the second transmission line pair 12A, 12B and the third transmission line, between pairs 13A, 13B, can pass the signal to the second electronic device 16. However, in the above manner, in the first electronic device 15, the second transmission line pair 12A, 12B causes a circuit residual segment due to no transmission; and the second electronic device 16 needs to add two separate components, and further Increase costs. Because of this, it has become one of the important topics to provide a circuit board and a coexisting wiring method that can generate different signal line connections according to different ❹ requirements, and eliminate the division components and reduce the cost by using the same wiring. SUMMARY OF THE INVENTION The use of the same fabric and the elimination of the compartments. In view of the above problems, the object of the present invention is to provide a circuit board and a coexistence wiring method for generating a line Ρ ΊΓ 不 ΊΓ ΊΓ ΊΓ ΊΓ according to different requirements.禋1: Road Board Motor The above object, the β electronic device according to the present invention, comprises a first component: a Μ line layer. In the present invention, the first wiring layer is provided with a light-contact portion: a pair of conductive portions, the second wiring layer is provided with a second conductive portion, a second conductive portion pair and a fourth conductive portion pair, and the third conductive Qiuyin The second conductive portion pair and the fourth conductive portion are opposite to each other: a pair of _ sub; a second conductive portion, and a third conductive portion pair _, when the fourth two conductive portion pairs the first element and the second element Three conductive parts: 1 pair and 4th conductive part pair coupling 8 201008407. In order to achieve the above object, a method for coexisting wiring of a circuit board according to the present invention comprises the steps of: disposing a first conductive portion on a first wiring layer, and coupling the first conductive portion to a control wafer; a second conductive layer pair, a third conductive portion pair and a fourth conductive portion pair are disposed on the second wiring layer, wherein the third conductive portion pair is disposed between the second conductive portion pair and the fourth conductive portion pair; Connecting the third conductive portion pair and the first conductive portion pair; and when the second conductive portion is coupled to an electronic device, coupling the second conductive portion pair and the third conductive portion pair; when the fourth conductive portion is opposite When the electronic device is coupled, the pair of the third conductive portion and the pair of the fourth conductive portion are coupled.

承上所述,本發明之電路板及其共存佈線方法,藉由 電路板單一佈線,而使第一元件及第二元件可耦接於第二 導電部對及第三導電部對之間,或耦接於第三導電部對及第 四導電部對之間以改變訊號連接。與習知技術相較,本發明 僅藉由單一佈線與第一元件及第二元件配合,使第一元件及 第二元件耦接不同佈線,就可產生不同的訊號線連接,此種 =式,不僅可使電路板依據不同需求具有不同的規格,更不 鬲再增加區隔元件,進而降低成本。 【實施方式】 以下將參照相關圖式,說明依據本發明較佳實施方式 之一種電路板及其共存佈線方法。 請參照圖4所示,本實施方式的電路板2包含一第一 疋件21、一第二元件22、一第一佈線層23、一第二佈線 9 201008407 = 24、設於第—佈線層23與第二佈線層μ之間的絕緣 曰(圖未不)、—連接部對29A、29B及—控制晶片3。電路 板2於實施上可為一主機板。 於本實施方式中’第—佈線層23具有—第—導電部對 25A、25B,而第一導電部對2从、2沾於實施上為一對焊 盤或一對焊墊。 一第一佈線層24具有一第二導電部對26A、26B、一第 ❺:導電部對27A、27B及一第四導電部對ΜΑ、Mb,而第 三導電部對27A、27B設置在第二導電部對26A、26B及 第四導電部對28A、28B之間,且第三導電部對Μ、· 與第-導電部對25A、25B相互對應且通過連接部對29A、 29B耦接。連接部對29A、29B於實施上可為一對過孔, 或一對埋孔。 本實施方式的第一元件21與第二元件22相互對應設 置,且可為電容器或電阻器,在此以第一元件21與第二元 ❹件22皆為一交流耦合電容器為例。 控制晶片3耦接第一導電部對25A、25B並產生一高 速訊號對S3、S4,而高速訊號對S3、S4於實施上可為一 咼速差分訊號對,且控制晶片3藉由第一導電部25 a、25B 對傳輸高速訊號S3、S4對至第三導電部對27八、27B。 一電子裝置4可耦接到第二導電部對26A、26B(如圖 4所示)或第四導電部對28A、28B(如圖5所示)。 請再參照圖4所示,當電子裝置4耦接到第二導電部 對26A、26B時,第一元件21耦接第二導電部對26A及 201008407 ::導電部對27A,第二元件22麵接第二導電部對26b 及第二導電部對27卜而控制晶片3將高速訊號對仏別 、k帛導電部對25A、25B、第三導電部對27A、27B、 第疋件21、第二兀件22及第二導電部對26A、傳 輸至電子敦置4。 請參照圖5所示,當電子裝置4麵接到第四導電部對 ^ 時,第一組件21搞接第三導電部對27A及第四 ❹導電。卩對28A,第一元件22叙接第三導電部對27B及第 四導電邛對28B ’而控制晶片3將高速訊號對S3、S4通過 第-導電部對25A、25B、第三導電部對27Α、27β、第一 疋件21、第二元件22及第四導電部對28a、28b傳輸至 電子裝置4。 於本實施方式中,電路板2藉由相同的佈線,而依據 >不同需求僅改變第一元件21及第二元件22耦接的位置, 就可使電路板2產生不同的規格。 ❿ 另外,請參照圖6所示,本發明電路板2的共存佈線 方法的較佳實施方式包括步驟S〇i至s〇5。 步驟S01,於第一佈線層23上設置第一導電部對 25A、25B,並使第一導電部對25A、25B耦接控制晶片3。 步驟S02,於第二佈線層24上設置第二導電部對 26A、26B、第三導電部對27A、27B及第四導電部28A、 28B,使第三導電部對27A、27B設置第二導電部對26A、 26B及第四導電部對28A、28B之間,且第三導電部對 27A、27B相對應第一導電部對25a、25B。 11 201008407 步驟S03,輕接第二道 部對25Α、25Β。—電销27Α、27Β與第一導電 電路板可依據不同雷电 生不同規格。 ]需求而執行步驟S04或S05,以產 步驟S04,當電子裝置 _時,將第一元件 轉一接到第二導電部對26Α、 電部對27Α,第二元件22 ;:對肅及第三導 Ο 導電部對27Β。 耦接第-導電部對26Β及第三 當電子裝置4㈣到第四導電部對溢、 28Β時,第一組件2i麵接筮: 部對28Α’第二元件22 導=對27Α及第四導電 電部對細。 輕接第二導電部對27Β及第四導 本=的轉板及其共存佈線方法,僅藉由單一佈線 與第-讀2:1及第二元件22配合,使第—元件Η及第二 =22純不同的佈料電部對,就可產生μ的訊號線 接’此種方式’不僅可使電路板依據不同需求具有不同 的規格,更不需再增加區隔組件,進而降低成本。 本發明符合發明專利要件,爰依法提出專利申請。惟, 以上所述者僅為本發明之較佳實施方式,舉凡熟悉本案技 藝之人士,在爰依本發明精神所作之等效修飾或^化了皆 應涵蓋於以下之申請專利範圍内。 【圖式簡單說明】 圖1為顯示習知的電路板的共存佈線的線路圖 12 201008407 θ為顯不習知的電路板輕接第一電子裝置的連接 圖3為_示習知的電路板純第二電子裝置的連接 。為^不本發明較佳實施方式的—種電路板的爆 =。5為顯示本發明較㈣施方式的另—種電路板的 ❹ 圖6為顯 線的流程圖。 示本發明較佳實施方式的電路板的共存佈As described above, the circuit board of the present invention and the method for coexisting the same, the first component and the second component can be coupled between the pair of the second conductive portion and the third conductive portion by a single wiring of the circuit board. Or coupled between the third conductive portion pair and the fourth conductive portion pair to change the signal connection. Compared with the prior art, the present invention can cooperate with the first component and the second component by a single wiring, so that the first component and the second component are coupled to different wires, and different signal line connections can be generated. Not only can the board have different specifications according to different requirements, but also increase the partition components, thereby reducing the cost. [Embodiment] Hereinafter, a circuit board and a coexisting wiring method thereof according to a preferred embodiment of the present invention will be described with reference to the related drawings. Referring to FIG. 4, the circuit board 2 of the present embodiment includes a first component 21, a second component 22, a first wiring layer 23, a second wiring 9 201008407 = 24, and is disposed on the first wiring layer. Insulation between the 23 and the second wiring layer μ (not shown), the connection portion pairs 29A, 29B, and the control wafer 3. The circuit board 2 can be implemented as a motherboard. In the present embodiment, the "first wiring layer 23" has the -first conductive portion pair 25A, 25B, and the first conductive portion pair 2 and 2 are applied as a pair of pads or a pair of pads. A first wiring layer 24 has a second conductive portion pair 26A, 26B, a second: conductive portion pair 27A, 27B and a fourth conductive portion opposite, Mb, and a third conductive portion pair 27A, 27B is disposed at The second conductive portion pair 26A, 26B and the fourth conductive portion pair 28A, 28B are disposed, and the third conductive portion pair Μ, and the first conductive portion pair 25A, 25B correspond to each other and are coupled through the connecting portion pair 29A, 29B. The pair of connection portions 29A, 29B may be a pair of via holes or a pair of buried holes. The first element 21 and the second element 22 of the present embodiment are disposed corresponding to each other, and may be a capacitor or a resistor. Here, the first element 21 and the second element 22 are both an AC coupling capacitor as an example. The control chip 3 is coupled to the first conductive portion pair 25A, 25B and generates a high speed signal pair S3, S4, and the high speed signal pair S3, S4 can be implemented as an idle differential signal pair, and the control chip 3 is first The conductive portions 25a, 25B are paired to transmit the high-speed signals S3, S4 to the third conductive portion pairs 27, 27B. An electronic device 4 can be coupled to the second pair of conductive portions 26A, 26B (shown in Figure 4) or the fourth pair of conductive portions 28A, 28B (shown in Figure 5). Referring to FIG. 4 again, when the electronic device 4 is coupled to the second conductive portion pair 26A, 26B, the first component 21 is coupled to the second conductive portion pair 26A and 201008407 :: the conductive portion pair 27A, the second component 22 The second conductive portion pair 26b and the second conductive portion pair are surface-contacted to control the wafer 3 to distinguish between the high-speed signal pair, the k- conductive portion pair 25A, 25B, the third conductive portion pair 27A, 27B, the second member 21, The second element 22 and the second pair of conductive portions 26A are transmitted to the electronic device 4. Referring to FIG. 5, when the electronic device 4 is surface-connected to the fourth conductive portion pair ^, the first component 21 is electrically connected to the third conductive portion pair 27A and the fourth conductive portion. In the pair 28A, the first component 22 is connected to the third conductive portion pair 27B and the fourth conductive pair 28B', and the control wafer 3 passes the high-speed signal pair S3, S4 through the first conductive portion pair 25A, 25B and the third conductive portion. 27Α, 27β, the first element 21, the second element 22, and the fourth pair of conductive portions 28a, 28b are transmitted to the electronic device 4. In the present embodiment, the circuit board 2 can be made to have different specifications by the same wiring, and only the position where the first component 21 and the second component 22 are coupled according to different requirements of the > Further, referring to Fig. 6, a preferred embodiment of the coexistence wiring method of the circuit board 2 of the present invention includes steps S〇i to s〇5. In step S01, the first conductive portion pair 25A, 25B is disposed on the first wiring layer 23, and the first conductive portion pair 25A, 25B is coupled to the control wafer 3. Step S02, the second conductive portion pair 26A, 26B, the third conductive portion pair 27A, 27B and the fourth conductive portion 28A, 28B are disposed on the second wiring layer 24, so that the third conductive portion pair 27A, 27B is provided with the second conductive The pair of portions 26A, 26B and the fourth conductive portion pair 28A, 28B, and the third conductive portion pair 27A, 27B correspond to the first conductive portion pair 25a, 25B. 11 201008407 Step S03, lightly connect the second section to 25Α, 25Β. —Electric pins 27Α, 27Β and the first conductive circuit board can be different according to different lightning conditions. Step S04 or S05 is performed to generate step S04, and when the electronic device is _, the first component is transferred to the second conductive portion pair 26Α, the electrical portion pair 27Α, the second element 22; The three-conductor 导电 conductive portion is 27Β. When the first conductive portion pair 26Β and the third electronic device 4(4) to the fourth conductive portion are overlapped, 28Β, the first component 2i is in contact with each other: the pair of parts 28Α' the second element 22 is led to the pair 27Α and the fourth conductive The electric department is fine. Lightly connecting the second conductive portion pair 27Β and the fourth guidebook=the rotating plate and the coexisting wiring method thereof, and only the single wiring is matched with the first read 2:1 and the second element 22 to make the first component and the second component = 22 purely different fabric electrical parts, it can generate μ signal line connection 'this way' not only can make the circuit board have different specifications according to different needs, and no need to increase the partition components, thereby reducing the cost. The invention complies with the requirements of the invention patent, and proposes a patent application according to law. However, the above description is only the preferred embodiment of the present invention, and those skilled in the art will be able to make modifications and equivalents in the spirit of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram showing a conventional circuit board coexisting wiring. FIG. 12 is a schematic diagram of a conventional electronic circuit board connected to a first electronic device. FIG. The connection of a pure second electronic device. It is a burst of the circuit board which is not a preferred embodiment of the present invention. 5 is a circuit diagram showing another circuit board of the present invention in comparison with the fourth embodiment. Fig. 6 is a flow chart of the display line. Coexistence cloth of circuit board showing preferred embodiment of the present invention

【主要元件符號說明】 電路板 第二傳輪線對 控制晶片 第二電子裝置 第二元件 第二佈線層 第二導電部對 第四導電部對 電子裝置 1、1Α、 1Β、2 第一傳輸線對 12Α、12Β第三傳輸線對 14、3 第一電子裝置 16 第一元件 22 第一佈線層 24 第一導電部對 26Α、26Β第三導電部對 28Α、28Β連接部對 4 電阻器 11Α、11Β 13Α、13Β 15 21 23 25Α、25Β 27Α、27Β 29Α、29Β R1、R2 高速訊號對 SI、S2、 S3、S4 13[Main component symbol description] circuit board second transfer line pair control chip second electronic device second element second wiring layer second conductive portion to fourth conductive portion pair electronic device 1, 1 Α, 1 Β, 2 first transmission line pair 12Α, 12Β third transmission line pair 14, 3 first electronic device 16 first element 22 first wiring layer 24 first conductive portion pair 26Α, 26Β third conductive portion pair 28Α, 28Β connecting portion pair 4 resistors 11Α, 11Β 13Α , 13Β 15 21 23 25Α, 25Β 27Α, 27Β 29Α, 29Β R1, R2 high-speed signal pair SI, S2, S3, S4 13

Claims (1)

201008407 十、申請專利範圍 1. 一種電路板,耦接有一電子裝置,該電路板包含: 一第一組件; 一第二元件; 一第一佈線層,该第一佈線層設有耦接一控制晶片的一第 一導電部對;以及 一第二佈線層,該第二佈線層設有一第二導電部對、一第 三導電部對及-第四導電部對,該第三導電部對設置於节 β第二導電部對及該第四導電部對之間,該第三導電部對相 對應耦接該第一佈線層的該第一導電部對; 當該第二導電部對耦接該電子裝置時,該第一元件及該第 一疋件使該第二導電部對及該第三導電部對耦接,當該 四導電部對耦接該電子裝置時,該第一元件及該第二元件 使該第三導電部對及該第四導電部對麵接。 2. 如申請專利範圍第丨項所述之電路板,其中該第三導電 冑對是通過一連接部對與該第-導電部對搞接。 3. 如申請專㈣圍第2項所述之電路板,其中該連接部對 為一對過孔或埋孔。 4·如申請專利範圍第1項所述之 該第二元件為一電阻器。 5·如申請專利範圍第i項所述之電路板,其中該 一 及該第二元件為一電容器。 70 6. 如^請專利範圍第5項所述之電路板,其中該電容 —交流耦合電容器。 。 7. 如申請專利範圍第!賴述之電路板,其中該控制晶片 201008407 用於產生一高速訊號對。 8.如申請專利範圍第7所述之電 為一高速差分訊號對。 板,其令該高速訊號對 9·-種電路㈣共存佈線方法 *於一第一佈線層上設置—第下列步驟: 部對耦接一控制晶片; 導電部蚜,並使該第一導電 於一第二佈線層上設置一第二 及-第四導電部對,其中 、、第二導電部對 β電部對及該第四導電部對;;^導電部對設置於該第二導 :接該第三導電部對與該第-導電部對·以及 及該第三導電部對電子裳置時’使該第二導電部對 當該第四導電部對轉接一 及該第四導電部對電子裝置時,使該第三導電部對 鲁 第:申道月^利^圍第9項所述之共存佈線方法,其中該 11如中心卩疋通過一連接部對與該第一導電部對耦接。 圍第Μ項所述之共存佈線方法,其中該 逆接。卩對為—對過孔或埋孔。 二二:月專利範圍第9項所述之共存佈線方法,其中該 元件及該第二元件為一電阻器。 申睛專利範圍第9項所述之共存佈線方法,其中該 K -?件及該第二元件為一電容器。 如申凊專利範圍第13項所述之共存佈線方法,其中該 電容器為一交流耦合電容器。 15·如申請專利範圍第9項所述之共存怖線方法’其中該 15 201008407 控制晶片用於產生一高速訊號對。 16.如申請專利範圍第15項所述之共存佈線方法,其中該 高速訊號對為一高速差分訊號對。201008407 X. Patent application scope 1. A circuit board coupled with an electronic device, the circuit board comprising: a first component; a second component; a first wiring layer, the first wiring layer is coupled with a control a first conductive portion of the wafer; and a second wiring layer, the second wiring layer is provided with a second conductive portion pair, a third conductive portion pair and a fourth conductive portion pair, the third conductive portion pair is disposed Between the second conductive portion pair and the fourth conductive portion pair, the third conductive portion pair is coupled to the first conductive portion pair of the first wiring layer; when the second conductive portion is coupled In the electronic device, the first component and the first component couple the second conductive portion pair and the third conductive portion pair. When the four conductive portion pair is coupled to the electronic device, the first component and The second component pairs the third conductive portion pair with the fourth conductive portion. 2. The circuit board of claim 2, wherein the third pair of conductive pairs are coupled to the first conductive portion through a pair of connecting portions. 3. For the circuit board described in item 2 of the special (4), the pair of connections is a pair of vias or buried holes. 4. The second component as described in claim 1 is a resistor. 5. The circuit board of claim i, wherein the one and the second component are a capacitor. 70 6. Please refer to the circuit board described in item 5 of the patent, wherein the capacitor is an AC coupling capacitor. . 7. If you apply for a patent scope! The circuit board of Lai Shu, wherein the control chip 201008407 is used to generate a high speed signal pair. 8. The power of claim 7 is a high speed differential signal pair. a board for causing the high-speed signal pair 9-type circuit (four) coexistence wiring method to be disposed on a first wiring layer - the following steps: the pair is coupled to a control wafer; the conductive portion 蚜, and the first conductive a second wiring layer is disposed on the second wiring layer, wherein the second conductive portion is opposite to the beta electrical portion and the fourth conductive portion; and the conductive portion is disposed on the second conductive: When the third conductive portion pair is opposite to the first conductive portion and the third conductive portion is disposed, the second conductive portion is paired with the fourth conductive portion and the fourth conductive portion When the electronic device is connected to the electronic device, the third conductive portion is subjected to a coexistence wiring method according to the ninth item of the ninth method, wherein the center 卩疋 passes through a connecting portion pair and the first conductive portion. The pair is coupled. The coexisting wiring method described in the above item, wherein the reverse connection.卩 对 对 对 对 对 对 对 对 对 对 对 对 对 对 对 对 对 对 对 对 对 对The coexistence wiring method of claim 9, wherein the component and the second component are a resistor. The coexistence wiring method according to claim 9, wherein the K-shaped member and the second component are a capacitor. The coexistence wiring method according to claim 13, wherein the capacitor is an AC coupling capacitor. 15. The method of coexistence of horror as described in claim 9 wherein the 15 201008407 control chip is used to generate a high speed signal pair. 16. The method of coexistence wiring according to claim 15, wherein the high speed signal pair is a high speed differential signal pair. 1616
TW97130265A 2008-08-08 2008-08-08 Printed circuit board and coexisting layout method thereof TWI423744B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102686007A (en) * 2011-03-07 2012-09-19 鸿富锦精密工业(深圳)有限公司 Printed circuit board with high speed differential signal wiring structure
TWI479956B (en) * 2010-12-09 2015-04-01 Hon Hai Prec Ind Co Ltd Printed circuit board having high-speed differential signal layout configuration
TWI491331B (en) * 2010-08-05 2015-07-01 鴻海精密工業股份有限公司 Printed circuit board

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6930888B2 (en) * 2002-11-04 2005-08-16 Intel Corporation Mechanism to cross high-speed differential pairs
TWI310668B (en) * 2005-07-29 2009-06-01 Hon Hai Prec Ind Co Ltd Method for matching impedance between difference vias and transmission lines

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI491331B (en) * 2010-08-05 2015-07-01 鴻海精密工業股份有限公司 Printed circuit board
TWI479956B (en) * 2010-12-09 2015-04-01 Hon Hai Prec Ind Co Ltd Printed circuit board having high-speed differential signal layout configuration
CN102686007A (en) * 2011-03-07 2012-09-19 鸿富锦精密工业(深圳)有限公司 Printed circuit board with high speed differential signal wiring structure
CN102686007B (en) * 2011-03-07 2016-12-07 北京百卓网络技术有限公司 There is the printed circuit board (PCB) of high-speed differential signal wiring structure

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