200913814 .九、發明說明： 【發明所屬之技術領域】 本發明係關於一種印刷電路板，尤指一種可降低串音 雜訊及節省佈線空間之印刷電路板。 【先前技術】 串音雜訊係電路板上走線之間、連接線之間，走線與 連接線以及其他電子元件之間由於電磁場干擾而引起之電 磁耦合。習知之印刷電路板佈線方式主要有直角佈線、45 度角佈線、差分佈線、蛇形佈線等。由於差分訊號主要應 用在ifj速電路設計中^所以兩速電路中最關鍵之訊號都採 用差分佈線之方式。j 如圖1所示，為習知一種差分佈線方式之局部佈線 圖，在圖中，訊號層100位於介質層300與介質層400之 間，訊號層200位於介質層400與介質層500之間，介質 層300又位於訊號層100與參考接地層600之間，介質層 500又位於訊號層200與參考接地層700之間，差分對120 之一正相位差分線TX +及一負相位差分線TX-同時在訊號 層100上佈線，另一差分對140之一正相位差分線RX+及 一負相位差分線RX-同時在訊號層100上佈線。該參考接 地層600用於為訊號層100上之差分線TX +及TX-提供電 流回流路徑，該參考接地層700用於為訊號層200上之差 分線RX+及RX-提供電流回流路徑。 但習知差分佈線存在以下之缺陷：每一差分對中之差 分線均佈線在同一訊號層中，該種傳統之佈線方式使得相 鄰兩訊號層中差分對之間不可避免地存在串音雜訊，容易 200913814 造成電路之誤動，從而降低整個I統之性能，這是印刷電 路板佈線應該避免之情形。且傳統佈線方式中之參考接地 層為單獨按層佈線，故佔據了一定之佈線空間。 【發明内容】 鑒於以上内容，有必要提供一種可降低印刷電路板訊 號間串音雜訊之印刷電路板。 一種印刷電路板，包括兩訊號層及一介質層，該介質 層位於該兩訊號層之間，該兩訊號層内具有兩差分對’該 兩差刀對中之正相位差分線位於該兩訊號層中之一訊號層 内，該兩差分對中之負相位差分線位於該兩訊號層中之另 一汛唬層内，該兩差分對之差分線在該兩訊號層内成交錯 式佈線。 相車父習知技術，印刷電路板中之差分對採用該層間交 錯式佈線，可大幅減少差分對間之串音雜訊，有助於改善 戒號傳輸品質、提高整個系統性能。 【實施方式】 °月參考圖2 ’本發明印刷電路板之較佳實施方式包括 一第一訊號層10、一第二訊號層20、一第一介質層3〇、 一第二介質層40及一第三介質層50。該第一訊號層1〇位 於5亥苐一介質層30與第二介質層40之間，該第二訊號層 20位於該第二介質層40與第三介質層50之間。 該第一訊號層10與該第二訊號層20為相鄰之訊號 層’該兩訊號層内具有複數差分對’如差分對12 (包括一 正相位差分線TX+、一負相位差分線TX-)及差分對14(包 括一正相位差分線RX+、一負相位差分線)，其他差 200913814 分對未示出，本實施方式僅以上述兩差分對舉例說明，其 他差分對佈線可類推，這裡不再贅述。 該差分對12之正相位差分線TX+及差分對14之正相 位差分線RX+位於該第一訊號層10内且其兩侧設有參考 接地部16，該差分對12之負相位差分線TX-及差分對14 之負相位差分線RX-位於該第二訊號層20内且其兩侧設 有參考接地部22,該差分對12之差分線TX+、TX-及差分 對14之差分線RX+、RX-在該第一訊號層10及第二訊號 層20内成交錯式佈線，即該差分對12之正相位差分線TX+ 與負相位差分線TX-成對角交錯佈線，差分對14之正相位 差分線RX+與負相位RX-也成對角交錯佈線，並且兩相鄰 差分線間距離相等，亦即差分線TX+與RX+、RX+與TX-、 TX-與RX-、RX-與TX+之間之垂直距離均相等。其中，該 參考接地部16用於為第一訊號層10上之差分線TX+及 RX+提供電流回流路徑，該參考接地部22用於為第二訊號 層20上之差分線TX-及RX-提供電流回流路徑。 設該差分線RX+對TX+之串音係數為K21，差分線 RX+對TX-之串音係數為K24，差分線RX-對TX +之串音 係數為K31，差分線RX-對TX-之串音係數為K34，則該 差分對 12 與差分對 14 之間之串音係數 K=(K21-K24)-(K31-K34)。由於該差分對12之差分線 ΤΧ+、ΤΧ-及差分對14之差分線RX+、RX-在該第一訊號 層10及第二訊號層20内成正方形交錯式佈線，即結構上 對稱，且串音係數與導線距離之平方成反比，則易知， Κ21 = Κ24及Κ31=Κ34,故該差分對12與差分對14之間之 8 200913814 串音係數κ理論上等於零，此時 採用上述層間交錯式佈線方法，1訊達到最小。 之間之串音雜訊，有助於改善訊號傳輪^幅^少差分對 統性能；且該佈線中之參考接地 叩貝，美南整個系 之參考接地層，且爷夹者技& 替之傳統佈線方式中 獨按層佈線，從而大二;=^^ 々 电路板之佈線空間。 ，，不上所述，本發明符合發明專利 利申請。惟，以t斛、十、本段* 友依法提出專 ^ 者為本發明之較佳實施方式，舉 :::嶋之人士 ’在爰依本發明精神所作之等效修 或殳化’ ^應涵蓋於以下之申請專利範圍内。 【圖式簡單說明】 圖1係習知一種印刷電路板之局部佈線圖。 圖2係本發明印刷電路板之較佳實施方式之局部佈線 100、200 差分對 120、140 300、400、500正相位差分線TX+、RX+ 【主要元件符號說明】 [習知] 訊號層 介質層 參考接地層600、700 [本發明] 第—訊號層 10 參考接地部 16、22 第—介質層 30 負相位差分線TX-、RX- 差分對 12、14 第二訊號層 20 第二介質層 40 200913814 RX + 第三介質層 50 正相位差分線TX + 負相位差分線TX-、RX- 10200913814. VENTURE DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a printed circuit board, and more particularly to a printed circuit board capable of reducing crosstalk noise and saving wiring space. [Prior Art] The electromagnetic coupling between the traces of the crosstalk noise on the circuit board, between the connection lines, between the traces and the connection lines, and other electronic components due to electromagnetic field interference. Conventional printed circuit board wiring methods mainly include right angle wiring, 45 degree angle wiring, differential wiring, serpent wiring, and the like. Since the differential signal is mainly used in the ifj speed circuit design, the most critical signal in the two-speed circuit uses differential wiring. As shown in FIG. 1 , a partial wiring diagram of a differential wiring method is known. In the figure, the signal layer 100 is located between the dielectric layer 300 and the dielectric layer 400 , and the signal layer 200 is located between the dielectric layer 400 and the dielectric layer 500 . The dielectric layer 300 is located between the signal layer 100 and the reference ground layer 600. The dielectric layer 500 is located between the signal layer 200 and the reference ground layer 700. The differential pair 120 has a positive phase difference line TX+ and a negative phase difference line. TX- is simultaneously wired on the signal layer 100, and one of the differential pair 140, a positive phase difference line RX+ and a negative phase difference line RX-, is simultaneously routed on the signal layer 100. The reference ground plane 600 is used to provide a current return path for the differential lines TX+ and TX- on the signal layer 100. The reference ground plane 700 is used to provide a current return path for the differential lines RX+ and RX- on the signal layer 200. However, the conventional differential wiring has the following drawbacks: the differential lines in each differential pair are wired in the same signal layer. This conventional wiring method inevitably causes crosstalk between differential pairs in adjacent two signal layers. News, easy 200913814 caused the circuit to be mis-actuated, thereby reducing the performance of the entire system, which is the case that printed circuit board wiring should be avoided. Moreover, the reference ground plane in the conventional wiring method is separately layer-by-layer wiring, so it occupies a certain wiring space. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide a printed circuit board that can reduce crosstalk noise between printed circuit board signals. A printed circuit board includes two signal layers and a dielectric layer. The dielectric layer is located between the two signal layers. The two signal layers have two differential pairs. The positive phase difference lines of the two differential knife pairs are located on the two signals. In one of the signal layers of the layer, the negative phase difference line of the two differential pairs is located in another layer of the two signal layers, and the difference lines of the two differential pairs are staggered in the two signal layers. According to the familiar technology of the parent, the differential pair in the printed circuit board adopts the interleaved wiring, which can greatly reduce the crosstalk between the differential pairs, which can improve the transmission quality of the ring and improve the performance of the whole system. [Embodiment] Referring to FIG. 2, a preferred embodiment of the printed circuit board of the present invention includes a first signal layer 10, a second signal layer 20, a first dielectric layer 3A, a second dielectric layer 40, and A third dielectric layer 50. The first signal layer 1 is disposed between the dielectric layer 30 and the second dielectric layer 40, and the second signal layer 20 is located between the second dielectric layer 40 and the third dielectric layer 50. The first signal layer 10 and the second signal layer 20 are adjacent signal layers. The two signal layers have a complex differential pair, such as a differential pair 12 (including a positive phase difference line TX+ and a negative phase difference line TX-). And differential pair 14 (including a positive phase difference line RX+, a negative phase difference line), other differences 200913814 are not shown, this embodiment only illustrates the above two differential pairs, other differential pairs of wiring can be analogized, here No longer. The positive phase difference line TX+ of the differential pair 12 and the positive phase difference line RX+ of the differential pair 14 are located in the first signal layer 10 and are provided with reference ground portions 16 on both sides thereof, and the negative phase difference line TX- of the differential pair 12 And the negative phase difference line RX- of the differential pair 14 is located in the second signal layer 20 and is provided with a reference ground portion 22 on both sides thereof, the differential line TX+, TX- of the differential pair 12 and the difference line RX+ of the differential pair 14 RX-interleaved wiring in the first signal layer 10 and the second signal layer 20, that is, the positive phase difference line TX+ of the differential pair 12 and the negative phase difference line TX- are diagonally staggered, and the differential pair 14 is positive The phase difference line RX+ and the negative phase RX- are also diagonally staggered, and the distance between two adjacent differential lines is equal, that is, the differential lines TX+ and RX+, RX+ and TX-, TX- and RX-, RX- and TX+ The vertical distance between the two is equal. The reference ground portion 16 is configured to provide a current return path for the differential lines TX+ and RX+ on the first signal layer 10, and the reference ground portion 22 is configured to provide the differential lines TX- and RX- on the second signal layer 20. Current return path. It is assumed that the crosstalk coefficient of the differential line RX+ to TX+ is K21, the crosstalk coefficient of the differential line RX+ to TX- is K24, the crosstalk coefficient of the differential line RX-to TX+ is K31, and the differential line RX-pair to TX- The pitch coefficient is K34, and the crosstalk coefficient K=(K21-K24)-(K31-K34) between the differential pair 12 and the differential pair 14. The differential lines RX+, RX- of the differential pair ΤΧ+, ΤΧ- and the differential pair 14 of the differential pair 12 are square-interleaved in the first signal layer 10 and the second signal layer 20, that is, structurally symmetric, and The crosstalk coefficient is inversely proportional to the square of the wire distance. It is easy to know that Κ21 = Κ24 and Κ31=Κ34, so the difference between the differential pair 12 and the differential pair 14 200913814 The crosstalk coefficient κ is theoretically equal to zero. Interleaved wiring method, 1 signal is minimized. The crosstalk noise between the two helps to improve the performance of the signal transmission wheel and the lower differential system; and the reference grounding mussel in the wiring, the grounding layer of the whole system of the South America, and the master clip technology & In the traditional wiring method, the layer wiring is used alone, so that the second is the second place; =^^ 布线 the wiring space of the circuit board. The invention is in accordance with the invention patent application. However, the best practice of the invention is based on t斛, 十, and this paragraph*, and the following is the preferred embodiment of the invention: It should be covered by the following patent application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a partial wiring diagram of a printed circuit board. 2 is a partial wiring 100, 200 of a preferred embodiment of the printed circuit board of the present invention. Differential pair 120, 140 300, 400, 500 positive phase difference lines TX+, RX+ [Description of main component symbols] [Authentic] Signal layer dielectric layer Reference ground layer 600, 700 [Invention] Signal layer 10 Reference ground portion 16, 22 First dielectric layer 30 Negative phase difference line TX-, RX- Differential pair 12, 14 Second signal layer 20 Second dielectric layer 40 200913814 RX + Third dielectric layer 50 Positive phase difference line TX + Negative phase difference line TX-, RX- 10