TW200409211A - Retrograde channel doping to improve short channel effect - Google Patents

Abstract

A memory semiconductor cell (30) comprises a gate region (16), a source region (14) and a drain region (14). A channel region (17) is formed between the source region (14) and the drain region (14). The channel region (17) comprises a first channel portion (33) with a first concentration of doping material, the first channel portion (33) disposed adjacent to an edge of the channel region (17) closest to and substantially parallel to the gate region (16). The channel region (17) further comprises a second channel portion (31) with a second concentration of doping material, the second channel portion (31) disposed substantially parallel to the first channel portion (33) and a third channel portion (32), disposed between the first channel portion (33) and the second channel portion (31), with a third concentration of doping material. The third concentration is lower than the first concentration and lower than the second concentration.

Description

200409211 Description of the invention [Technical field to which the invention belongs] The specific embodiment of the present invention relates to the design of sub-micron metal oxide semiconductors. A specific embodiment of the present invention more particularly provides a retrograde channel doping method for improving short channel effects. [Prior art] Figure 1 shows in the conventional technique ▼ — "Heart ΔDan y 10 ° region 14 is the drain and / or source region of the memory unit 10. They can be used interchangeably as the source and / Or drain. The control gate 16 is used to control the operation of the memory cell 10. The channel region 17 is formed between the source / drain region 1 4. The minimum structure size! 8 is the smallest that can be produced by a specific semiconductor process. The rated size of the structure. In this type of memory unit, the width of the closed pole 16 and the length of the channel 17 roughly correspond to the minimum structure size 18. The memory unit 1G may also have a source / no pole delay ^ District 11, structure. The source 7 drain extension area η is a shallow connection between the channel 17 and the source / drain 14, which has been extended for a long time. It is basically intended to avoid driving current. Falling. Π > Help) In the two general types of non-volatile memory gate units, the gate stacks are basically 1; The layer 12 uses the i2c system as an isolation, or, floating, and it is interesting to call the gate of the moving gate of the moving gate. 〉 Yujianjian; Flash memory based on gasification… has a fulcrum x 1 compared to flash memory based on its floating pole, 92399 200409211 tunnel oxide. In terms of the number of units per unit area that Wanyou can use, the density of oxides—nitrides, oxides—silicon (SONOS) in a year may be very high, and it ’s better to know that compared to floating

Interrogation memory will require fewer process steps. What's more, it can be easily integrated with the standard SRAM (static random access memory) process technology. A further advantage of using SONOS devices is that they are suitable for applications requiring large temperature changes and radiation hardening. The S0N0S stacking system is-a kind of leisure dielectric = quality = Feng ', which is composed of a single layer of polycrystalline stone, triple stacking 0N〇 (oxide_nitride_oxide) gate dielectric layer and MOS (metal oxide Semiconductor) channel 17. The ONO structure may consist of a tunnel oxide 12A, a nitride memory storage layer 12B, and an oxide barrier layer 12C. Memory device manufacturers are constantly challenging to provide a larger amount of memory at a lower cost. At present, Advanced Miei.Q Devid Incorporated of California has introduced a flash ROM (read-only memory) based on MIRROR BITTM nitride. The ROM will be memory that is separated by 2% by mass. The unit 10 stores a plurality of bits in the nitride layer 12B. This storage of multiple bits per unit increases the storage density of the memory device, thereby reducing the cost per storage bit. Another major method used to achieve lower memory costs is the industry-wide continuous reduction in semiconductor structure size. By making structures such as signal lines and electrical cells smaller, more memory devices may be placed in a specific chip area, which results in lower manufacturing costs. However, when the structure size is reduced to, for example, about 0.3 micrometers and smaller, the channel length also decreases. When the channel length grows short, the threshold of 92399 200409211 will be reduced, and the leakage current will increase. This effect is similar to the following: in semiconductor technology, it is called the short-channel effect. Since the flash memory has the ability to retain information in the moon state of force, it should be fast

Memories have established a wide range of connections in very low power applications such as Feng A and DU mobile phones, and the increase in leakage current can be annoying in flash memory. The increase in leakage current may be equal to 0 ”s — setting up a job and using the flash memory card :: / ground affects the flash memory device, and the total power consumption of the product. As a result, many things have been done in the past Developed to minimize this short-channel effect. = Improving leakage current and reducing short-channel effects include, for example, halo-type, doped and inverse-increasing concentration wells: Show 'moon-type dopant 2. In the source / The edge of the drain region:: The characteristic curve of the dopant. The conventional, "... produced ± steep miscellaneous sound 1. The curvature of the concentration-type well has a non-uniform doping degree." The general increase is consistent. The habit of reversing the ten ice life 4. The ice degree 22 of T and the linearity increase without sudden = change: H | will produce a continuous, single well basically by using two inches \ curve. The conventional inverse-increasing concentration becomes the #Extended Species_% g in the PC device, and it can be used for observation, for example, using the characteristics of the heterogeneous and inverse-increasing concentration wells. Increasing the threshold voltage of the device and reducing the carrier flow Everyone finds that there is something missing. This conventional technology has the following meaning: Reduce the leakage current to the modern process (the process will not be smaller) and the flash memory is commercially accessible = if the semiconductor process equipment is extremely expensive. Basic The semiconductor process steps, 92399 200409211 cases, basically require long-term R & D and large-scale performance testing. Any solution to the short-channel effect should be done in the same way as existing tools and technologies without the need to retrofit. Semiconductor processes and equipment are compatible. Therefore, it is necessary to avoid the short-channel effect in the memory unit. Further steps need to be compatible with the conventional methods and use each other: to avoid the short-channel effect, In order to minimize the short-channel effect. In order to meet the needs of the above-mentioned j ', we will use the existing semiconductor processes and equipment to "pass on", and the well-structured tools and technologies will be transformed without f. [Summary of the Invention]: A specific embodiment is provided in the memory unit to avoid short-circuiting ==. A further embodiment of the present invention is to avoid the occurrence of the short-channel effect in a manner to be used with the existing party, so as to reduce ==. Further specific embodiments of the present invention are provided, which are paid by the existing semiconductor manufacturing process and damage, without the need to modify the umbrella

& Wood Framed Tools and Techniques. A memory semiconductor cell package-the drain region. _, 甬, # 甲 ’极 £ 域,-between the source area and the domain.哕, 二, and 、 are formed in the source region and the drain region, and the second part contains the first-passive material with the first-degree inert material. The sting is adjacent to the closest channel to the toilet. The edge of the region ... The tenth: Doping region of the second concentration dopant in the gate region, the step further includes the second channel in the second channel portion: the second portion is configured to be substantially flat. The first channel part and the second channel 1 pass the finger to configure the doping material. Between the first knife, it has a third concentration of less than the first concentration and less than the second concentration. 92399 200409211 [Embodiment] In the following detailed description of the inversely increasing concentration channel doping of the present invention to improve the short channel effect, various specific details will be explained to provide a complete understanding of the invention. However, those skilled in the art will understand that The invention can be implemented with: these specific details or their equivalents. In the other two cases, 'known methods, steps, components and circuits will not be described in detail, so as not to unnecessarily obscure aspects of the invention. Specific embodiments of the present invention will be explained In the following design and operation of the flash memory device. In any case, the specific embodiments of the present invention can be used for: the sub-design and operation of the m can be understood: Figure 2 illustrates according to this The embodiment of the invention is designed to increase the concentration of the memory cell 30. The channel area contains 31, 32 and ~ channel portion 33 closest to the gate 16 and the long axis of the real pole 16. Channel portion 3 2 The real part of the shellfish is part 33, and the depth of 1 in the substrate material is flatter than the channel eight. /, A ,, μ \, 丨 knows the ice. Through this part 31 through the real force part 32, and its depth in the substrate material is deeper. The tunnel section 32 is arranged in the channel sections 31 and 3. The second unit is, the memory unit 3〇 # shows ^ Wang Wu's mushroom-shaped implantation area 20. 本The presenter of the invention, / household 'known examples are extremely suitable for memory with or without indeterminate structure, which has a single structure, which is unique, or not the same: channel sections 31, 32, and 33 Will extend horizontally to ... implant or source / drain extension or source / immortal. From the well-known semiconducting Body 1 Γ, # Heart technology, such as implantation and expansion, heart construction channel part 33 and 4 ′ and doping material of the same degree. Similarly, on the ground of 99299 200409211, you can build the channel part 31 and produce ... Qu Da did not implement any doping materials with a high concentration. To be more precise, the channel part is: to create the channel part 32, which is the bottom, and the channel part 31 is · 1 // m. This distance from the top edge of the substrate can be established according to a specific embodiment of the present invention.

33: The doping concentration in both is higher than the channel portion; :: part 3; Xiao channel portion Figure 40 of the figure illustrates the doping concentration in Tong 2. Number 3 exemplary characteristic curve 41. Channel Doping concentration described by characteristic curve 41. In the region 3 3 A, the characteristic curve 41 in the region 32A may be obtained from the characteristic curve 41. Part 31 may have the degree of heterogeneity in the field 31A. Channel section concentration. It is understandable that the doping described in characteristic curve 41 is

According to a specific embodiment of the present invention, s, s-type wells,

^ The characteristic curve of this new well is neither I. Weeks don't-must have continuity. In the channel, it is between early and 32, and in the channel part 3 ...: If the channel characteristic curve is abrupt, it may be quite abrupt (1: Youfeng, the doping in the world changes. / 、 7 、 由 + ¥ In the static tr parts 31 and 33, the charge migration will be hindered due to the relatively high concentration of the second and third materials. As a result, the effective channel area is reduced to the channel portion 32. For example, the channel section 32 may be cleared from the channel section). Because of the advantage of narrowing the effective channel, the wide quantum follow-up effect is mixed with π, ', and the mouth fruit, so the threshold voltage will increase by 92399 ZUU4U ^ Z11 plus, and the leakage current will be reduced to understand f, 丨 ^ B / 乂 or eliminate short channel effects. Can be changed according to a wide range of variables = degree, thickness and impurity concentration channel length, operating voltage, noise: for example, including source thickness-channel N " Moreover, the device is based on P channel Come or not. The passage portion 31 can be combined τξτ,-

^ PMOS shovel at the middle of the wire or wire). This diffusive material can reach the required depth of the tract / thickness 33, which can be quickly used. Shorter diffusion may produce high and μ at relatively shallow depths in the impurity-doped material / channel area where the impurity concentration (such as Shi Peng) is placed, and the second image, the fourth image and the fourth image The figure further shows the carriers in the channel area designed to flow through the memory according to the invention 2. In Figure 4A, the charge carriers of your mouth, such as electron 403, try to move from the% pole / And pole region 4 〇1 flow to ,, @ 纟 源 ^] / ordinary, pole / and pole region 402. High concentration of dopants will prevent electrons from flowing into the electrode 33, and similarly, high The concentration of doped rhenium prevents the electron 405 from flowing into the channel portion 31. On the contrary, the electron can overcome a relatively small energy barrier and flow into the channel portion M. For example, 6ϊγ Jr »ra 'in Figure 4B, use another method The electrons 403 configured to travel horizontally (such as in the field of 4 fields) into the communication area 33 must change their direction ^ around the corners of the passage area 33, and travel in order to enter the passage area; ::: In the region 32, the electrons are enough to flow. Phases M are capable of advancing in the real f 4 k. This change of direction requires energy The amount of energy to cause a comparison-2 to give the electron to cross the-complex path. In addition, because of the region: 92399 200409211 requires additional energy to move the zigzag characteristics of the charge carrier from the region 'The present invention is full of charge carriers ( (E.g., electrons 404 and 405), so the demand is to overcome the electrostatic repulsion of the same charge, so that the electrical ground can be brought closer together. Due to the beneficial effect of increasing the path length, the path, and electrostatic repulsion, the electron 403 needs More domains 401 travel to 4G2 'and the specific embodiment advantageously has a higher threshold voltage when compared to the prior art.

Electrically repel so that they are adjacent to the channel portion η. And overcome the static passage section 32. Girl fruit, +, knife position and travel to,, and Wohe, the electron is 405 and needs a higher threshold voltage. S ^ In this case, when it is arranged adjacent to the channel portion M, the electron 4 is affected by the present invention, and every 4 is also favorably affected by the embodiment. Respectfully change the direction to avoid the '', the electric pass will not be noticeable ~ Tan / Chen Du's chanting f 4 04 will be subject to the local increase in concentration ^, but the electronic force is similar to the electrostatic force applied to the electron 4 ° 7 affects and causes static electricity on the 404. And 405 are used to apply electricity to the battery. It indicates that according to the present invention, the carrier flows in the inversely increasing concentration channel of the cumulative second "example. The charge carriers cannot flow in the channel portion 33 and 3 = ^ Effect. The electric part 32 in the region 401. However, it can flow in the channel ι from 1. However, 32 cups of the transport part ^ The force is applied to the same charge carrier, so ♦ β β shrinkage characteristics Combining static 4 0 and channel part 3? The writing tends to be, clustered, and the regional effect is seen as a reduction in threshold 2. Wang Xijia and the corresponding leakage current 92599 12 200409211 It is understood that although the PMOS device has been described ^, the specific embodiments of the present invention are equally suitable for NMOS devices. The NMOS device materials used, such as dopants, are The system can be fully understood in semiconductor technology. This new design and the method of implementing this design reduce and / or eliminate an LC reactor, making it possible to reduce the fine structure size and increase the memory single-mount. These favorable results Enables lower power consumption Inexpensive memory devices so that users implementing the embodiments of the present invention can have a competitive advantage. The specific embodiments of the present invention provide a method to avoid the button channel effect in the memory unit. This A further specific embodiment of the invention is to produce a short-channel effect in a manner compatible with existing methods and to mutually utilize to minimize the short-channel effect. Still further specific embodiments of the present invention are provided as the above-mentioned solution, which is The existing semiconductor processes and devices are used to obtain 'tools and technologies that do not need to be reconstructed and constructed. The preferred embodiments of the present invention are described above, and the inversely increasing concentration channel doping for improving the short channel effect is described. Although the present invention has been Specific specific households and examples are used for explanation, but it should be understood that the present invention should not be limited to these specific embodiments, but can be explained more precisely according to the scope of patent application below. [Schematic description of the drawings] Fig. 1 shows a memory unit which is well-known in the prior art. Fig. 2 shows a memory unit not designed according to a specific embodiment of the present invention. Memory unit with inverse-increasing concentration channel. 92399 200409211 The figure does not show the doping concentration in the design domain and the channel's deep production μ _ yongyi of the design domain according to the specific example of ^ hit ^ ^ Xinming. Anomalous characteristic curves. Figures 4A and 4B. 篦 ρ 仏 ^ //, 罘 4C shows the charge carriers flowing through the memory designed according to the specific examples of the present invention, and the early-forced region. .

10 Memory cell 12A Tunnel oxide 12C Oxide barrier 16 Control gate 18 Minimum structure size 30 Memory cell 31A, 32A, 33A Area 401 11 12B 14 17 20 3 41 41 32 Source / drain extension area floating gate Electrode source / drain region, channel halo doping, 33 channel partial normal characteristic curve 402 source /; and electrode regions 403, 404, 4.0

92399 14

Claims (1)

200409211 Scope of patent application: 1. A method of manufacturing a memory semiconductor unit (30), including forming a first channel portion (33) to generate a first concentration of doped material, the first channel portion (; 33) adjacent to a channel region closest to and substantially parallel to an edge of the / gate region (16) of the memory semiconductor unit; forming a second channel portion (3 1) to generate a second concentration of Doping material 'the second portion (3 1) is arranged substantially parallel to the first channel portion (33); and between π and the second channel portion (3 1), the third channel portion ( 32) A doping material comprising a third concentration, wherein the third concentration is lower than the second concentration. / Another 2. The method according to item 1 of the scope of patent application, further comprising implanting a halo 'body. 乂) The military implant (20) is arranged adjacent to the memory for half a month and 7L (3) Source or drain regions. 3 · If the scope of the patent application is No. 丨 the memory semi-conductor ^ single Kaixi, / Yuedouzaowu (30), of which ⑴). " The source region includes a source extension region 4 · As in the patent application scope-channel part (two two methods, the further step includes forming the 5th such as application 4 Γ) j 'to form the second Channel section ⑴). Yuan (30) is non-volatile. , "Memory semiconductor sheet 6. As the method of the scope of application for the fifth item of the patent, ... Membrane body unit (30) 92399] 5 200409211 contains a nitride layer as a storage element (12B). 7 · For example, the method of claim 5 in the patent application range, wherein the memory semiconductor unit includes a floating gate (12B) as a storage element. 8. A memory semiconductor unit (30) including: a gate region (16), A source region (I4) and a drain region (14); The channel region (1 7) is located between the source region (1 4) and the non-polar region (1 4); wherein the channel region (17) includes: ^ -the channel portion (33) 'includes the first Concentration of doped material, the first channel portion (33) is nearest to the channel region (17) and is arranged substantially parallel to an edge of the gate region (16); ^ the second channel portion (31 ), Containing a second concentration of dopant material, the second portion (31) is substantially parallel to the first channel portion (33) and the ground channel portion (32) the second channel portion (31), the third channel portion (32) contains a second concentration of dopant material, wherein the third concentration is lower than the first concentration and lower than the second concentration. You Xia 9. If the memory semiconductor unit of item 8 of the scope of the patent application, i φ,,,, 〃, and 哀 逞 逞 (哀) area (17) further includes a halo implant (2), configured to be adjacent to the The source region (] 4) or the drain region (1 4). 10. If the memory semiconductor unit according to item 8 of the patent application scope, the source-seat region (] 7) contains the source extension region (]]). 92399 16