RU2008135624A

RU2008135624A - FAST-OPERATING OPERATIONAL AMPLIFIER BASED ON "OVER" CASCODE

Info

Publication number: RU2008135624A
Application number: RU2008135624/09A
Authority: RU
Inventors: Николай Николаевич Прокопенко (RU); Николай Николаевич Прокопенко; Алексей Сергеевич Будяков (RU); Алексей Сергеевич Будяков; Александр Игоревич Серебряков (RU); Александр Игоревич Серебряков
Priority date: 2008-09-02
Filing date: 2008-09-02
Publication date: 2010-03-10
Also published as: RU2391768C2

Abstract

Быстродействующий операционный усилитель на основе «перегнутого» каскода, содержащий входной каскад (1) с расширенным диапазоном активной работы, промежуточный каскад на первом (2) и втором (3) выходных транзисторах, базы которых объединены, а эмиттеры соединены с шиной источника питания (4) через первый (5) и второй (6) низкоомные резисторы и подключены к выходам (7) и (8) входного каскада с расширенным диапазоном активной работы (1), выходной буферный каскад (9), вход которого соединен с корректирующим конденсатором (10), выходом (11) токового зеркала (12) и коллектором второго (3) выходного транзистора промежуточного каскада, причем вход (13) токового зеркала (12) подключен к коллектору первого (2) выходного транзистора промежуточного каскада, отличающийся тем, что в схему введены первый (14) и второй (15) дополнительные транзисторы, базы которых соединены с эмиттером первого (2) выходного транзистора промежуточного каскада, третий (16) и четвертый (17) дополнительные транзисторы, базы которых соединены с эмиттером второго (3) выходного транзистора промежуточного каскада, причем коллекторы второго (15) и третьего (16) дополнительных транзисторов соединены с базами первого (2) и второго (3) выходных транзисторов промежуточного каскада и подключены к дополнительному двухполюснику (18), коллектор первого (14) дополнительного транзистора соединен с коллектором второго (3) выходного транзистора промежуточного каскада, коллектор четвертого (17) дополнительного транзистора соединен с выходом (11) токового зеркала (12), а эмиттеры всех дополнительных транзисторов (14, 15, 16, 17) связаны с шиной источника питания (4).A high-speed operational amplifier based on a “bent” cascode containing an input stage (1) with an extended range of active operation, an intermediate stage on the first (2) and second (3) output transistors, the bases of which are combined, and the emitters are connected to the power supply bus (4 ) through the first (5) and second (6) low-resistance resistors and connected to the outputs (7) and (8) of the input stage with an extended range of active operation (1), the output buffer stage (9), the input of which is connected to the correction capacitor (10 ), output (11) of the current mirror (12) and the collector of the second (3) output transistor of the intermediate stage, and the input (13) of the current mirror (12) is connected to the collector of the first (2) output transistor of the intermediate stage, characterized in that the first (14) and second ( 15) additional transistors, the bases of which are connected to the emitter of the first (2) output transistor of the intermediate stage, the third (16) and fourth (17) additional transistors, whose bases are connected to the emitter of the second (3) output transistor of the intermediate stage, and the collectors of the second (15) and the third (16) additional transistors are connected to the bases of the first (2) and second (3) output transistors of the intermediate stage and are connected to the additional two-terminal device (18), the collector of the first (14) additional transistor is connected to the collector of the second (3) output the transistor of the intermediate stage, the collector of the fourth (17) additional transistor is connected to the output (11) of the current mirror (12), and the emitters of all additional transistors (14, 15, 16, 17) are connected to the bus of the power source (4).

Claims

A high-speed operational amplifier based on a “bent” cascode containing an input stage (1) with an extended range of active operation, an intermediate stage on the first (2) and second (3) output transistors, the bases of which are combined, and the emitters are connected to the power supply bus (4 ) through the first (5) and second (6) low-resistance resistors and connected to the outputs (7) and (8) of the input stage with an extended range of active operation (1), the output buffer stage (9), the input of which is connected to the correction capacitor (10 ), output (11) of the current mirror (12) and the collector of the second (3) output transistor of the intermediate stage, and the input (13) of the current mirror (12) is connected to the collector of the first (2) output transistor of the intermediate stage, characterized in that the first (14) and second ( 15) additional transistors, the bases of which are connected to the emitter of the first (2) output transistor of the intermediate stage, the third (16) and fourth (17) additional transistors, whose bases are connected to the emitter of the second (3) output transistor of the intermediate stage, and the collectors of the second (15) and the third (16) additional transistors are connected to the bases of the first (2) and second (3) output transistors of the intermediate stage and are connected to the additional two-terminal device (18), the collector of the first (14) additional transistor is connected to the collector of the second (3) output the transistor of the intermediate stage, the collector of the fourth (17) additional transistor is connected to the output (11) of the current mirror (12), and the emitters of all additional transistors (14, 15, 16, 17) are connected to the bus of the power source (4).