KR900005860A - 다층 인쇄된 배선반의 제조방법 - Google Patents
다층 인쇄된 배선반의 제조방법 Download PDFInfo
- Publication number
- KR900005860A KR900005860A KR1019890012890A KR890012890A KR900005860A KR 900005860 A KR900005860 A KR 900005860A KR 1019890012890 A KR1019890012890 A KR 1019890012890A KR 890012890 A KR890012890 A KR 890012890A KR 900005860 A KR900005860 A KR 900005860A
- Authority
- KR
- South Korea
- Prior art keywords
- aqueous solution
- manufacturing
- wiring board
- concentration
- reducing agent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/385—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by conversion of the surface of the metal, e.g. by oxidation, whether or not followed by reaction or removal of the converted layer
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C22/00—Chemical surface treatment of metallic material by reaction of the surface with a reactive liquid, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
- C23C22/05—Chemical surface treatment of metallic material by reaction of the surface with a reactive liquid, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using aqueous solutions
- C23C22/60—Chemical surface treatment of metallic material by reaction of the surface with a reactive liquid, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using aqueous solutions using alkaline aqueous solutions with pH greater than 8
- C23C22/63—Treatment of copper or alloys based thereon
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0315—Oxidising metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1157—Using means for chemical reduction
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
Claims (5)
- 내층의 구리 표면이 화학적으로 산화되어, 브라운 또는 흑색의, 산화된 구리 표면을 내층판 상에 형성시키고 ; 상기 내층판의 산화된 구리 표면을, 진크 포름알데히드 술폭실레이트 및 하이포아인산나트륨으로 구성되는 군으로부터 선택된 최소한 한 물질을 함유하는 환원제의 산성 수용액으로 처리함을 특징으로 하는 다층 인쇄된 배선반의 제조방법.
- 제1항에 있어서, 환원제의 산성 수용액의 진크 포름알데히드 술폭실레이트 농도가 5~30g/1이고, pH가 1 이상 7 이하이고, 40~80℃의 온도에서 0.5~5분간 처리하는 다층 인쇄된 배선반의 제조방법.
- 제1항에 있어서, 환원제의 산성 수용액의 하이포아인산나트륨의 농도가 5~300g/1이고, pH가 1 이상 7 이하이고, 40~80℃의 온도에서 0.5~5분간 처리하는 다층 인쇄된 배선반의 제조방법.
- 제1항에 있어서, 환원제의 산성 수용액이 하이포아인산나트륨 및 유기 또는 무기산의 구리염 중 최소한 하나를 함유하는 다층 인쇄된 배선반의 제조방법.
- 제4항에 있어서, 수용액의 하이포아인산 나트륨의 농도가 5~300g/1이고, 유기 또는 무기산의 구리염의 농도가 0.1~200g/1이고, pH가 1 이상 7 이하이고, 40~80℃의 온도에서 0.5~5분간 처리하는 다층 인쇄된 배선반의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63221373A JPH0271586A (ja) | 1988-09-06 | 1988-09-06 | 多層プリント板の製造法 |
| JP63221374A JPH0271587A (ja) | 1988-09-06 | 1988-09-06 | 多層プリント板の製造法 |
| JP63-221374 | 1988-09-06 | ||
| JP63-221373 | 1988-09-06 | ||
| JP63282364A JPH02129996A (ja) | 1988-11-10 | 1988-11-10 | 多層プリント板の製造法 |
| JP63-282364 | 1988-11-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR900005860A true KR900005860A (ko) | 1990-04-14 |
| KR970004029B1 KR970004029B1 (ko) | 1997-03-24 |
Family
ID=27330542
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019890012890A Expired - Fee Related KR970004029B1 (ko) | 1988-09-06 | 1989-09-06 | 다층 인쇄된 배선반의 제조방법 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5076864A (ko) |
| EP (1) | EP0358480B1 (ko) |
| KR (1) | KR970004029B1 (ko) |
| DE (1) | DE68920383T2 (ko) |
| MY (1) | MY104191A (ko) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69122573T2 (de) * | 1990-07-30 | 1997-03-13 | Mitsubishi Gas Chemical Co | Verfahren zur Herstellung von Mehrschichtplatinen |
| EP0488299B1 (en) * | 1990-11-30 | 1995-08-16 | Toppan Printing Co., Ltd. | Method of manufacturing a multi-layered wiring board |
| US5289630A (en) * | 1991-07-22 | 1994-03-01 | Macdermid, Incorporated | Process for fabricating multilayer printed circuits |
| US5286530A (en) * | 1993-01-13 | 1994-02-15 | General Electric Company | Method for providing adherent metal coatings on cyanate ester polymer surfaces |
| JP2694802B2 (ja) * | 1993-12-28 | 1997-12-24 | 日本電気株式会社 | プリント配線板の製造方法 |
| KR100633678B1 (ko) | 1998-02-26 | 2006-10-11 | 이비덴 가부시키가이샤 | 필드 바이어 구조를 갖는 다층프린트 배선판 |
| US6294220B1 (en) | 1999-06-30 | 2001-09-25 | Alpha Metals, Inc. | Post-treatment for copper on printed circuit boards |
| JP3067021B2 (ja) * | 1998-09-18 | 2000-07-17 | インターナショナル・ビジネス・マシーンズ・コーポレ−ション | 両面配線基板の製造方法 |
| JP4287622B2 (ja) * | 2002-06-28 | 2009-07-01 | デュポン帝人アドバンスドペーパー株式会社 | コーティングセパレータ、その製造方法およびそれを用いた電気電子部品 |
| US6986023B2 (en) * | 2002-08-09 | 2006-01-10 | Intel Corporation | Conditional execution of coprocessor instruction based on main processor arithmetic flags |
| TW573327B (en) * | 2002-12-27 | 2004-01-21 | Ultratera Corp | Plasma etching method |
| JP4784066B2 (ja) * | 2004-10-28 | 2011-09-28 | 三菱瓦斯化学株式会社 | 樹脂組成物及び銅張積層板 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61176192A (ja) * | 1985-01-31 | 1986-08-07 | 株式会社日立製作所 | 銅と樹脂との接着方法 |
| US4717439A (en) * | 1985-10-24 | 1988-01-05 | Enthone, Incorporated | Process for the treatment of copper oxide in the preparation of printed circuit boards |
| US4775444A (en) * | 1987-08-26 | 1988-10-04 | Macdermid, Incorporated | Process for fabricating multilayer circuit boards |
-
1989
- 1989-09-05 MY MYPI89001201A patent/MY104191A/en unknown
- 1989-09-06 DE DE68920383T patent/DE68920383T2/de not_active Expired - Fee Related
- 1989-09-06 EP EP89309018A patent/EP0358480B1/en not_active Expired - Lifetime
- 1989-09-06 KR KR1019890012890A patent/KR970004029B1/ko not_active Expired - Fee Related
- 1989-09-06 US US07/403,519 patent/US5076864A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE68920383D1 (de) | 1995-02-16 |
| EP0358480A2 (en) | 1990-03-14 |
| KR970004029B1 (ko) | 1997-03-24 |
| US5076864A (en) | 1991-12-31 |
| DE68920383T2 (de) | 1995-06-01 |
| EP0358480B1 (en) | 1995-01-04 |
| MY104191A (en) | 1994-02-28 |
| EP0358480A3 (en) | 1991-04-10 |
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