JP2019062064A - Circuit board, electronic apparatus, and manufacturing method of circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a circuit board capable of thinning the entire substrate and capable of high-density wiring, an electronic device provided with the circuit board, and a method for manufacturing the circuit board. SOLUTION: A substrate 1 having a wiring pattern 8 on its surface, a chip component 4 arranged on the wiring pattern 8, a sealing material 9 for covering and protecting the chip component 4, and a chip in the wiring pattern 8. It is provided around the pattern region E in which the component 4 is arranged, and includes a damming groove 10 for preventing the sealing material 9 from flowing out. Therefore, the chip component 4 can be reliably and satisfactorily covered by the sealing material 9, and the outflow of the sealing material 9 to the outside of the pattern region E is prevented by the surface tension of the sealing material 9 at the edge of the blocking groove 10. Can be dammed up with. Therefore, the thickness of the entire substrate can be reduced, and the wiring density of the wiring pattern 8 can be increased. [Selection diagram] Fig. 3

Description

  The present invention relates to a circuit board used in an electronic device such as a watch, an electronic device provided with the circuit board, and a method of manufacturing the circuit board.

  For example, in a circuit board to be incorporated in an electronic device, as described in Patent Document 1, a wiring pattern is formed on the substrate, and a chip component such as a semiconductor element is mounted on the wiring pattern. The thing of the structure which was molded with the sealing material is known.

JP, 2012-19082, A

  In such a circuit board, a dam portion is formed by potting an insulating material such as glass paste on the outer periphery of the pattern region on which the chip component is mounted in order to prevent the sealing material for molding the chip component from flowing out to the periphery doing.

  However, in such a circuit board, since the dam portion must be raised and formed higher than the sealing material on the outer periphery of the pattern area on which the chip component is mounted, there is a problem that the entire board becomes thick. Since the area of the entire sealing region is increased by the dam portion, there is a problem that the wiring pattern can not be wired at a high density on the substrate.

  The problem to be solved by the present invention is to provide a circuit board capable of reducing the thickness of the entire substrate and enabling high-density wiring, an electronic device provided with the circuit board, and a method of manufacturing the circuit board.

  According to the present invention, a substrate provided with a wiring pattern on the surface, a chip component disposed on the wiring pattern, a sealing material for covering and protecting the chip component, and the chip component in the wiring pattern are disposed. And a ditch groove provided around the pattern area to prevent the sealing material from flowing out.

  Further, according to the present invention, a first step of forming a wiring pattern on the upper surface of the substrate, and a second step of forming a wedging groove in the substrate located around a predetermined pattern area of the wiring pattern And a third step of disposing a chip component on the wiring pattern positioned in the pattern area and molding the same with a sealing material.

  According to the present invention, the thickness of the entire substrate can be reduced, and the density of the wiring pattern can be increased.

It is an enlarged front view of the principal part which showed one Embodiment of the circuit board to which this invention is applied. It is an expanded sectional view of the principal part in the AA arrow of the circuit board shown by FIG. It is an expanded sectional view of the principal part in the BB arrow of the circuit board shown by FIG. FIG. 3 is an enlarged front view of an essential part showing a state before applying a sealing material in the circuit board shown in FIG. 2; FIG. 4 shows the method of manufacturing the circuit board shown in FIG. 3, wherein (a) is an enlarged cross-sectional view of the main part showing the first step of forming a wiring pattern on the substrate; The enlarged sectional view of the principal part which showed the 2nd process of forming a wedging groove in the circumference of the pattern area, (c) is the 3rd process of arranging the chip parts on the wiring pattern and making the mode with the sealing material It is the expanded sectional view of the principal part which showed. The circuit board shown by FIG. 4 WHEREIN: It is an enlarged front view of the principal part which showed the 1st modification of a wedging groove. The circuit board shown by FIG. 4 WHEREIN: It is an enlarged front view of the principal part which showed the 2nd modification of a wedging groove.

An embodiment of a circuit board to which the present invention is applied will be described below with reference to FIGS. 1 to 5.
This circuit board is to be incorporated in a wristwatch and comprises a board 1 as shown in FIG. The substrate 1 is provided with a light emitting unit 2 and a light receiving unit 3 for optically detecting the hand position of the timepiece.

  The light emitting unit 2 includes a light emitting element, and is configured to emit light at a predetermined position in a hand movement region of a pointer. The light receiving unit 3 includes a light receiving element, and is configured to detect the position of the needle by receiving the reflected light when the light emitted from the light emitting unit 2 is irradiated to the pointer. In this case, the light emitting unit 2 and the light receiving unit 3 have a structure different from each other in the chip part 4 shown in FIG. 2, and the other structure is the same. Therefore, the light receiving unit 3 will be described below.

  The substrate 1 on which the light emitting unit 2 and the light receiving unit 3 are provided is, as shown in FIG. The structure is As shown in FIGS. 2 to 4, a wiring pattern 8 is provided on the insulating layer 7 of the substrate 1. The wiring pattern 8 includes a first electrode 8a, a second electrode 8b, a first wiring 8c, and a second wiring 8d.

  In this case, as shown in FIG. 4, the first wiring 8c is connected to the first electrode 8a. The second electrode 8b is provided adjacent to the first electrode 8a, and the second wiring 8d is connected to the second electrode 8b. As shown in FIGS. 2 to 4, the chip component 4 is disposed on the first electrode 8 a of the wiring pattern 8. The chip component 4 is a light receiving element such as a phototransistor of the light receiving unit 3. The light emitting unit 2 is a light emitting element such as a light emitting diode (LED).

  The lower surface of the chip component 4 is soldered and fixed to the first electrode 8a by solder as shown in FIGS. 2 to 4, and is electrically connected to the first electrode 8a, and the upper surface is secondarily formed by the bonding wire 4a. It is electrically connected to the electrode 8b. Further, this chip part 4 is molded by a sealing material 9.

  In this case, around the pattern area E where the chip component 4 in the wiring pattern 8 is disposed, as shown in FIG. 4, a damming groove 10 for preventing the sealing material 9 from flowing out of the pattern area E is provided. ing. That is, the pattern area E is an area surrounding the first electrode 8 a and the second electrode 8 b in the wiring pattern 8.

  As shown in FIGS. 2 to 4, the wedge groove 10 is formed in a substantially rectangular shape around the pattern area E by peeling the insulating layer 7 of the substrate 1 by laser processing. That is, when the insulating groove 7 is peeled off by laser processing, only the insulating layer 7 is peeled off by reflecting the laser beam by the reflective layer 6 provided on the lower surface of the insulating layer 7. It is formed by The hooking groove 10 includes a main hooking groove 12 and first and second auxiliary hooking grooves 13 and 14.

  As shown in FIG. 4, the main locking groove 12 is substantially the same except for the first and second wiring ports 11a and 11b from which the first and second wirings 8c and 8d of the wiring pattern 8 in the pattern area E are respectively drawn. It is provided in a rectangular shape. The first and second auxiliary blocking grooves 13 and 14 face the first and second wiring ports 11 a and 11 b of the wiring pattern 8 in a state where the first and second wirings 8 c and 8 d of the wiring pattern 8 are avoided. , And is configured to prevent the flow of the sealing material 9 from the first and second wiring ports 11a and 11b.

  That is, as shown in FIG. 4, the first auxiliary hooking groove 13 is provided to face the first wiring port 11 a in a state in which the first wiring 8 c of the wiring pattern 8 is avoided. One end (the lower end in FIG. 4) of the first auxiliary detent groove 13 is continuous with the end (the lower end in FIG. 4) of the main detent groove 12 located at the first wiring port 11a. It is formed. Thus, the main hooking groove 12 and the first auxiliary hooking groove 13 are formed without blocking the first wiring 8 c of the wiring pattern 8.

  Further, as shown in FIG. 4, the second auxiliary hooking groove 14 is provided to face the second wiring port 11b in a state where the second wiring 8d of the wiring pattern 8 is avoided. Also in this case, the second auxiliary hooking groove 14 is continuous with the end (left end in FIG. 4) of the main hooking groove 12 whose one end (left end in FIG. 4) is located at the second wiring port 11b. It is formed. Thus, the main hooking groove 12 and the second auxiliary hooking groove 14 are formed without blocking the second wiring 8 d of the wiring pattern 8.

  For this reason, as shown in FIG. 3, when potting on the chip component 4, the sealing material 9 swells by surface tension and is applied in the pattern area E in a state of covering the chip component 4. That is, when the sealing material 9 is applied in the pattern area E so as to cover the chip part 4, the sealing material 9 does not flow out of the pattern area E and the edge of the wedge groove 10 by the surface tension of the sealing material 9. The portion, that is, the edge of the main locking groove 12 and the edge of the first and second auxiliary locking grooves 13 and 14 are blocked and hardened in this state.

  Further, even if the sealing material 9 flows into the damming groove 10, the damming groove 10 is formed in a digging shape, so the sealing material 9 remains in the damming groove 10 and the sealing material 9 flows out to the periphery. It is hardened while staying in the locking groove 10. That is, even if the sealing material 9 flows into the main tacking groove 12 and the first and second auxiliary tacking grooves 13 and 14, the sealing material 9 remains in the main tacking groove 12 and the first and second auxiliary tacking grooves 13 and 14. The sealing material 9 does not flow out to the periphery, and is hardened while remaining in the main locking groove 12 and the first and second auxiliary locking grooves 13 and 14.

Next, a case of manufacturing this circuit board will be described with reference to FIGS. 5 (a) to 5 (c).
In the first step shown in FIG. 5A, first, the base layer 5, the reflection layer 6 for reflecting a laser beam, and the insulating layer 7 are laminated in order from the bottom to form the substrate 1, and this substrate is formed. The wiring pattern 8 is formed on the first insulating layer 7.

  At this time, a copper foil is laminated on the insulating layer 7 and the laminated copper foil is patterned to form a first electrode 8a, a second electrode 8b, a first wiring 8c, and a second wiring as shown in FIG. The wiring 8 d is formed as the wiring pattern 8. In this case, the first electrode 8a and the second electrode 8b are disposed close to each other. The first wiring 8c is drawn from the first electrode 8a through the first wiring port 11a. The second wiring 8d is drawn from the second electrode 8b through the second wiring port 11b.

  In the second step shown in FIG. 5B, the insulation of the substrate 1 located around the predetermined pattern area E of the wiring pattern 8, that is, the pattern area E surrounding the first electrode 8a and the second electrode 8b. The wedging groove 10 is formed in the layer 7 by laser processing. In this laser processing, by scanning the insulating layer 7 while irradiating the laser beam with the laser beam, the insulating layer 7 at the portion where the laser beam is irradiated is melted and scattered, thereby the main wedge holding groove 12 and the first, the first, and the first 2) Form the auxiliary locking grooves 13 and 14.

  That is, in this laser processing, when scanning while irradiating the laser beam to the insulating layer 7 with a constant energy, the laser beam is reflected by the mirror, and the angle of the mirror is changed little by little while irradiating the insulating layer 7 Thus, the laser beam does not damage the wiring pattern 8, and the laser beam is scanned accurately. At this time, since the laser beam is reflected by the reflective layer 6 provided in the lower layer of the insulating layer 7, only the insulating layer 7 is peeled off at a predetermined depth, and the main blocking groove 12 and the first and second auxiliary The locking grooves 13 and 14 are formed.

  Thereby, as shown in FIG. 4, the main hooking groove 12 is discontinuous in a substantially rectangular digging shape around the pattern area E of the wiring pattern 8 except for the first and second wiring ports 11a and 11b. Formed in the state. The first auxiliary hooking groove 13 is provided opposite to the first wiring port 11 a at a position avoiding the first wiring 8 c of the wiring pattern 8.

  In this case, the first auxiliary detent groove 13 is continuous with the end (lower end in FIG. 4) of the main detent groove 12 whose one end (lower end in FIG. 4) is located at the first wiring port 11a. It is formed. Thus, the main hooking groove 12 and the first auxiliary hooking groove 13 are formed without blocking the first wiring 8 c of the wiring pattern 8.

  Further, as shown in FIG. 4, the second auxiliary hooking groove 14 is provided to face the second wiring port 11 b in a state in which the second wiring 8 d of the wiring pattern 8 is avoided. Also in this case, the second auxiliary hooking groove 14 is continuous with the end (left end in FIG. 4) of the main hooking groove 12 whose one end (left end in FIG. 4) is located at the second wiring port 11b. It is formed. As a result, the main hooking groove 12 and the second auxiliary hooking groove 14 are formed without blocking the second wiring 8 d of the wiring pattern 8.

  In the third step shown in FIG. 5C, the chip component 4 is disposed on the wiring pattern 8 of the substrate 1 and molded with the sealing material 9. That is, the chip component 4 is connected and fixed on the first electrode 8 a of the wiring pattern 8 by solder, and the chip component 4 is electrically connected to the second electrode 8 b by the bonding wire 4 a. Thereby, the lower surface of the chip component 4 is connected and fixed on the first electrode 8a by solder and electrically connected to the first electrode 8a, and the upper surface is electrically connected to the second electrode 8b by the bonding wire 4a. Ru.

  In this state, the chip component 4 is molded with the sealing material 9. At this time, the sealing material 9 is potted on the chip component 4. Then, the sealing material 9 covers the chip component 4, is raised by surface tension, and is applied in the pattern area E. That is, when the sealing material 9 is applied in the pattern area E so as to cover the chip component 4, the surface tension of the sealing groove 9 by the surface tension of the sealing material 9, that is, the edge of the main locking groove 12. It is dammed up by the edges of the part and the first and second auxiliary detent grooves 13 and 14.

  At this time, since the sealing material 9 is blocked at the edge of the locking groove 10 by surface tension, it hardly flows into the locking groove 10. Moreover, even if it flows in in the damming groove 10, it remains in the damming groove 10, and the sealing material 9 does not flow out around. In addition, even if the sealing material 9 flows out from the first wiring port 11a, the sealing material 9 is blocked by the first auxiliary blocking groove 13, and therefore does not flow out of the pattern area E.

  Similarly, the sealing material 9 does not flow out of the pattern area E because it is blocked by the second auxiliary blocking groove 14 even if it flows out from the second wiring port 11 b. In addition, even if it flows into the first auxiliary detent groove 13 or into the second auxiliary detent groove 14, it stays in the first auxiliary detent groove 13 or in the second auxiliary detent groove 14, and the sealing material 9 flows out to the periphery I have not. In this state, the sealing material 9 is cured.

  In this case, the sealing material 9 may be a thermosetting resin or an ultraviolet curing resin. In the case where the sealing material 9 is a thermosetting resin, the chip component 4 is covered and the sealing material 9 is applied in the pattern area E, and is easily cured by heating and drying. it can. In addition, in the case where the sealing material 9 is an ultraviolet curing resin, the chip component 4 is covered and the sealing material 9 is applied in the pattern area E, and then it is easily cured by irradiating ultraviolet light. Can.

  As described above, according to this circuit board, the substrate 1 on the surface of which the wiring pattern 8 is provided, the chip component 4 disposed on the wiring pattern 8, and the sealing material 9 covering and protecting the chip component 4 And the ditch groove 10 provided around the pattern area E in which the chip component 4 in the wiring pattern 8 is disposed, and preventing the flow of the sealing material 9, thereby achieving thinning of the entire substrate As a result, high density wiring of the wiring pattern 8 can be achieved.

  That is, in this circuit board, when the sealing material 9 covers the chip component 4 and is applied in the pattern region E, the surface tension of the sealing material 9 can reliably and favorably cover the chip component 4. The outflow of the sealing material 9 to the outside of the pattern area E can be blocked by the surface tension of the sealing material 9 at the edge portion of the locking groove 10. Moreover, even if the sealing material 9 flows into the damming groove 10, it remains in the damming groove 10, and the sealing material 9 does not flow out to the periphery.

  For this reason, in this circuit board, the thickness of the entire board can be made thinner than when the dam portion is raised and provided around the pattern area E, and the groove width of the dam groove 10 is made the basis of the dam portion. Since the width can be smaller than the width, the area of the entire sealing area by the dam groove 10 can be smaller than the area of the entire sealing area by the dam portion, whereby the wiring pattern 8 provided on the substrate 1 Wiring density can be increased.

  Further, in this circuit board, since the damming grooves 10 are provided so as to avoid the wiring pattern 8 by laser processing, even if the wiring pattern 8 is formed on the substrate 1, the ditch groove 10 has a narrow groove width. Can be formed accurately and accurately, and efficiently. That is, in laser processing, by scanning while irradiating a laser beam with a constant energy, the wiring pattern 8 is not damaged by the laser beam, and the dam groove 10 can be formed accurately with a narrow groove width. it can.

  In this case, the reflection layer 6 for reflecting the laser beam is provided on the entire lower surface of the insulating layer 7 on the substrate 1 so that the laser beam is irradiated to form the damming groove 10 by reflecting the laser beam. The layer 6 makes it possible to reflect the laser beam, so that the weir groove 10 can be formed with a constant depth. Therefore, the wedge groove 10 can be formed into a free shape by the laser beam, and can be formed accurately with high accuracy.

  Further, according to the circuit board manufacturing method, the first step of forming the wiring pattern 8 on the upper surface of the substrate 1 and the substrate 1 positioned around the predetermined pattern area E of the wiring pattern 8 are clamped. By providing the second step of forming the groove 10 and the third step of arranging the chip component 4 on the wiring pattern 8 positioned in the pattern area E and molding with the sealing material 9, While thinning of the whole board | substrate can be achieved, the wiring pattern 8 can be wired with high density.

  That is, in this method of manufacturing a circuit board, when the sealing material 9 covers the chip component 4 and is applied in the pattern area E, the sealing material 9 can be raised by the surface tension of the sealing material 9. The chip component 4 can be covered reliably and favorably by the sealing material 9, and the outflow of the sealing material 9 to the outside of the pattern area E is caused by the surface tension of the sealing material 9 at the edge of the wedge groove 10. You can stop it. Moreover, even if the sealing material 9 flows into the damming groove 10, it remains in the damming groove 10, and the sealing material 9 does not flow out to the periphery.

  For this reason, in the method of manufacturing a circuit board, the thickness of the entire board can be made thinner than when the dam portion is raised and provided around the pattern area E, and the groove width of the dam groove 10 is the dam. Since the width can be smaller than the base width of the portion, the area of the entire sealing region by the dam groove 10 can be made smaller than the area of the entire sealing region by the dam portion. The wiring density of the wiring pattern 8 can be increased.

  Further, in the method of manufacturing the circuit board, the wiring pattern is formed on the substrate 1 by forming the wedging grooves 10 by laser processing around the pattern area E of the substrate 1 in the second step, avoiding the wiring pattern 8. Even when the groove 8 is provided, the locking groove 10 can be formed accurately with a narrow groove width with high accuracy and can be formed efficiently. That is, in the laser processing, the insulating layer 7 can be melted and scattered by irradiating the insulating layer 7 with the laser beam while scanning the insulating layer 7. The width can be formed accurately and accurately.

  In this case, in this laser processing, when scanning while irradiating a laser beam with a constant energy, the laser beam is a wiring pattern only by changing the angle of the mirror little by little while reflecting and irradiating the laser beam with the mirror. The laser beam can be scanned accurately and accurately without damaging the laser diode 8. For this reason, while being able to form the wedge groove 10 in a free shape by laser processing, it can be efficiently formed.

  Further, in the method of manufacturing the circuit board, the laser beam is irradiated by providing the reflection layer 6 for reflecting the laser beam on the substrate 1 over the entire lower surface of the insulating layer 7 in the first step. Since the laser beam can be reflected by the reflective layer 6 when forming the locking groove 10, the locking groove 10 can be formed with a constant depth, which also makes the locking groove 10 accurate and accurate. Can be formed.

  Further, in the method of manufacturing the circuit board, the main locking groove 12 provided in a continuous state except the first and second wiring ports 11a and 11b of the wiring pattern 8 in the pattern area E , And the first and second auxiliary detents provided opposite to the first and second wiring ports 11a and 11b of the wiring pattern 8 and preventing the flow of the sealing material 9 from the first and second wiring ports 11a and 11b By providing the grooves 13 and 14, outflow of the sealing material 9 to the outside of the pattern area E can be reliably and favorably prevented.

  That is, the main hooking groove 12 is provided in a continuous state except for the first and second wiring ports 11a and 11b of the wiring pattern 8 in the pattern area E, so that it is discontinuous in a substantially rectangular digging shape When the sealing material 9 is applied in the pattern area E so as to cover the chip component 4, the sealing material 9 can be formed except for the first and second wiring ports 11 a and 11 b. Due to the surface tension, the edge of the main locking groove 12 can be reliably and well blocked.

  Further, the first and second auxiliary locking grooves 13 and 14 are provided facing the first and second wiring ports 11 a and 11 b of the wiring pattern 8 in a state of avoiding the wiring pattern 8, The sealing material 9 applied to the pattern area E so as to cover the chip component 4 can be reliably and favorably suppressed from flowing out of the first and second wiring ports 11a and 11b to the outside of the pattern area E.

  That is, the first auxiliary locking groove 13 is provided opposite to the first wiring port 11a at a position away from the first wiring 8c of the wiring pattern 8, and one end thereof is located at the first wiring port 11a. By continuously forming the end portion of the wedging groove 12, even if the sealing material 9 flows out from the first wiring port 11a, it is possible to catch the sealing material 9 by the first auxiliary wedging groove 13. Since this can be performed, the sealing material 9 can be prevented from flowing out of the first wiring port 11 a to the outside of the pattern area E. Further, even if the sealing material 9 flows into the first auxiliary holding groove 13, it remains in the first auxiliary holding groove 13 and the sealing material 9 does not flow out to the surroundings.

  Further, the second auxiliary hooking groove 14 is provided opposite to the second wiring port 11b in a state of avoiding the second wiring 8d of the wiring pattern 8, and one end thereof is positioned at the second wiring port 11b. The second auxiliary detent groove 14 is formed continuously with the end portion of the detent groove 12 as in the case of the first auxiliary detent groove 13, even if the sealing material 9 flows out from the second wiring port 11 b. Since the sealing material 9 can be stopped by this, it is possible to prevent the sealing material 9 from flowing out of the second wiring port 11 b to the outside of the pattern area E. In addition, even if the sealing material 9 flows into the second auxiliary locking groove 14, it remains in the second auxiliary locking groove 14 and the sealing material 9 does not flow out to the surroundings.

  The present invention is not limited to the embodiment described above, and for example, the dam groove 20 may be formed as in the first modified example shown in FIG. That is, as shown in FIG. 6, the damming groove 20 of the first modification is provided with a plurality of point portions 20a and a plurality of linear portions 20b in a discontinuous state along the periphery of the pattern area E. It has a structure.

  In this case, as shown in FIG. 6, the locking groove 20 is formed in a substantially rectangular shape as a whole. The point-like portions 20a are circular shaped concave portions, and are provided at, for example, three places of both side portions of the upper side portion and an intermediate portion of the lower side portion. The linear portion 20b is a linear concave groove, and is provided at, for example, six portions, that is, a middle portion of the upper side portion, a middle portion of the lower side portion, and both side portions and both side portions.

  Further, as shown in FIG. 6, the first and second wiring ports 11a and 11b of the wiring pattern 8 are provided at discontinuous portions between the plurality of point portions 20a and the plurality of linear portions 20b. Further, it is desirable that the distance between the discontinuous portions of the plurality of point portions 20a and the plurality of linear portions 20b be smaller than the diameter of the point portions 20a or the groove width of the linear portions 20b.

  In the damming groove 20 of the first modified example as described above, the chip component 4 is covered and the sealing material is provided even if the plurality of point portions 20a and the plurality of linear portions 20b are provided in a discontinuous state. When 9 is applied in the pattern area E, the surface tension of the sealing material 9 does not cause the sealing material 9 to flow out of the discontinuous portion between the plurality of point portions 20 a and the plurality of linear portions 20 b. The sealing member 9 can be firmly and favorably stopped by the damming groove 20. Moreover, even if the sealing material 9 flows into the damming groove 20, it remains in the damming groove 20, and the sealing material 9 does not flow out to the periphery.

  Further, the present invention is not limited to the above-described embodiment and the first modification, and for example, the wedge groove 25 may be formed as in the second modification shown in FIG. That is, as shown in FIG. 7, the damming groove 25 of the second modified example extends substantially around the entire circumference of the pattern area E surrounding the first electrode 8a and the second electrode 8b of the wiring pattern 8. It is continuously formed in an elliptical shape.

  The substrate 26 in this case is a multilayer substrate, and the wiring pattern 8 is provided on the upper layer substrate. The first electrode 8 a and the second electrode 8 b of the wiring pattern 8 are electrically connected to the lower layer substrate by through holes. For this reason, in the wiring pattern 8, the first electrode 8a and the second electrode 8b are provided on the upper layer substrate. In this case, the reflecting layer 6 for reflecting the laser beam is provided annularly on the lower surface of the insulating layer in the upper layer substrate corresponding to the periphery of the pattern area E of the wiring pattern 8 in which the chip component 4 is disposed. Just do it.

  In the damming groove 25 of the second modification, the entire periphery of the pattern area E surrounding the first electrode 8a and the second electrode 8b of the wiring pattern 8 is continuously formed in a substantially elliptical shape. Because the sealing material 9 is applied to the pattern area E so as to cover the chip component 4, the outflow of the sealing material 9 to the outside of the pattern area E is blocked by the surface tension of the sealing material 9. 25 makes it possible to stop the work well and well. Moreover, even if the sealing material 9 flows into the damming groove 25, it remains in the damming groove 25 and the sealing material 9 does not flow out to the periphery.

  In the embodiment and the first and second modifications described above, the chip component 4 is a light receiving element or a light emitting element. However, the present invention is not limited to this. For example, a capacitor chip or a resistance element may be used. It may be a chip part.

  In the above-described embodiment and the first and second modified examples, although the case where the locking grooves 10, 20, 25 are formed by laser processing has been described, the present invention is not limited to this, and the invention is not limited thereto. Also good.

  Furthermore, although the case where it applied to a wristwatch in the embodiment and the 1st, 2nd modification which were mentioned was described, this invention does not necessarily need to be a wristwatch, for example, various kinds, such as a travel watch, an alarm clock, a clock, a clock, etc. It can also be applied to watches. Further, the present invention does not necessarily have to be a watch, and can be applied to various electronic devices such as mobile phones and mobile terminals.

As mentioned above, although one Embodiment of this invention was described, this invention is not limited to this, The invention described in the claim, and the range of equivalence are included.
The invention described in the claims of the present application is appended below.

(Supplementary note)
The invention according to claim 1 is a substrate provided with a wiring pattern on its surface, a chip component disposed on the wiring pattern, a sealing material for covering and protecting the chip component, and the wiring pattern in the wiring pattern. And a ditch groove provided around the pattern area in which the chip component is disposed to prevent the flow of the sealing material.

  A second aspect of the present invention is the circuit board according to the first aspect, wherein the dam groove is provided to avoid the wiring pattern by laser processing.

  The invention according to claim 3 is the circuit board according to claim 1 or 2, wherein in the intermediate layer of the substrate, a reflective layer that reflects a laser beam corresponds at least to the periphery of the pattern area. It is a circuit board characterized by being provided.

  The invention according to claim 4 is an electronic device comprising the circuit board according to any one of claims 1 to 3.

  The invention according to a fifth aspect comprises a first step of forming a wiring pattern on the upper surface of a substrate, and a second step of forming a wedging groove in the substrate located around a predetermined pattern area of the wiring pattern. And a third step of disposing a chip component on the wiring pattern positioned in the pattern area and molding the same with a sealing material. .

  The invention according to a sixth aspect is the method for manufacturing a circuit board according to the fifth aspect, wherein, in the second step, the dammed groove is a laser around the pattern area of the substrate, avoiding the wiring pattern. It is a manufacturing method of the circuit board characterized by forming by processing.

  The invention according to claim 7 is the method for manufacturing a circuit board according to claim 6, wherein, in the first step, a reflective layer for reflecting a laser beam is at least at the pattern area in the intermediate layer of the substrate. A method of manufacturing a circuit board characterized by being provided corresponding to the periphery.

  The invention according to claim 8 is the method for manufacturing a circuit board according to any one of claims 5 to 7, wherein the dam groove is continuous except for the wiring port of the wiring pattern in the pattern area. Providing a main hooking groove provided in a state, and an auxiliary hooking groove provided opposite to the wiring port of the wiring pattern to prevent the sealing material from flowing out from the wiring port; It is a manufacturing method of the circuit board made into the characteristics.

  The invention according to claim 9 is the method for manufacturing a circuit board according to claim 8, wherein the auxiliary detent groove is provided continuously at one end with the main detent groove, avoiding the wiring pattern. A method of manufacturing a circuit board characterized by

  The invention according to claim 10 is the method for manufacturing a circuit board according to any one of claims 5 to 7, wherein the wedging groove has a plurality of point portions or a plurality along the periphery of the pattern area. In the method of manufacturing a circuit board, the linear portion is provided in a discontinuous state.

  The invention according to claim 11 is the circuit board manufacturing method according to claim 10, wherein the distance between the discontinuous portions in the wedging groove is greater than the diameter of the point portion or the groove width of the linear portion. It is a manufacturing method of a circuit board characterized by being narrowly formed.

  The invention according to claim 12 is the circuit board manufacturing method according to any one of claims 5 to 7, wherein the substrate is a multilayer substrate, and the wiring pattern is provided on the upper surface of the upper layer substrate. The circuit pattern is characterized in that the wiring pattern is connected to the lower layer substrate by a through hole, and the dam groove is continuously provided along the entire circumference of the pattern area.

  The invention according to claim 13 is the circuit board manufacturing method according to claim 12, wherein the reflective layer is annularly provided corresponding to the periphery of the pattern area. It is a manufacturing method.

1 and 26 substrate 2 light emitting unit 3 light receiving unit 4 chip component 5 base layer 6 reflective layer 7 insulating layer 8 wiring pattern 8a and 8b first and second electrodes 8c and 8d first and second wiring 9 sealing materials 10 and 20 , 25 tacking groove 11a, 11b first and second wiring opening 12 main tacking groove 13, 14 first and second auxiliary tacking groove 20a point portion 20b linear portion

Claims (13)

A substrate provided with a wiring pattern on the surface,
A chip component disposed on the wiring pattern;
An encapsulant that covers and protects the chip component;
A ditch groove which is provided around a pattern area in which the chip component is arranged in the wiring pattern and which prevents the sealing material from flowing out;
A circuit board comprising:   The circuit board according to claim 1, wherein the wedging groove is provided to avoid the wiring pattern by laser processing.   The circuit board according to claim 1 or 2, wherein the intermediate layer of the substrate is provided with a reflective layer for reflecting a laser beam corresponding to at least the periphery of the pattern area. Circuit board.   An electronic apparatus comprising the circuit board according to any one of claims 1 to 3. A first step of forming a wiring pattern on the upper surface of the substrate;
Forming a dam groove on the substrate located around a predetermined pattern area of the wiring pattern;
A third step of disposing a chip component on the wiring pattern positioned in the pattern area and molding with a sealing material;
A method of manufacturing a circuit board, comprising:   6. The method for manufacturing a circuit board according to claim 5, wherein, in the second step, the wedging groove is formed by laser processing around the pattern area of the substrate, avoiding the wiring pattern. Method of manufacturing a circuit board.   The method for manufacturing a circuit board according to claim 6, wherein, in the first step, a reflective layer for reflecting a laser beam is provided corresponding to at least the periphery of the pattern area in the intermediate layer of the substrate. A manufacturing method of a circuit board characterized by things.   The method for manufacturing a circuit board according to any one of claims 5 to 7, wherein the damming grooves are provided in a continuous state except the wiring port of the wiring pattern in the pattern area. And a supplemental dam groove provided opposite to the wiring port of the wiring pattern to prevent the sealing material from flowing out from the wiring port.   9. The circuit board manufacturing method according to claim 8, wherein the auxiliary detent groove is provided continuously at one end with the main detent groove so as to avoid the wiring pattern. Production method.   The method for manufacturing a circuit board according to any one of claims 5 to 7, wherein in the dam groove, a plurality of point portions or a plurality of linear portions are discontinuous along the periphery of the pattern area. A method of manufacturing a circuit board, characterized in that the method is provided.   11. The method for manufacturing a circuit board according to claim 10, wherein the distance between the discontinuous portions in the dam groove is formed narrower than the diameter of the point portion or the groove width of the linear portion. Circuit board manufacturing method.   The method for manufacturing a circuit board according to any one of claims 5 to 7, wherein the substrate is a multilayer substrate, the wiring pattern is provided on the upper surface of the upper layer substrate, and the wiring pattern is a lower layer by a through hole. A method of manufacturing a circuit board, comprising: connecting to a substrate; and the damming grooves being continuously provided along the entire circumference of the pattern area.   The method of manufacturing a circuit board according to claim 12, wherein the reflection layer is annularly provided corresponding to the periphery of the pattern area.

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