JP2017114050A - Thermal print head - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thermal print head that can speed up printing.SOLUTION: A thermal print head A1 comprises: a semiconductor substrate 1 having a main surface and a back surface; a resistor layer 4 constituting a plurality of heat generating portions 41; a wiring layer 3, supported on the semiconductor substrate 1 and included in a conductive passage for distributing power to the plurality of heat generating portions 41; and an insulation protective layer 5 covering the wiring layer 3 and the resistor layer 4. The semiconductor substrate 1 has a recessed portion 15 recessed from the main surface toward the back surface, and further comprises a sealing semiconductor member 16 which has a sealing semiconductor member main surface 161, a sealing semiconductor member back surface 162 and a sealing semiconductor member side surface 163 connecting the sealing semiconductor member main surface 161 and the sealing semiconductor member back surface 162 and blocks the recessed portion 15. The plurality of heat generating portions 41 overlap with the sealing semiconductor member 16 when viewed from a thickness direction z.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a thermal print head.

  A conventionally known thermal print head includes a substrate, a resistor layer, and a wiring layer. Such a thermal print head is disclosed in Patent Document 1, for example. In the thermal print head disclosed in this document, the resistor layer and the wiring layer are formed on a substrate. The resistor layer has a plurality of heat generating portions arranged in the main scanning direction.

  Thermal print heads are required to improve printing speed. If heat is excessively transmitted from the plurality of heat generating portions to the substrate, the printing speed is hindered.

JP 2012-51319 A

  The present invention has been conceived under the circumstances described above, and it is an object of the present invention to provide a thermal print head capable of increasing the printing speed.

  A thermal print head provided by the present invention includes a semiconductor substrate having a main surface and a back surface facing opposite sides in the thickness direction, and a main scanning direction that is supported on the main surface side of the semiconductor substrate and generates heat when energized. Covering the resistor layer constituting the plurality of heat generating portions arranged, the wiring layer supported by the semiconductor substrate and included in the conduction path for energizing the plurality of heat generating portions, and the wiring layer and the resistor layer An insulating protective layer, wherein the semiconductor substrate has a recessed portion recessed from the main surface side to the back surface side, and is a sealed semiconductor member main facing the opposite sides in the thickness direction A sealing semiconductor member having a surface and a back surface of the sealing semiconductor member, and a sealing semiconductor member side surface connecting the main surface of the sealing semiconductor member and the back surface of the sealing semiconductor member, and closing the recess Further wherein the plurality of heat generating portions is characterized in that overlaps the sealing semiconductor member in the thickness direction as viewed.

  In a preferred embodiment of the present invention, the recess extends long in the main scanning direction.

  In a preferred embodiment of the present invention, the sealing semiconductor member extends long in the main scanning direction.

  In preferable embodiment of this invention, the said recessed part is a 1st recessed part located in the said back surface side in the said thickness direction, and a 2nd recessed part located in the opposite side to the said back surface with respect to the said 1st recessed part, Have

  In a preferred embodiment of the present invention, the first recess has a first recess bottom surface parallel to the main surface, and a first recess side surface connected to the first recess.

  In a preferred embodiment of the present invention, the second recess has a second recess bottom surface that is connected to the first recess and is parallel to the main surface.

  In a preferred embodiment of the present invention, the bottom surface of the second recess is an annular shape surrounding the first recess when viewed in the thickness direction.

  In preferable embodiment of this invention, the said sealing semiconductor member back surface and the said 2nd recessed part bottom face of the said sealing semiconductor member are joined.

  In a preferred embodiment of the present invention, the second recess has a second recess side surface connected to the bottom surface of the second recess.

  In a preferred embodiment of the present invention, the semiconductor substrate has a convex portion protruding in the thickness direction from the main surface and extending long in the main scanning direction, and the concave portion is recessed from the convex portion. .

  In a preferred embodiment of the present invention, the main surface has a first region and a second region that are spaced apart from each other in the sub-scanning direction across the convex portion.

  In a preferred embodiment of the present invention, the convex portion is a top surface parallel to the main surface and spaced from the main surface in the thickness direction, and between the top surface and the first region. A first inclined side surface interposed and inclined with respect to the main surface; a second inclined side surface interposed between the top surface and the second region and inclined with respect to the main surface; The recess is recessed from the top surface.

  In a preferred embodiment of the present invention, the semiconductor substrate is made of Si, and the main surface and the top surface are (100) surfaces.

  In a preferred embodiment of the present invention, an angle formed by the first inclined side surface and the second inclined side surface with the top surface is 54.7 degrees.

  In a preferred embodiment of the present invention, an angle formed between the side surface of the first concave portion and the top surface is 54.7 degrees.

  In a preferred embodiment of the present invention, an angle formed between the side surface of the second recess and the top surface is 54.7 degrees.

  In a preferred embodiment of the present invention, the sealing semiconductor member is made of Si, and the back surface of the sealing semiconductor member is a (100) plane.

  In preferable embodiment of this invention, the angle which the said sealing semiconductor member side surface makes with the said sealing semiconductor member back surface is 54.7 degree | times.

  In a preferred embodiment of the present invention, the wiring layer is disposed on a side opposite to the plurality of individual electrodes with the plurality of individual electrodes respectively connected to the plurality of heat generation units, and the plurality of heat generation units interposed therebetween. And a common electrode that is electrically connected to the plurality of heat generating portions.

  In a preferred embodiment of the present invention, the wiring layer is located on the lower side of the semiconductor substrate and has a relatively high thermal conductivity, the high heat transfer layer, and the semiconductor substrate. And a low heat transfer layer having a relatively low thermal conductivity.

  In a preferred embodiment of the present invention, the low heat transfer layer is in contact with the plurality of heat generating portions from the second region side in the sub-scanning direction and exposed from the high heat transfer layer. Has a region.

  In a preferred embodiment of the present invention, the plurality of individual electrodes include the plurality of first low electric heating regions.

  In a preferred embodiment of the present invention, the low heat transfer layer includes a second low heat transfer region that is in contact with the plurality of heat generating portions from the first region side in the sub-scanning direction and exposed from the high heat transfer layer. Have.

  In a preferred embodiment of the present invention, the common electrode includes the second low electric heating region.

  In a preferred embodiment of the present invention, the high heat transfer layer is made of Cu.

  In a preferred embodiment of the present invention, the low heat transfer layer is made of Ti.

  In a preferred embodiment of the present invention, the insulating protective layer includes a first insulating protective layer, a second insulating protective layer, and a three insulating protective layer that are stacked on each other, and the heat generating portion includes the resistor layer. And a portion located between the individual electrode and the common electrode, and a portion of the resistor layer located between the individual electrode and the common electrode with the first insulating protective layer interposed therebetween. 1 extension resistor layer, and the 2nd extension resistor layer laminated | stacked on both sides of the said 2nd insulation protective layer on the said 1st extension resistor layer.

  In a preferred embodiment of the present invention, the resistor layer has an insulating portion that insulates a portion located between the individual electrode and the common electrode from a portion located on the first region side.

  In a preferred embodiment of the present invention, a portion of the resistor layer located between the individual electrode and the common electrode and the first extended resistor layer are arranged on the first region side in the sub-scanning direction. The parts touch each other.

  In a preferred embodiment of the present invention, the first insulating protective layer has a first individual-side conduction opening that contacts the resistor layer and the first extended resistor layer.

  In a preferred embodiment of the present invention, the first extension resistor layer and the second extension resistor layer are in contact with each other on the second region side in the sub-scanning direction.

  In a preferred embodiment of the present invention, the second insulating protective layer has a second individual-side conduction opening that contacts the first extension resistor layer and the second extension resistor layer.

  In a preferred embodiment of the present invention, the conduction path includes the semiconductor substrate.

  In a preferred embodiment of the present invention, the common electrode and the semiconductor substrate are electrically connected.

  In a preferred embodiment of the present invention, the semiconductor device includes an insulating layer provided between the semiconductor substrate, the wiring layer, and the resistor layer, and the insulating layer includes the semiconductor substrate and the common electrode. It has the 1st opening for common electrodes made to conduct.

  In a preferred embodiment of the present invention, the first common electrode opening has a shape extending long in the main scanning direction.

  In a preferred embodiment of the present invention, a conductive protective layer is provided that overlaps the plurality of heat generating portions when viewed in the thickness direction and is laminated on the insulating protective layer.

  In a preferred embodiment of the present invention, the conductive protective layer is made of TiN.

  In a preferred embodiment of the present invention, the insulating protective layer has an opening for a conductive protective layer for conducting the conductive protective layer and the common electrode.

  In a preferred embodiment of the present invention, the conductive protective layer opening overlaps the first region in the thickness direction view.

  In a preferred embodiment of the present invention, the semiconductor substrate is made of a material obtained by doping Si with a metal element.

  In a preferred embodiment of the present invention, the resistor layer is made of TaN.

  According to the present invention, the concave portion is interposed between the plurality of heat generating portions and the semiconductor substrate. For this reason, it is possible to avoid that the heat from the plurality of heat generating portions is excessively transmitted to the semiconductor substrate. Therefore, the printing speed by the thermal print head can be increased.

  Other features and advantages of the present invention will become more apparent from the detailed description given below with reference to the accompanying drawings.

It is a top view which shows the thermal print head based on 1st Embodiment of this invention. It is sectional drawing which follows the II-II line | wire of FIG. It is a principal part expanded sectional view which shows the thermal print head of FIG. It is a principal part expanded sectional view which shows the thermal print head of FIG. It is a principal part enlarged plan view which shows the thermal print head of FIG. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the thermal print head of FIG. 1. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the thermal print head of FIG. 1. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the thermal print head of FIG. 1. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the thermal print head of FIG. 1. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the thermal print head of FIG. 1. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the thermal print head of FIG. 1. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the thermal print head of FIG. 1. FIG. 6 is an enlarged cross-sectional view of a main part showing a modification of the thermal print head of FIG. It is a principal part expanded sectional view which shows the thermal print head based on 2nd Embodiment of this invention.

  Hereinafter, preferred embodiments of the present invention will be specifically described with reference to the drawings.

  1 to 5 show a thermal print head according to a first embodiment of the present invention. The thermal print head A1 of this embodiment includes a semiconductor substrate 1, a sealing semiconductor member 16, an insulating layer 2, a wiring layer 3, a resistor layer 4, an insulating protective layer 5, a conductive protective layer 6, and a plurality of control elements 7. , A protective resin 8, a support member 91, and a wiring member 92. The thermal print head A1 is incorporated in a printer that performs printing on a print medium 992 that is sandwiched and conveyed between the platen roller 991. Examples of such a print medium 992 include thermal paper for creating a barcode sheet or a receipt.

  FIG. 1 is a plan view showing the thermal print head A1. 2 is a cross-sectional view taken along line II-II in FIG. 3 and 4 are enlarged cross-sectional views of the main part showing the thermal print head A1. FIG. 5 is an enlarged plan view of a main part showing the thermal print head A1. For convenience of understanding, the support member 91 is omitted in FIG. FIG. 4 shows a part of the thermal print head A1.

  The semiconductor substrate 1 is made of a semiconductor material having a resistivity that allows energization. An example of such a semiconductor material is a material in which Si is doped with a metal element. The semiconductor substrate 1 has a main surface 11, a back surface 12, a convex portion 13, and a concave portion 15. The semiconductor substrate 1 may have a configuration that does not have the convex portion 13.

  The main surface 11 and the back surface 12 face opposite sides in the thickness direction z. The convex portion 13 is a portion protruding from the main surface 11 in the thickness direction z. The convex portion 13 extends long in the main scanning direction x.

  The main surface 11 has a first region 111 and a second region 112 that are spaced apart from each other in the sub-scanning direction with the convex portion 13 interposed therebetween.

  The convex portion 13 has a top surface 130, a first inclined side surface 131, and a second inclined side surface 132. The top surface 130 is parallel to the main surface 11 and is separated from the main surface 11 in the thickness direction. The first inclined side surface 131 is interposed between the top surface 130 and the first region 111 and is inclined with respect to the main surface 11. The second inclined side surface 132 is interposed between the top surface 130 and the second region 112 and is inclined with respect to the main surface 11.

  In the present embodiment, the (100) plane is selected as the main surface 11. Moreover, the angle which the 1st inclination side surface 131 and the 2nd inclination side surface 132 make with the top | upper surface 130 and the main surface 11 is the same, for example, is 54.7 degree | times.

  The main surface 11 has a first region 111 and a second region 112. The first region 111 and the second region 112 are regions partitioned from each other by the convex portion 13. In the present embodiment, the second region 112 has a larger y dimension and area in the sub-scanning direction than the first region 111.

  The recess 15 is recessed from the main surface 11 side to the back surface 12 side. In the present embodiment, the concave portion 15 is recessed from the top surface 130 of the convex portion 13. The recess 15 extends long in the main scanning direction x.

  The recess 15 has a first recess 151 and a second recess 152. The 1st recessed part 151 is located in the back surface 12 side in thickness direction z direction. The second recess 152 is located on the opposite side of the back surface 12 with respect to the first recess 151 in the thickness direction z.

  The first recess 151 has a first recess bottom surface 1511 and a first recess side surface 1512. First recess bottom surface 1511 is a surface parallel to main surface 11 and top surface 130. The first recess side surface 1512 is connected to the first recess bottom surface 1511 and the second recess 152. In the present embodiment, the angle formed by the first recess side surface 1512 with the top surface 130 and the main surface 11 is the same, for example, 54.7 degrees.

  The second recess 152 has a second recess bottom surface 1521 and a second recess side surface 1522. The second recess bottom surface 1521 is connected to the first recess side surface 1512 of the first recess 151, and is a surface parallel to the main surface 11 and the top surface 130. The second recess bottom surface 1521 has an annular shape surrounding the first recess 151 in the thickness direction z view. Second recess side surface 1522 is connected to second recess bottom surface 1521 and top surface 130. In the present embodiment, the angle formed by the second recess side surface 1522 with the top surface 130 and the main surface 11 is the same, for example, 54.7 degrees.

  The sealing semiconductor member 16 closes the recess 15 from the main surface 11 side. The sealing semiconductor member 16 has a sealing semiconductor member main surface 161, a sealing semiconductor member back surface 162, and a sealing semiconductor member side surface 163. The sealing semiconductor member 16 is made of Si, for example.

  The sealing semiconductor member main surface 161 and the sealing semiconductor member back surface 162 face opposite sides in the thickness direction z, and are parallel to the main surface 11, the back surface 12, and the top surface 130. In this embodiment, the sealing semiconductor member back surface 162 is a (100) surface. The sealing semiconductor member main surface 161 and the top surface 130 are flush with each other.

  The sealing semiconductor member side surface 163 connects the sealing semiconductor member main surface 161 and the sealing semiconductor member back surface 162. In the present embodiment, the angle formed by the sealing semiconductor member side surface 163 and the sealing semiconductor member back surface 162 is, for example, 54.7 degrees.

  In the present embodiment, the sealing semiconductor member back surface 162 of the sealing semiconductor member 16 and the second recess bottom surface 1521 of the second recess 152 of the recess 15 are joined. This bonding is performed by, for example, the bonding layer 169. The bonding layer 169 is made of a metal such as solder. In the present embodiment, the sealing semiconductor member back surface 162 and the second recess bottom surface 1521 are bonded by the bonding layer 169 so as to surround the entire circumference of the first recess 151. Thereby, the internal space of the 1st recessed part 151 is sealed with respect to external space. The pressure in the internal space of the first recess 151 is lower than the pressure in the external space, and is preferably a vacuum.

  Although the size of the semiconductor substrate 1 is not particularly limited, for example, the sub-scanning direction y dimension of the semiconductor substrate 1 is about 2.0 mm to 3.0 mm, and the x direction dimension is about 100 mm to 150 mm. The thickness direction z distance between the main surface 11 and the back surface 12 is about 400 μm to 500 μm, and the thickness direction z height of the convex portion 13 is about 250 μm to 400 μm.

The insulating layer 2 is provided between the main surface 11 of the semiconductor substrate 1, the convex portion 13, the sealing semiconductor member 16, the wiring layer 3, and the resistor layer 4. The insulating layer 2 is made of an insulating material, such as SiO ₂ or SiN. The thickness of the insulating layer 2 is not particularly limited, and an example thereof is about 5 μm to 10 μm.

  The insulating layer 2 has a common electrode first opening 21 and a common electrode second opening 22. The first common electrode opening 21 penetrates the insulating layer 2 in the thickness direction z. In the present embodiment, the first opening for common electrode 21 overlaps the first region 111 when viewed in the thickness direction z. The first opening for common electrode 21 has a shape extending long in the main scanning direction x, for example, a slit shape.

  The second opening 22 for the common electrode penetrates the insulating layer 2 in the thickness direction z. In the present embodiment, the second opening 22 for the common electrode overlaps the second region 112 when viewed in the thickness direction z.

  The resistor layer 4 is supported by the semiconductor substrate 1 and is formed on the insulating layer 2 in this embodiment. The resistor layer 4 has a plurality of heat generating portions 41. The plurality of heat generating portions 41 locally heat the print medium 992 by being selectively energized. The plurality of heat generating portions 41 are arranged along the main scanning direction x. In the present embodiment, the plurality of heat generating portions 41 overlap the sealing semiconductor member 16 as viewed in the thickness direction z, and more specifically, all of them overlap the sealing semiconductor member main surface 161. The resistor layer 4 is made of TaN, for example.

  Although the shape of the heat generating part 41 is not particularly limited, in the example illustrated in FIG. 4, the heat generating part 41 has a bent shape.

  In the present embodiment, the resistor layer 4 includes a resistance-side first through conduction portion 421 and a resistance-side second penetration conduction portion 422. The resistance-side first through conduction portion 421 is in contact with the first region 111 of the main surface 11 of the semiconductor substrate 1 through the first opening 21 for the common electrode. The resistance-side second through conduction portion 422 is in contact with the second region 112 of the main surface 11 of the semiconductor substrate 1 through the second opening 22 for the common electrode.

  The wiring layer 3 is for configuring a conduction path for energizing the plurality of heat generating portions 41. The wiring layer 3 is supported by the semiconductor substrate 1 and is laminated on the resistor layer 4 in this embodiment. The wiring layer 3 may be interposed between the semiconductor substrate 1 and the resistor layer 4. The wiring layer 3 is made of a metal material having a resistance lower than that of the resistor layer 4. In the present embodiment, the wiring layer 3 is made of a high heat transfer layer 301 and a low heat transfer layer 302. The low heat transfer layer 302 is provided on the semiconductor substrate 1 side and has a relatively low thermal conductivity. The high heat transfer layer 301 is laminated on the low heat transfer layer 302 and has a relatively high thermal conductivity. An example of the material of the low heat transfer layer 302 is Ti. An example of the material of the high heat transfer layer 301 is Ti.

  The wiring layer 3 has a plurality of individual electrodes 31 and a common electrode 32. The plurality of individual electrodes 31 are respectively connected to the plurality of heat generating portions 41. In the present embodiment, the plurality of individual electrodes 31 are located on the second region 112 side in the sub-scanning direction y with respect to the plurality of heat generating portions 41.

  The common electrode 32 has a portion disposed on the opposite side in the sub-scanning direction y from the plurality of individual electrodes 31 with the plurality of heat generating portions 41 interposed therebetween. Further, the common electrode 32 of the embodiment has a portion located on the second region 112 side (left side in the drawing in FIG. 3) in the sub-scanning direction y direction with respect to the plurality of individual electrodes 31. The common electrode 32 is electrically connected to all of the plurality of heat generating portions 41. 3 shows a cross section across the common electrode 32 in the second region 112 for convenience of understanding, but in the cross section at other positions in the main scanning direction x, the wiring layer 3 has a potential different from that of the common electrode 32. Are different and have a plurality of insulated parts.

  As understood from FIGS. 3 and 4, in the present embodiment, a portion of the resistor layer 4 exposed from the wiring layer 3 between the plurality of individual electrodes 31 and the common electrode 32 is a plurality of heat generating portions. 41.

  The low heat transfer layer 302 has a plurality of first low electric heat regions 3021 and second low electric heat regions 3022. The plurality of first low electrothermal regions 3021 are in contact with the plurality of heat generating portions 41 from the second region 112 side in the sub-scanning direction y and are exposed from the high heat transfer layer 301. The plurality of individual electrodes 31 includes a plurality of first low electric heating regions 3021.

  The second low electric heat region 3022 is in contact with the plurality of heat generating portions 41 from the first region 111 side in the sub-scanning direction y and is exposed from the high heat transfer layer 301. The individual electrode 31 includes a second low electric heating region 3022.

  In the present embodiment, the common electrode 32 includes a wiring-side first through conduction portion 321 and a wiring-side second through conduction portion 322. The wiring side first through conduction part 321 is in contact with the resistance side first penetration conduction part 421 of the resistor layer 4. The wiring side second through conduction portion 322 is in contact with the resistance side second through conduction portion 422 of the resistor layer 4. With such a configuration, the portion of the common electrode 32 of the wiring layer 3 that overlaps the first region 111 in the thickness direction z view passes through the first opening 21 for the common electrode of the insulating layer 2 through the resistance-side first through conduction portion. The semiconductor substrate 1 is electrically connected by way of 421. In addition, the portion of the common electrode 32 that overlaps the second region 112 in the thickness direction z view passes through the second opening 22 for the common electrode of the insulating layer 2 and the resistance-side second through-conductive portion 422, whereby the semiconductor substrate 1 is conducting. As a result, in this embodiment, the conduction path for energizing the plurality of heat generating portions 41 includes the wiring layer 3 and the semiconductor substrate 1. More specifically, the current flowing through the common electrode 32 passes through the semiconductor substrate 1.

The insulating protective layer 5 covers the wiring layer 3 and the resistor layer 4. The insulating protective layer 5 is made of an insulating material and protects the wiring layer 3 and the resistor layer 4. The material of the insulating protective layer 5 is, for example, SiO ₂ .

  The insulating protective layer 5 has a conductive protective layer opening 51, a plurality of control element openings 52, and a plurality of wiring member openings 53. The conductive protective layer opening 51 overlaps the first region 111 when viewed in the thickness direction z, and exposes the common electrode 32. The conductive protective layer opening 51 has, for example, a shape that extends long in the main scanning direction x. In the illustrated example, the conductive protective layer opening 51 overlaps the common electrode first opening 21 when viewed in the thickness direction z. The control element opening 52 overlaps the second region 112 when viewed in the thickness direction z, and exposes the plurality of individual electrodes 31 and the common electrode 32, respectively.

  The plurality of wiring member openings 53 are provided on the opposite side of the plurality of heating elements 41 in the sub-scanning direction y with respect to the plurality of control element openings 52. The plurality of wiring member openings 53 respectively expose the common electrode 32 of the wiring layer 3 and other portions of the wiring layer 3 provided at positions different from the common electrode 32 in the x direction and insulated from the common electrode 32. I am letting.

  The conductive protective layer 6 overlaps the plurality of heat generating portions 41 in the thickness direction z and is laminated on the insulating protective layer 5. The conductive protective layer 6 is made of a conductive material, for example, AlN. The conductive protective layer 6 has a portion that overlaps the first region 111 when viewed in the thickness direction z, and has a protective layer penetrating conductive portion 61. The protective layer penetrating conductive portion 61 is in contact with the common electrode 32 through the conductive protective layer opening 51.

  The plurality of control elements 7 are for conducting to the wiring layer 3 and individually energizing the plurality of heat generating portions 41. The plurality of control elements 7 are arranged in the main scanning direction x. The plurality of control elements 7 overlap with the second opening 22 for the common electrode in the thickness direction z view.

  In the present embodiment, the thermal print head A1 has a control element pad 381. The control element pad 381 is made of a metal such as Cu or Ni, and is formed in the control element opening 52. The control element 7 has a plurality of control element electrodes 71. The control element electrode 71 is conductively bonded to the control element pad 381 via a conductive bonding material 79. The conductive bonding material 79 is, for example, solder.

  In the present embodiment, the control element 7 is located closer to the semiconductor substrate 1 in the thickness direction z than the conductive protection layer surface S6 that is the surface above the thickness direction z of the conductive protection layer 6. Further, the control element 7 is located on the semiconductor substrate 1 side in the thickness direction z with respect to the resistor layer surface S4 that is a surface above the thickness direction z of the resistor layer 4.

  The wiring member 92 is for electrically connecting the wiring layer 3 to, for example, a power supply unit (not shown) of the printer. The wiring member 92 is, for example, a printed wiring board. Such a wiring member 92 includes, for example, a resin layer 921, a wiring layer 922, and a protective layer 923. The resin layer 921 is made of a flexible resin. The wiring layer 922 is laminated on the resin layer 921 and is made of a metal such as Cu, for example. The protective layer 923 is laminated on the side opposite to the wiring layer 922 with respect to the resin layer 921, and is a layer that protects the resin layer 921 and the wiring layer 922.

  The thermal print head A1 has a wiring member pad 382. The wiring member pad 382 is formed in the wiring member opening 53 of the insulating protective layer 5 and is made of a metal such as Cu or Ni. The wiring layer 922 of the wiring member 92 is conductively bonded to the wiring member pad 382. The thermal print head A1 has a plurality of wiring member pads 382. The wiring member pad 382 shown in FIG. 3 is electrically connected to the common electrode 32. Some of the plurality of wiring member pads 382 are electrically connected to other portions of the wiring layer 3 that are insulated from the common electrode 32 and provided at positions different from those in FIG.

  The support member 91 supports the semiconductor substrate 1. The support member 91 is made of a metal such as Al. The support member 91 has a recess 911. The recess 911 is a part that accommodates the semiconductor substrate 1 and supports the semiconductor substrate 1. The semiconductor substrate 1 is bonded to the recess 911 by, for example, a bonding layer 919. The bonding layer 919 is preferably capable of transferring heat from the semiconductor substrate 1 to the support member 91 and insulating the semiconductor substrate 1 and the support member 91. An example of such a bonding layer 919 is a resin adhesive.

  The dimension of the support member 91 is not particularly limited, and as an example, the sub-scanning direction y dimension is about 5.0 mm to 8.0 mm, and the x direction dimension is about 100 mm to 150 mm. Moreover, the thickness direction z dimension is about 2.0-4.0 mm.

  The protective resin 8 protects the control element 7 and is made of, for example, an insulating resin. Further, the protective resin 8 overlaps the second inclined side surface 132 of the convex portion 13 as viewed in the thickness direction z, and exposes the top surface 130 and the sealing semiconductor member 16. In the present embodiment, the protective resin 8 covers a part of the wiring member 92.

  Next, an example of a manufacturing method of the thermal print head A1 will be described below with reference to FIGS.

  First, a semiconductor substrate material is prepared. The semiconductor substrate material is made of a low-resistance semiconductor material, for example, a material obtained by doping Si with a metal element. The semiconductor substrate material has a (100) plane. After covering the (100) surface with a predetermined mask layer, anisotropic etching using, for example, KOH is performed. Thereby, the semiconductor substrate 1 shown in FIG. 6 is obtained. The main surface 11 and the top surface 130 are (100) planes. The first inclined side surface 131 and the second inclined side surface 132 are inclined surfaces formed by anisotropic etching, and the angles formed with the main surface 11 are 54.7 degrees, respectively. Note that unlike the present method, the semiconductor substrate 1 may be formed using cutting or the like.

  Next, anisotropic etching using, for example, KOH is performed twice on the top surface 130. Thereby, the semiconductor substrate 1 in which the concave portion 15 having the first concave portion 151 and the second concave portion 152 shown in FIG. 7 is formed is obtained.

  Next, as shown in FIG. 8, the recess 15 is covered with the sealing semiconductor member 16. The sealing semiconductor member back surface 162 of the sealing semiconductor member 16 is joined to the second recess bottom surface 1521 of the second recess 152 of the recess 15. This joining is performed by a joining layer 169 made of, for example, solder. Note that a metal plating layer having relatively good solder wettability may be formed on the second recess bottom surface 1521 and the sealing semiconductor member back surface 162 in order to increase the bonding force with the bonding layer 169.

Next, as shown in FIG. 9, the insulating layer 2 is formed. The insulating layer 2 is formed by depositing SiO ₂ using, for example, CVD. Further, the common electrode first opening 21 and the common electrode second opening 22 are formed by etching or the like.

  Next, as shown in FIG. 10, the resistor layer 4 is formed. The resistor layer 4 is formed, for example, by forming a TaN thin film on the insulating layer 2 by sputtering. Next, the wiring layer 3 that covers the resistor layer 4 is formed. The wiring layer 3 is formed by forming the high heat transfer layer 301 made of Ti, for example, by plating or sputtering, and then forming the low heat transfer layer 302 made of Cu.

  Next, the resistor layer 4, the high heat transfer layer 301 and the low heat transfer layer 302 are appropriately subjected to selective etching, thereby patterning the resistor layer 4, the high heat transfer layer 301 and the low heat transfer layer 302. To do. Thereby, a plurality of individual electrodes 31 and a common electrode 32 are formed in the wiring layer 3. The resistor layer 4 is formed with a plurality of heat generating portions 41. In addition, the low heat transfer layer 302 has a first low electric heat region 3021 and a second low electric heat region 3022. The common electrode 32 includes a wiring-side first through conduction portion 321 and a wiring-side second through conduction portion 322. The resistor layer 4 includes a resistance-side first through conduction portion 421 and a resistance-side second penetration conduction portion 422.

Next, as shown in FIG. 12, the insulating protective layer 5 is formed. The insulating protective layer 5 is formed by depositing SiO ₂ on the insulating layer 2, the wiring layer 3, and the resistor layer 4 by using, for example, CVD, and then performing etching or the like. Next, the conductive protective layer 6 is formed.

  Next, a control element pad 381 and a wiring member pad 382 are formed. Next, the wiring member 92 is bonded to the wiring member pad 382. After the semiconductor substrate 1 is bonded to the support member 91 using the bonding layer 919, the protective resin 8 is formed. Through the above steps, the thermal print head A1 is obtained.

  Next, the operation of the thermal print head A1 will be described.

  According to the present embodiment, the recess 15 is interposed between the plurality of heat generating portions 41 and the semiconductor substrate 1. For this reason, it is possible to avoid that the heat from the plurality of heat generating portions 41 is excessively transmitted to the semiconductor substrate 1. Therefore, the printing speed of the thermal print head A1 can be increased.

  The recess 15 has a first recess 151 and a second recess 152. The angle between the second recess side surface 1522 and the sealing semiconductor member side surface 163 of the sealing semiconductor member 16 and the main surface 11 is 54.7 degrees. For this reason, it is possible to reduce the clearance gap between the 2nd recessed part side surface 1522 and the sealing semiconductor member side surface 163, and it can suppress that the level | step difference etc. which are not intended in the insulating layer 2 arise. The configuration in which the top surface 130 and the sealing semiconductor member main surface 161 are flush with each other is preferable for suppressing occurrence of an unintended step or the like in the insulating layer 2.

  A convex portion 13 is formed on the semiconductor substrate 1. The plurality of heat generating portions 41 overlap the sealing semiconductor member 16 provided on the top surface 130 as viewed in the thickness direction z. As a result, it is possible to press the portion including the plurality of heat generating portions 41 against the print medium 992 with higher pressure. This is preferable for speeding up printing.

  The convex portion 13 has a top surface 130, a first inclined side surface 131, and a second inclined side surface 132. The top surface 130 is a plane parallel to the main surface 11 and is preferable as a part where the plurality of heat generating portions 41 are formed. The configuration having the first inclined side surface 131 and the second inclined side surface 132 is suitable for forming the wiring layer 3 and the resistor layer 4 so as to straddle them.

  The wiring layer 3 has a first low electric heating region 3021. Thereby, the heat generated in the plurality of heat generating portions 41 is transmitted to the second region 112 side via the first low electric heating region 3021. The low heat transfer layer 302 constituting the first low electric heat region 3021 has a lower thermal conductivity than the high heat transfer layer 301. Therefore, it is possible to prevent heat from the plurality of heat generating portions 41 from being excessively transmitted to the second region 112 side.

  Further, the wiring layer 3 has a second low electric heating region 3022. Accordingly, the plurality of heat generating portions 41 are sandwiched between the first low electric heating region 3021 and the second low electric heating region 3022 in the sub-scanning direction y. Therefore, it is possible to suppress the heat generated in the plurality of heat generating units 41 from being transmitted to portions other than the plurality of heat generating units 41, and more heat can be transmitted to the print medium 992.

  The control element 7 is disposed in the second region 112 and is located closer to the main surface 11 than the conductive protective layer surface S6 in the thickness direction z. Thereby, interference between the control element 7 and the print medium 992 can be avoided. Furthermore, it is preferable that the control element 7 is located on the main surface 11 side of the resistor layer surface S4 in the thickness direction z in order to avoid interference between the control element 7 and the print medium 992.

  Further, the conduction path for energizing the plurality of heat generating portions 41 includes the semiconductor substrate 1. Since conduction is achieved by the semiconductor substrate 1, it is not necessary to form a corresponding portion as a part of the wiring layer 3. Thereby, the area of the wiring layer 3 to be provided on the main surface 11 side can be reduced. As a result, the area for forming the wiring layer 3 can be enlarged, and the wiring layer 3 can be formed more easily in response to the downsizing and pitching of the plurality of heat generating portions 41. Can do. Therefore, it is possible to achieve fine printing.

  The semiconductor substrate 1 is electrically connected to the common electrode 32. The common electrode 32 is a portion that is electrically connected to all of the plurality of heat generating portions 41. For this reason, it is not forced to divide the semiconductor substrate 1 into a plurality of parts insulated from each other.

  The semiconductor substrate 1 is in contact with the wiring side first through conduction portion 321 and the wiring side second through conduction portion 322 through the common electrode first opening 21 and the common electrode second opening 22. The first opening for common electrode 21, the second opening for common electrode 22, the wiring side first through conduction portion 321 and the wiring side second penetration conduction portion 322 sandwich the plurality of heat generating portions 41 in the sub-scanning direction y. With such an arrangement, the portion constituted by the semiconductor substrate 1 in the conduction path is in a form of bypassing the plurality of heat generating portions 41 in the thickness direction z. This is preferable for reducing the size and the pitch between the plurality of heat generating portions 41.

  Furthermore, the part comprised by the semiconductor substrate 1 among the conduction | electrical_connection paths has overlapped with the several control element 7 in thickness direction z view. Thereby, interference between the wiring layer 3 and the plurality of control elements 7 can be suppressed.

  The first common electrode opening 21 extends in the main scanning direction x. Thereby, the contact resistance between the wiring layer 3 and the semiconductor substrate 1 can be reduced.

  The insulating protective layer 5 is electrically connected to the common electrode 32 of the wiring layer 3 through the protective layer penetrating conductive portion 61. The insulating protective layer 5 is a portion that rubs against the print medium 992, and is easily charged with static electricity. This charged charge can be appropriately released to the common electrode 32 of the wiring layer 3.

  FIG. 14 shows another embodiment of the present invention. In these drawings, the same or similar elements as those in the above embodiment are denoted by the same reference numerals as those in the above embodiment.

  A thermal print head A2 shown in FIG. 14 is different from the above-described thermal print head A1 in the configuration of the plurality of heat generating portions 41 and the configuration of the insulating protective layer 5.

  In the present embodiment, the plurality of heat generating portions 41 are constituted by a part of the resistor layer 4, the first extension resistor layer 451, and the second extension resistor layer 452. The insulating protective layer 5 includes a first insulating protective layer 501, a second insulating protective layer 502, and a third insulating protective layer 503 that are stacked on each other.

  The heat generating portion 41 has a first insulation protection on a portion of the resistor layer 4 positioned between the individual electrode 31 and the common electrode 32 and a portion of the resistor layer 4 positioned between the individual electrode 31 and the common electrode 32. A first extension resistor layer 451 stacked with the layer 501 sandwiched therebetween, and a second extension resistor layer 452 stacked with the second insulation protective layer 502 sandwiched between the first extension resistor layer 451.

  The resistor layer 4 includes an insulating portion 43 that insulates a portion located between the individual electrode 31 and the common electrode 32 from a portion located on the first region 111 side.

  A portion of the resistor layer 4 located between the individual electrode 31 and the common electrode 32 and the first extended resistor layer 451 are in contact with each other on the first region 111 side in the sub-scanning direction y. The first insulating protective layer 501 has a first individual-side conduction opening 5011 for bringing the resistor layer 4 and the first extended resistor layer 451 into contact with each other.

  The first extended resistor layer 451 and the second extended resistor layer 452 are in contact with each other on the second region 112 side in the sub-scanning direction y. The second insulating protective layer 502 has a second individual-side conduction opening 5021 that contacts the first extension resistor layer 451 and the second extension resistor layer 452.

  Also according to such an embodiment, the printing speed can be increased. In addition, by forming the heat generating portion 41 with the resistor layer 4, the first extended resistor layer 451, and the second extended resistor layer 452, the conduction path of the heat generating portion 41 can be extended. Thereby, it is possible to increase the amount of heat generated in the heat generating portion 41, which is advantageous for speeding up printing.

  The thermal print head according to the present invention is not limited to the above-described embodiment. The specific configuration of each part of the thermal print head according to the present invention can be varied in design in various ways.

A1, A2: Thermal print head 1: Semiconductor substrate 2: Insulating layer 3: Wiring layer 4: Resistor layer 5: Insulating protective layer 6: Conductive protective layer 7: Control element 8: Protective resin 11: Main surface 12: Back surface 13: Convex part 15: Concave part 16: Sealing semiconductor member 21: First opening for common electrode 22: Second opening for common electrode 31: Individual electrode 32: Common electrode 41: Heat generating part 43: Insulating part 51: Conductive Protective layer opening 52: control element opening 53: wiring member opening 61: protective layer through conductive portion 71: control element electrode 79: conductive bonding material 91: support member 92: wiring member 111: first region 112: 2nd area | region 130: Top surface 131: 1st inclination side surface 132: 2nd inclination side surface 151: 1st recessed part 152: 2nd recessed part 161: Sealing semiconductor member main surface 162: Sealing semiconductor member back surface 163: Sealing semiconductor member ~ side 169: Bonding layer 301: High heat transfer layer 302: Low heat transfer layer 321: Wiring side first through conduction portion 322: Wiring side second through conduction portion 381: Control element pad 382: Wiring member pad 421: Resistance side 1st penetration conduction | electrical_connection part 422: Resistance side 2nd penetration conduction | electrical_connection part 451: 1st extension resistance body layer 452: 2nd extension resistance body layer 501: 1st insulation protection layer 502: 2nd insulation protection layer 503: 3rd insulation protection Layer 911: Concave portion 919: Bonding layer 921: Resin layer 922: Wiring layer 923: Protective layer 991: Platen roller 992: Print medium 1511: First concave bottom surface 1512: First concave side surface 1521: Second concave bottom surface 1522: Second Concave side surface 3021: first low electric heating region 3022: second low electric heating region 5011: first individual side conduction opening 5021: second individual side conduction opening S4: resistor layer surface S6 Conductive protective layer surface x: main scanning direction y: the sub-scanning direction z: thickness direction

Claims (42)

A semiconductor substrate having a main surface and a back surface facing away from each other in the thickness direction;
A resistor layer that is supported on the main surface side of the semiconductor substrate and constitutes a plurality of heat generating portions arranged in a main scanning direction that generates heat by energization;
A wiring layer supported by the semiconductor substrate and included in a conduction path for energizing the plurality of heat generating portions;
An insulating protective layer covering the wiring layer and the resistor layer, and a thermal print head comprising:
The semiconductor substrate has a recess that is recessed from the main surface side to the back surface side,
A sealing semiconductor member main surface and a sealing semiconductor member back surface facing opposite sides in the thickness direction, and a sealing semiconductor member side surface connecting these sealing semiconductor member main surface and sealing semiconductor member back surface; A sealing semiconductor member for closing the recess;
The thermal print head, wherein the plurality of heat generating portions overlap with the sealing semiconductor member in the thickness direction view.   The thermal print head according to claim 1, wherein the recess extends long in the main scanning direction.   The thermal print head according to claim 2, wherein the sealing semiconductor member extends long in a main scanning direction.   4. The thermal device according to claim 3, wherein the recess has a first recess located on the back surface side in the thickness direction, and a second recess positioned on the opposite side of the back surface with respect to the first recess. Print head.   5. The thermal print head according to claim 4, wherein the first recess has a first recess bottom surface parallel to the main surface and a first recess side surface connected to the first recess.   The thermal print head according to claim 5, wherein the second recess has a bottom surface of a second recess that is connected to the first recess and parallel to the main surface.   The thermal print head according to claim 6, wherein the bottom surface of the second concave portion is an annular shape surrounding the first concave portion when viewed in the thickness direction.   The thermal print head according to claim 7, wherein the back surface of the sealing semiconductor member of the sealing semiconductor member and the bottom surface of the second recess are joined.   The thermal print head according to claim 8, wherein the second recess has a second recess side surface connected to the bottom surface of the second recess. The semiconductor substrate has a convex portion protruding in the thickness direction from the main surface and extending in the main scanning direction,
The thermal print head according to claim 9, wherein the concave portion is recessed from the convex portion.   11. The thermal print head according to claim 10, wherein the main surface has a first region and a second region that are separated from each other in the sub-scanning direction across the convex portion. The convex portion is parallel to the main surface and spaced apart from the main surface in the thickness direction, interposed between the top surface and the first region, and inclined with respect to the main surface A first inclined side surface, and a second inclined side surface interposed between the top surface and the second region and inclined with respect to the main surface,
The thermal print head according to claim 11, wherein the recess is recessed from the top surface. The semiconductor substrate is made of Si,
The thermal print head according to claim 12, wherein the main surface and the top surface are (100) surfaces.   The thermal print head according to claim 13, wherein an angle formed by the first inclined side surface and the second inclined side surface with the top surface is 54.7 degrees.   The thermal print head according to claim 14, wherein an angle formed by the side surface of the first concave portion with the top surface is 54.7 degrees.   The thermal print head according to claim 15, wherein an angle formed by a side surface of the second concave portion and the top surface is 54.7 degrees. The sealing semiconductor member is made of Si,
The thermal print head according to claim 16, wherein the back surface of the sealing semiconductor member is a (100) surface.   The thermal print head according to claim 17, wherein an angle formed between a side surface of the sealing semiconductor member and a back surface of the sealing semiconductor member is 54.7 degrees.   The wiring layer is disposed on the opposite side of the plurality of individual electrodes with the plurality of individual electrodes respectively connected to the plurality of heat generation units, and is electrically connected to the plurality of heat generation units. The thermal print head according to claim 12, further comprising a common electrode.   The wiring layer is located on the lower side of the semiconductor substrate and has a relatively high thermal conductivity, and is interposed between the high heat transfer layer and the semiconductor substrate and has a relatively high thermal conductivity. The thermal print head according to claim 19, further comprising a low heat transfer layer having low conductivity.   21. The low heat transfer layer according to claim 20, wherein the low heat transfer layer includes a plurality of first low electric heat regions that are in contact with the plurality of heat generating portions from the second region side in a sub-scanning direction and are exposed from the high heat transfer layer. Thermal print head.   The thermal print head according to claim 21, wherein the plurality of individual electrodes include the plurality of first low electric heating regions.   23. The thermal print according to claim 22, wherein the low heat transfer layer has a second low electric heat region that is in contact with the plurality of heat generating portions from the first region side in the sub-scanning direction and exposed from the high heat transfer layer. head.   The thermal print head according to claim 23, wherein the common electrode includes the second low electric heating region.   The thermal print head according to claim 24, wherein the high heat transfer layer is made of Cu.   The thermal print head according to claim 25, wherein the low heat transfer layer is made of Ti. The insulating protective layer includes a first insulating protective layer, a second insulating protective layer, and a three insulating protective layer stacked on each other,
The heat generating portion includes the first insulating layer in a portion of the resistor layer located between the individual electrode and the common electrode, and a portion of the resistor layer located between the individual electrode and the common electrode. A first extension resistor layer laminated with a protective layer interposed therebetween, and a second extension resistor layer laminated with the second insulation protective layer sandwiched between the first extension resistor layer and the first extension resistor layer. The thermal print head in any one of thru | or 26.   28. The thermal print head according to claim 27, wherein the resistor layer has an insulating portion that insulates a portion located between the individual electrode and the common electrode from a portion located on the first region side.   The portion of the resistor layer located between the individual electrode and the common electrode and the first extended resistor layer are in contact with each other on the first region side in the sub-scanning direction. The thermal print head described in 1.   30. The thermal print head according to claim 29, wherein the first insulating protective layer has a first individual-side conduction opening that contacts the resistor layer and the first extended resistor layer.   31. The thermal print head according to claim 30, wherein the first extension resistor layer and the second extension resistor layer are in contact with each other on the second region side in the sub-scanning direction.   32. The thermal print head according to claim 31, wherein the second insulating protective layer has a second individual-side conduction opening that contacts the first extension resistor layer and the second extension resistor layer. The thermal print head according to claim 19, wherein the conduction path includes the semiconductor substrate.   The thermal print head according to claim 33, wherein the common electrode and the semiconductor substrate are electrically connected. Comprising an insulating layer provided between the semiconductor substrate and the wiring layer and the resistor layer;
35. The thermal print head according to claim 34, wherein the insulating layer has a first opening for a common electrode that conducts the semiconductor substrate and the common electrode.   36. The thermal print head according to claim 35, wherein the first opening for common electrode has a shape extending in the main scanning direction.   37. The thermal print head according to claim 33, further comprising a conductive protective layer that overlaps the plurality of heat generating portions when viewed in the thickness direction and is laminated on the insulating protective layer.   38. The thermal print head according to claim 37, wherein the conductive protective layer is made of TiN.   39. The thermal print head according to claim 38, wherein the insulating protective layer has an opening for a conductive protective layer that conducts the conductive protective layer and the common electrode.   40. The thermal print head according to claim 39, wherein the conductive protective layer opening overlaps the first region when viewed in the thickness direction.   41. The thermal print head according to claim 33, wherein the semiconductor substrate is made of a material obtained by doping Si with a metal element.   42. The thermal print head according to claim 41, wherein the resistor layer is made of TaN.

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