JP2015173160A - via filling plating method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten a plating time while filling the inside of a via hole having a large aspect ratio and a small diameter with an electric plated film with certainty, and thereby, to achieve reduction in cost.SOLUTION: A first copper foil 2a is formed on one surface of an insulating layer 1, and a second conductor layer 3 is formed on the other surface, and a via hole 4 is formed with laser light from above the first copper foil 2a. Then, a copper coat 2b is formed, and a plating accelerator is adhered only on the copper coat 2b in the via hole 4. Next, an electric plated film 2c is formed on the copper coat 2b. As a result, on the insulating layer 1, a first conductor layer 2 consisting of the first copper foil 2a, the copper coat 2b, and the electric plated film 2c is formed and patterned to connect a first wiring pattern 21 and a second wiring pattern 31 with each other via a via conductor 2d. In addition, a thickness of the first conductor layer 2 is 10-22 μm, and a thickness of the electric plated film 2c is 5-12 μm.

Description

  The present invention relates to a via filling plating method in which a conductor layer is embedded by electroplating in a via hole connecting a lower layer wiring and an upper layer wiring of a multilayer wiring board. More specifically, the present invention relates to a via filling plating method capable of suppressing the formation of a plating film on the surface as much as possible while promoting the plating in the via hole and reducing the plating time.

  The multilayer wiring board is formed by, for example, a build-up method. The build-up method repeats a process in which insulating layers are laminated and a process in which a wiring layer formed on one surface of each layer is connected to a lower wiring layer by a via conductor formed in a via hole. It is a method to be formed. For example, as shown in Patent Document 1, the via conductor is formed by performing electroplating in a state where a plating accelerator is attached only in the via hole.

Japanese Patent Laid-Open No. 2001-291554

  However, if the wiring layer formed on the surface side of the insulating layer outside the via hole does not have a certain thickness, the wiring layer is disconnected or the wiring resistance increases. Therefore, the adhesion of the plating accelerator is controlled so that the thickness of the conductor layer serving as the wiring layer formed on the surface side of the insulating layer becomes the desired thickness while the via hole is completely filled with the electroplating film. There is a problem that it is necessary, but its control is very difficult.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a via filling plating method for a multilayer wiring board capable of reducing the plating time while reliably filling the inside of a small-diameter via hole having a large aspect ratio by electroplating, thereby achieving cost reduction. It is to be.

In the via filling plating method of the present invention, the copper foil and the insulation are formed by forming a copper foil on both surfaces of the insulating layer and irradiating a laser beam on the copper foil formed on the upper surface of the insulating layer. Forming a via hole so that the copper foil on the lower surface is exposed by removing a part of the layer, and forming a copper film on the exposed surface in the via hole and the exposed surface of the copper foil;
Depositing a plating accelerator on the copper film; removing the plating accelerator on the copper film excluding the inside of the via hole; and forming an electroplated film on the copper film by electroplating. In the formation of the electroplating film, the via hole is filled with an electroplating film, and the copper foil, the copper film, and the copper film on the insulating layer in which the via hole is not formed, The thickness of the conductor layer including the electroplating film is 10 to 22 μm, and the thickness of the electroplating film is 5 to 12 μm.

  In another form of the via filling plating method of the present invention, an insulating layer and a copper foil are sequentially formed on a lower conductor layer, and the copper foil and the copper foil are irradiated by irradiating laser light on the copper foil. Forming a via hole so that each of the insulating layers is removed to expose the underlying conductor layer; and forming a copper film on the exposed surface of the via hole and the exposed surface of the copper foil; Depositing a plating accelerator on the copper film; removing the plating accelerator on the copper film excluding the inside of the via hole; and forming an electroplated film on the copper film by electroplating. And in the formation of the electroplating film, the via hole is filled with the electroplating film and the via hole is not formed on the insulating layer. And 10~22μm the thickness of the conductor layer comprising a Kidohaku and the copper film and said electroplated film and a 5~12μm the thickness of the electroplating film.

  With this configuration, the electroplated film can be efficiently formed in the via hole. At the same time, the thickness of the conductor layer as the wiring layer is ensured in a short time. As a result, improvement in the reliability of the conductor layer and cost reduction are achieved.

Process drawing which shows the via filling plating method of one Embodiment of this invention. The figure which shows the further detailed process of the (c) process of FIG. The figure which compared the cross-sectional photograph of the via hole of the state which formed the electroplating film in the middle of the method of FIG. 1 with the cross-sectional photograph of the state electroplated without attaching a plating accelerator at all. The figure which shows a manufacturing process in case a wiring layer is further formed in both surfaces of the wiring layer formed in FIG. The figure which shows the multilayer wiring board of the 4 layer structure formed in FIG. The figure which shows the multilayer wiring board in which the wiring layer was further formed in both surfaces of the multilayer wiring board of the 3 layer structure shown by FIG. 5, and was formed in the 6 layer structure.

  Next, the via filling plating method of this embodiment refers to FIG. 1 which shows an example in which a via conductor and a wiring layer are formed on a core substrate made of a single insulating layer in which a copper foil is formed on both sides. Explained.

  In the via filling plating method of the present embodiment, as shown in FIG. 1, first, the first copper foil 2a and the second copper foil 2a that become part of the first conductor layer 2 and the second conductor layer 3 are formed on both surfaces of the insulating layer 1. Copper foil 3a is formed. Next, a portion of the first copper foil 2a and the insulating layer 1 is removed by irradiating a laser beam from above the first copper foil 2a to a place where the via hole 4 of the insulating layer 1 is formed. The via hole 4 is formed by exposing the second copper foil 3a. Then, copper films 2b and 3b are formed by electroless plating on the exposed surfaces in the via holes 4, and on the upper surfaces of the first copper foil 2a and the second copper foil 3a. Next, the plating accelerator 5 (see FIG. 2A) is attached on the copper coatings 2b and 3b. A portion of the plating accelerator 5 other than the inside of the via hole 4 is removed (see FIG. 2B). Next, as shown in FIG. 1 (d), electroplated films 2c and 3c are formed in the via holes 4, on the first copper foil 2a and on the copper films 2b and 3b on the second copper foil 3a by electroplating. Is done. As a result, the electroplating film 2c is embedded in the via hole 4 to form the via conductor 2d together with the copper film 2b. On the both surfaces of the insulating layer 1, the first copper foil 2a, the copper film 2b, and the electroplating film 2c The first conductor layer 2 and the second copper foil 3a, the copper coating 3b, and the second conductor layer 3 comprising the second plating film 3c are formed. Then, as shown in FIG. 1E, by patterning, the first wiring pattern 21 and the second wiring pattern 31 are connected via the via conductor 2d.

  In the present invention, the inside of the via hole 4 is completely filled with the electroplating film 2d, and the first conductor layer 2 including the first copper foil 2a and the second copper layer 3a on both surfaces of the insulating layer 1 are provided. 3 has a thickness of 10 to 22 μm, and the first and second electroplating films 2 c and 3 c have a thickness of 5 to 12 μm. Further details will be described with reference to FIGS.

  First, as shown in FIG. 1A, the first copper foil 2 a and the second copper foil 3 a are attached to both surfaces of the insulating layer 1. As the insulating layer 1, for example, an insulating layer made of a resin containing glass fiber having a thickness of about 40 to 75 μm or a resin alone can be used. As the resin, for example, epoxy or polyphenylene ether (PPE) can be used. The first copper foil 2a and the second copper foil 3a provided on the one surface side and the other surface side of the insulating layer 1 have a thickness of about 5 to 10 μm. In the first copper foil 2a and the second copper foil 3a, a copper foil having a thickness exceeding 10 μm may be once laminated on the surface of the insulating layer 1, and may be thinned to 5 to 10 μm by a known means such as etching. The first copper foil 2a and the second copper foil 3a on both sides are formed so thin that the copper coatings 2b, 3b and the electroplating films 2c, 3c are formed on this surface. That is, all of the first conductor layer 2 on the one surface side can be formed by plating. However, since plating takes time and increases costs, a part of the first conductor layer 2 is formed of the first copper foil 2a.

  Next, as shown in FIG. 1B, a via hole 4 is formed at a predetermined location. The via hole 4 is formed in a portion where the lower wiring pattern 31 (see FIG. 1E) and the upper wiring pattern 21 are connected. Therefore, the via hole 4 is formed so that the lower second copper foil 3a is exposed in accordance with the position of the lower layer wiring 31 to be connected.

The via hole 4 is formed by, for example, laser light irradiation. For example, a CO ₂ laser is used as the laser light. The via hole 4 is formed by laser beam irradiation from the surface side of the first copper foil 2a. Here, the insulating layer 1 is more easily sublimated than the first copper foil 2a. Therefore, even when the laser beam is irradiated, the first copper foil 2a does not have a hole in the middle, and the underlying insulating layer 1 is sublimated due to an increase in temperature. As a result, as shown in FIG. 1B, the diameter of the first copper foil 2 a is smaller than the diameter of the via hole 4 in the portion of the insulating layer 1 in the via hole 4. Therefore, the periphery of the first copper foil 2 a has a structure in which the end of the first copper foil 2 a protrudes on the via hole 4 so as to cover the periphery of the opening of the via hole 4. The protruding amount of the first copper foil 2a can be adjusted by changing the energy density distribution of the laser light.

Next, as shown in FIG. 1C, copper coatings 2b and 3b are formed in the via conductor 4 and on the surfaces of the first copper foil 2a and the second copper foil 3a, for example, by electroless plating. The method of electroless plating is performed by a normal method. For example, in order to perform electroless copper plating, a film having catalytic activity such as palladium is formed on the surface, and an aqueous solution containing Cu ²⁺ is used. It utilizes the fact that Cu ²⁺ is reduced and copper is precipitated by electrons released by oxidation of a reducing agent such as formaldehyde on the surface of the catalyst.

  The copper coatings 2b and 3b are conductive layers so that the surface of the insulating layer 1 can be electroplated, and may be any thickness as long as current can flow. It is formed to a thickness of about 0.5 μm. Therefore, the copper coating 2b may be formed by a method such as sputtering or vacuum deposition without using electroless plating.

Next, as shown in FIG. 2 (a), the plating accelerator 5 is deposited in the via hole 4 and on the surfaces of the copper coatings 2b and 3b on one side and the other side. The adhesion formation of the plating accelerator 5 is performed, for example, by immersing it in an aqueous solution in which a plating accelerator called brightener is dissolved at a weight concentration of about 10 ⁴ ppm for about 10 to 20 minutes. Examples of the plating accelerator 5 include sulfur compounds such as sodium 3-mercapto-1-propanesulfonate, sodium 2-mercaptoethanesulfonate, and bis- (3-sulfopropyl) -disulfide disodium. In order to sufficiently attach the plating accelerator 5 in the via hole 4, the plating accelerator solution is immersed in the insulating layer 1 (the object to be plated) on which the copper coating 2b is formed in the plating accelerator solution. It is preferable to stir or rock the object to be plated.

  When the plating accelerator 5 adheres to the surface of the object to be plated, it forms a complex with monovalent copper ions and is reduced to metallic copper with lower energy than the divalent copper ions in the plating solution. The deposition of the plating metal is promoted. When the plating accelerator 5 is attached to the surface of the object to be plated, the plating accelerator 5 has an effect of promoting the plating. However, even when added to the electroplating solution, the effect of promoting the plating can be obtained.

  Thereafter, although not shown, the insulating layer on which the copper coatings 2b and 3b are formed is washed with water. This washing also removes some of the plating accelerator 5 adhering to the surfaces of the copper film 2b (the flat portion that is not the via hole 4) and 3b on the first copper foil 2a and the second copper foil 3a. The plating accelerator 5 adhering to the wall surface is hardly removed because the end portion of the first copper foil 2a slightly extends to the inside of the via hole 4 to form a wall.

  When the copper coating 2b is formed by electroless plating, a strike copper plating coating by electrolysis is formed on the copper coating 2b between the step of forming the copper coatings 2b and 3b and the step of immersing in the plating accelerator solution. Preferably it is formed. Thereby, since a pure copper film is formed on the copper film 2b, the adhesion of the plating accelerator 5 due to oxidation of the surface of the copper film 2b by electroless plating is prevented. That is, the plating accelerator 5 uniformly adheres to the surface of the clean copper coating 2b, so that the electroplating film 2c by electroplating is reliably embedded in the via hole 4.

  Thereafter, as shown in FIG. 2 (b), the plating accelerator 5 attached to the surfaces of the copper coatings 2b and 3b (flat portions other than the via holes 4) on the first copper foil 2a and the second copper foil 3a is removed. (Peeling process). This peeling step is performed by immersing the entire insulating layer 1 on which the copper coatings 2b and 3b are formed in a copper etching solution such as a ferrous chloride aqueous solution and washing with water. According to this method of dipping in a copper etching solution for a short time, the etching solution does not completely enter the via hole 4, so the plating accelerator 5 in the via hole 4 is hardly removed, and the other first copper foil 2a, only the etching accelerator 5 on the flat surface on the second copper foil 3a is selectively removed.

  The peeling of the etching accelerator 5 can be performed not only by the above method but also by cyan electrolysis with a cyanide electrolyte. Alternatively, the plating accelerator 5 can be decomposed and removed by ultraviolet treatment in which ultraviolet rays are obliquely applied to the surfaces of the electrolessly plated copper coatings 2b and 3b. By irradiating such ultraviolet rays obliquely, the penetration of the ultraviolet rays into the via hole 4 can be prevented, and only the flat surface can be selectively removed. As yet another method, the surface of the insulating layer 1 can be selectively removed by polishing the surface on which the first copper foil 2a and the second copper foil 3a are formed. According to this polishing method, since the portion from which the plating accelerator 5 is removed is a substantially flat surface, the other plating accelerators 5 are effectively removed without removing the plating accelerator 5 in the via hole 4. And can be easily removed.

  The plating accelerator 5 is peeled off without providing a special peeling step as described above, for example, in the electroplating step, at the initial stage of starting electroplating, the polarity of the applied voltage at the time of electroplating is reversed. It is also possible to carry out the reverse electrolysis treatment by applying a voltage. This reverse electrolysis treatment may be, for example, a method of performing copper plating for several minutes by inverting the polarity of the anode and the cathode every 30 seconds after several minutes from the start of electroplating. This reverse electrolysis treatment is effective for intensively performing electroplating in the via hole 4 if the reverse electrolysis treatment is performed in the middle of electroplating even when the above-described plating accelerator removal step is performed. In particular, the effect is great when the plating accelerator is added to the electroplating solution to shorten the plating processing time. By applying a voltage with the polarity of the applied voltage reversed, the copper film 2b is peeled off. However, since the direction of the applied voltage is opposite to that of the original electroplating, the plating is particularly performed. There is no action of concentrating the current by the promoter 5, and reverse electrolysis hardly acts in the via hole 4, and the plating accelerator 5 on the surfaces of the first copper foil 2 a and the second copper foil 3 a, that is, the flat surface. Is peeled off remarkably. As a result, the plating accelerator 5 in the via hole 4 can remain as it is without being peeled off.

  Further, as another method of peeling the plating accelerator 5 other than the inside of the via hole 4 without providing a special peeling step, a pulse in which positive and negative are reversed during electroplating (a high potential is positive and a low potential is set). It can also be carried out by electroplating by applying a negative pulse) voltage. When such a pulse voltage is applied, normal electroplating is performed when the voltage is positive, and when the voltage is negative, the plating is peeled off, that is, the same as the reverse electrolysis process described above, and flat. The reverse electrolysis process on the surface is preferentially performed, and the reverse electrolysis process in the via hole 4 is hardly performed. As a result, the electroplating hardly progresses on the flat surface, and the electroplated film 2c is preferentially formed only in the via hole 4.

  A surface having a substantially uniform surface while the via hole 4 is completely filled with the electroplating film 2c by appropriately mixing the electroplating method by the pulse voltage or the plating film peeling by the reverse electrolysis described above. Can be plated to That is, for example, until the inside of the via hole 4 is completely buried, the above-described pulse plating or plating while sandwiching the reverse electrolytic treatment is performed, and when the inside of the via hole 4 is completely buried and the surface is flattened, the first conductor layer is formed. Ordinary electroplating is performed until the 2 and second conductor layers 3 have a desired thickness. In the present invention, as described above, since the first copper foil 2a is provided, the electroplating after the surface is flattened can be greatly reduced.

  Next, the whole insulating layer 1 (to-be-plated object) to which the plating accelerator 5 has adhered in the via hole 4 is immersed in a plating solution, and electroplating is performed. As the plating solution, for example, an aqueous solution of copper sulfate and sulfuric acid is used. A plating accelerator (brightener), a plating inhibitor (wetter), or the like may be added to the plating solution. As the plating accelerator, the same material as the plating accelerator dissolved in the above-described plating accelerator solution may be used. Even when a plating accelerator is added, the concentration is preferably lower than the concentration of the plating accelerator in the above-described plating accelerator solution. When the concentration of the plating accelerator 5 in the plating solution is high, the plating accelerator also adheres to the flat surface from which the plating accelerator 5 has been removed, and the thickness of the electroplating films 2c and 3c on the flat surface increases. It is because it is too much. The plating accelerator 5 may not be added. In addition, when the wetter is added, the wetter adheres to the surface other than the via hole 4 to which the plating accelerator 5 does not adhere, and the formation of the electroplated films 2c and 3c on the flat surface is suppressed.

  In this state, a voltage is applied between the copper electrode immersed in an etching solution (not shown) and the copper coatings 2b and 3b of the object to be plated so that the copper coatings 2b and 3b serve as cathodes, as shown in FIG. And as FIG.2 (d) shows, the electroplating films 2c and 3c are formed on the copper coatings 2b and 3b. By this electroplating film 2c, the via hole 4 is completely filled, and a via conductor 2d is formed.

  As described above, the plating accelerator 5 adheres on the copper coating 2b in the via hole 4 and the electroplating is performed in a state where the plating accelerator other than in the via hole 4 is removed. As described above, the plating accelerator 5 makes it easy to reduce copper ions in the plating solution to metallic copper with low energy. And formation of the electroplating films 2c and 3c is suppressed above the copper coatings 2b and 3b where the first copper foil 2a and the second copper foil 3a other than the via hole 4 remain. As a result, as shown in FIG. 2 (c) and FIG. 1 (d), the via-hole 4 is filled with the electrolytic copper plating film, that is, via-filled to become the via conductor 2d, and the electric on the first copper foil 2a. The plating film 2c and the electroplating film 2c on the via conductor 2d are substantially flat. Since the first copper foil 2a, the copper coating 2b, and the electroplating film 2c are all copper films, they are integrated with each other. Therefore, in FIG. 1 (d) and FIG. It is shown as 2. Further, the second copper foil 3a, the copper coating 3b, and the electroplating film 3c are integrated and represented as the second conductor layer 3.

  The first conductor layer 2 and the second conductor layer 3 on the insulating layer 1 other than the via hole 4 are made of a first copper foil 2a (second copper foil 3a), copper coatings 2b and 3b, and electroplating films 2c and 3c, respectively. The electroplating film 2c3c is formed to a thickness of 5 to 12 μm in total thickness of 10 to 22 μm. If the thickness of the first conductor layer 2 is too thick, it will not be able to meet the demand for thinner electronic components and will only lead to an increase in cost. If it is too thin, it will lead to wire breakage and an increase in electrical resistance. Because. Further, the electroplating films 2c and 3c are formed so as to have a thickness of about 5 to 12 μm. This is because some electroplating film 2c is also formed on the flat surface on the insulating layer 1 while the via hole 4 is completely buried, so that the flatness between the formed portion and the portion of the via hole 4 can be obtained. In order to do so, it is a thickness that takes into account the amount required. From such a viewpoint, the 1st copper foil 2a and the 2nd copper foil 3a are 5-10 micrometers in thickness, respectively. That is, by using the first copper foil 2a, the electroplating time can be shortened by the thickness of the first copper foil 2a, which contributes to cost reduction.

  Thereafter, as shown in FIG. 1E, the first conductor layer 2 and the second conductor layer 3 are patterned and the first wiring layer 21 and the second wiring layer 31 are connected via the via conductor 2d. A plate is formed.

  The effect of the plating accelerator 5 was verified. A wiring board in which the diameter of the opening of the first copper foil 2a is 70 μm, the thickness of the insulating layer 1 is 65 μm, the pitch of the via holes 4 is 0.3 mm, and the number of vias is 225 is used as an embodiment of the present invention. After immersing in the accelerator solution for 15 minutes, 1 μm etching was performed with a solution of sodium persulfate. Further, as a comparative example, electrolytic copper plating was performed on a sample that was not immersed in a plating accelerator solution or subjected to surface etching before electroplating. The result is shown in FIG. 3A is a cross-sectional photograph inside the via hole 4 of the embodiment, and FIG. 3B is a cross-sectional photograph inside the via hole 4 of the comparative example.

  As apparent from FIG. 3, according to the present invention, the copper film by electroplating surely grows from the bottom surface in the via hole 4, and the electroplated film 2 c is also formed on the inner surface of the via hole 4. I understand. The photograph shown in FIG. 3A shows a state in which the upper portion of the via hole 4 is not yet filled because electroplating is not performed until the via hole 4 is completely filled. However, compared to the formation of the electroplating film 2c in the via hole 4, the formation of the electroplating film 2c on the surface of the first copper foil 2a is significantly less, and the formation of the electroplating film 2a in the portion other than the inside of the via hole 4 is difficult. This shows that the formation of the electroplated film 2c in the via hole 4 is remarkable.

  According to the configuration of the present embodiment, the first copper foil 2a and the second copper foil 3a are formed on both surfaces of the insulating layer 1, and the first copper foil 2a is irradiated with laser light from above the first copper foil 2a. A part of the foil 2a and the insulating layer 1 is sublimated and removed, and a via hole 4 is formed.

  For this reason, first, the diameter of the opening of the via hole 4 of the insulating layer 1 that is easily sublimated by laser light irradiation is larger than the diameter of the opening of the first copper foil 2a. Accordingly, the opening of the via hole 4 is formed in a structure that is covered by the end of the first copper foil 2a around the opening. As a result, when the plating accelerator 5 other than the inside of the via hole 4 is removed after the above-described plating accelerator 5 is attached to the entire surface, the intrusion of the etching solution or the like into the via hole 4 can be suppressed. As a result, the plating accelerator 5 adhering in the via hole 4 is hardly removed, and only the plating accelerator 5 on the surface side of the flat insulating layer 1 is easily efficiently peeled off.

  As a result, the formation of the electroplating film 2c in the via hole 4 is promoted, and the formation of the electroplating film 2c on the surface other than the inside of the via hole 4 is suppressed. That is, since the electroplating film 2c in the via hole 4 is exclusively formed and the formation of the electroplating film 2c other than the via hole 4 is suppressed, flattening of the portion of the via hole 4 and the other portion is easily performed. .

  Secondly, since the first copper foil 2a is attached to the surface of the insulating layer 1, the surface of the via hole 4 is almost flat with other parts without performing electroplating for a long time. When it becomes, the required thickness of the conductor layer 2 is obtained, and the time for electroplating can be shortened, which contributes to cost reduction. As a result, a significant cost reduction can be achieved, and the surface flatness can be easily controlled during electroplating.

  An insulating layer and a conductor layer are further built up on both surfaces of the wiring board on which the first wiring layer 21 and the second wiring layer 31 are formed on both surfaces of the insulating layer 1 shown in FIG. The manufacturing process of the embodiment in which the fourth wiring layer 32 is formed will be described with reference to FIG. That is, in this example, the insulating layer and the wiring layer are further built up on the wiring layer on which the first wiring layer 21 and the second wiring layer 31 are formed as shown in FIG.

  First, as shown in FIG. 4A, the second insulating layer 11, the third insulating layer 12, the second copper foil 22a, and the third copper foil 32a are formed on both sides of the wiring board formed in FIG. As in the method shown in FIG. 1, the film is attached by heating while applying pressure. The second insulating layer 11 and the third insulating layer 12 may be made of the same material and thickness as those of the first insulating layer, or may be made of different materials and different thicknesses.

  Next, as shown in FIG. 4B, via holes are formed at predetermined locations on the second insulating layer 12 and the second copper foil 22a, and on the third insulating layer 13 and the third copper foil 32a using laser light. 41 and 42 are formed. The equipment and method such as laser light are the same as the method shown in FIG.

  Thereafter, although not shown, copper films 22b and 32b (see FIG. 4C) are formed in the same manner as shown in FIG. Thereafter, similar to the process shown in FIG. 2, the copper coating on the second copper foil 22a and the third copper foil 32a except for the inside of the via holes 41 and 42 after the plating accelerator is attached to the entire surface. The plating accelerator on 22b and 32b is removed.

  The aqueous solution of the plating accelerator, its adhesion method, part of the removal method, and the like can be the same as the method shown in FIG. Thereafter, as shown in FIG. 4C, electroplated films 22c and 32c are formed by electroplating. At this time, since a plating accelerator (not shown) is applied in the via holes 41 and 42, the via holes 41 and 42 are completely buried by electroplating, and the via holes 41 and 42 and portions other than the via holes 41 and 42 are formed. Electroplating is performed so that the heights are substantially the same.

  Thereafter, the conductor layer composed of the second copper foil 22a, the copper coating 22b, and the electroplating film 22c, and the conductor layer composed of the third copper foil 32a, the copper coating 33b, and the electroplating film 32c are put into a pattern. A four-layer wiring board as shown in FIG. 5 in which the wiring patterns 22 and 23 are formed is formed.

  Further, FIG. 6 shows an embodiment in which one insulating layer and one conductive layer are laminated on the third wiring layer 22 and the fourth wiring layer 32 on both sides. Similarly to the example shown in FIG. 4, the fourth insulating layer 13, the fifth insulating layer 14, a fourth copper foil (not shown), and a fifth copper foil are attached to this example, and a copper film (not shown) is attached. Then, adhesion of a plating accelerator, formation of an electroplating film is performed, and patterning is performed, whereby the fifth wiring layer 23 and the sixth wiring layer 33 are formed, and the via hole is completely filled by electroplating. A six-layer wiring board having the structure shown in FIG. 6 is formed.

DESCRIPTION OF SYMBOLS 1 Insulating layer 2 1st conductor layer 2a 1st copper foil 2b copper coating 2c electroplating film 2d via conductor 3 2nd conductor layer 4 via hole 5 plating accelerator 6 plating inhibitor 11 2nd insulating layer 12 3rd insulating layer 13 1st 4 Insulating layer 14 5th insulating layer 21 1st wiring layer 22 3rd wiring layer 23 5th wiring layer 31 2nd wiring layer 32 4th wiring layer 33 6th wiring layer

Claims (6)

Forming copper foil on both sides of the insulating layer;
By irradiating a laser beam on the copper foil formed on the upper surface of the insulating layer, a via hole is formed so that the copper foil on the lower surface is exposed by removing part of the copper foil and the insulating layer. And
Forming a copper film on the exposed surface in the via hole and the exposed surface of the copper foil;
Depositing a plating accelerator on the copper coating;
Removing the plating accelerator on the copper coating except in the via hole;
Forming an electroplated film on the copper coating by electroplating;
A via filling plating method comprising:
In the formation of the electroplating film, the via hole is filled with an electroplating film, and the thickness of the conductor layer including the copper foil, the copper coating, and the electroplating film on the insulating layer where the via hole is not formed. The thickness of the electroplating film is 5 to 12 μm. Sequentially forming an insulating layer and a copper foil on the lower conductor layer;
By irradiating laser light on the copper foil, forming a via hole so that the copper foil and a part of the insulating layer are removed to expose the underlying conductor layer;
Forming a copper film on the exposed surface in the via hole and the exposed surface of the copper foil;
Depositing a plating accelerator on the copper coating;
Removing the plating accelerator on the copper coating except in the via hole;
Forming an electroplated film on the copper coating by electroplating;
A via filling plating method comprising:
In the formation of the electroplating film, the via hole is filled with an electroplating film, and the thickness of the conductor layer including the copper foil, the copper coating, and the electroplating film on the insulating layer where the via hole is not formed. The thickness of the electroplating film is 5 to 12 μm. 3. The via filling plating method according to claim 1, wherein in forming the via hole, an end portion of the copper foil is protruded from a side wall of the insulating layer of the via hole. The via filling plating method according to any one of claims 1 to 3, wherein in the electroplating, a plating accelerator is included in a plating solution of the electroplating, and the plating acceleration with respect to the plating solution is performed. A plating solution in which the concentration of the agent is smaller than the concentration of the plating accelerator in the plating accelerator solution for attaching the plating accelerator on the copper coating is used. 5. The via filling plating method according to claim 1, wherein in removing the plating accelerator, the plating accelerator is removed by using a copper etching solution. 5. The via filling plating method according to claim 1, wherein in removing the plating accelerator, the plating accelerator is removed by mechanical polishing.