JP2008300782A - 貫通電極付き基板の製造方法 - Google Patents
貫通電極付き基板の製造方法 Download PDFInfo
- Publication number
- JP2008300782A JP2008300782A JP2007148182A JP2007148182A JP2008300782A JP 2008300782 A JP2008300782 A JP 2008300782A JP 2007148182 A JP2007148182 A JP 2007148182A JP 2007148182 A JP2007148182 A JP 2007148182A JP 2008300782 A JP2008300782 A JP 2008300782A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- substrate
- layer
- support plate
- opening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H10W20/023—
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
- H05K3/4605—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material
-
- H10W20/0261—
-
- H10W20/0265—
-
- H10W70/095—
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0376—Etching temporary metallic carrier substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/063—Lamination of preperforated insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
-
- H10W70/698—
-
- H10W90/401—
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrostatic, Electromagnetic, Magneto- Strictive, And Variable-Resistance Transducers (AREA)
- Pressure Sensors (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
【解決手段】貫通孔18を有した基板11と、貫通孔18に収容された貫通電極14と、を備えた貫通電極付き基板10の製造方法であって、支持板上に貫通電極14を形成する貫通電極形成工程と、基板11を形成する基板形成工程と、支持板に基板11を重ねて、貫通孔18に貫通電極14を収容する貫通電極収容工程と、基板11の貫通孔18の内壁と貫通電極14の側面との隙間に樹脂12を充填する樹脂充填工程と、樹脂充填工程後に、支持板を除去する支持板除去工程と、を含む。
【選択図】図13
Description
図13は、本発明の第1の実施の形態に係る貫通電極付き基板の断面図である。
図30は、本発明の第2の実施の形態に係る貫通電極付き基板の断面図である。図30において、第1の実施の形態の貫通電極付き基板10と同一構成部分には同一符号を付す。
図31は、本発明の第3の実施の形態に係る貫通電極付き基板の断面図である。図31において、第1の実施の形態の貫通電極付き基板10と同一構成部分には同一符号を付す。
11 基板
11A,14A,25A,28A,45A 上面
11B,21A 下面
12 樹脂
13,33 拡散防止膜
14 貫通電極
16,72 ビルドアップ構造体
17 外部接続端子
18 貫通孔
22,38 Ni層
21,39 Au層
25,28 樹脂層
26,29,73 配線パターン
32 ソルダーレジスト
32A,35,37,48A 開口部
45 支持板
46 シード層
48 レジスト膜
71 導体層
L1 長さ
M1〜M2 厚さ
R1〜R2 直径
Claims (4)
- 貫通孔を有した基板と、前記貫通孔に収容された貫通電極と、を備えた貫通電極付き基板の製造方法であって、
支持板上に前記貫通電極を形成する貫通電極形成工程と、
前記基板を形成する基板形成工程と、
前記支持板と前記基板とを重ね合わせて、前記貫通孔に前記貫通電極を収容する貫通電極収容工程と、
前記基板の前記貫通孔の内壁と前記貫通電極の側面との隙間に樹脂を充填する樹脂充填工程と、
前記樹脂充填工程後に、前記支持板を除去する支持板除去工程と、を含むことを特徴とする貫通電極付き基板の製造方法。 - 前記貫通電極形成工程では、前記貫通電極を電解めっきにより形成することを特徴とする請求項1記載の貫通電極付き基板の製造方法。
- 前記貫通電極形成工程では、前記支持板上に開口部を有したレジスト膜を形成し、その後、前記電解めっきにより、前記開口部の底部に露出された前記支持体上から前記開口部の開口端部に向けてめっき膜を析出させて前記貫通電極を形成し、前記貫通電極を形成後に前記レジスト膜を除去することを特徴とする請求項2記載の貫通電極付き基板の製造方法。
- 前記樹脂充填工程と前記支持板除去工程との間に、前記支持板が設けられた側とは反対側に位置する前記基板の面に前記貫通電極と電気的に接続された配線層を形成する配線層形成工程を設けたことを特徴とする請求項1ないし3のうち、いずれか一項記載の貫通電極付き基板の製造方法。
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007148182A JP5193503B2 (ja) | 2007-06-04 | 2007-06-04 | 貫通電極付き基板及びその製造方法 |
| KR1020080051603A KR20080106844A (ko) | 2007-06-04 | 2008-06-02 | 관통 전극을 갖는 기판의 제조 방법 |
| TW097120562A TW200850096A (en) | 2007-06-04 | 2008-06-03 | Manufacturing method of substrate with through electrode |
| US12/132,187 US8349733B2 (en) | 2007-06-04 | 2008-06-03 | Manufacturing method of substrate with through electrode |
| CNA2008101086822A CN101320695A (zh) | 2007-06-04 | 2008-06-04 | 带穿通电极的基板的制造方法 |
| EP08157592A EP2001274A3 (en) | 2007-06-04 | 2008-06-04 | Manufacturing method of substrate with through electrodes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007148182A JP5193503B2 (ja) | 2007-06-04 | 2007-06-04 | 貫通電極付き基板及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008300782A true JP2008300782A (ja) | 2008-12-11 |
| JP2008300782A5 JP2008300782A5 (ja) | 2010-05-20 |
| JP5193503B2 JP5193503B2 (ja) | 2013-05-08 |
Family
ID=39731510
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007148182A Active JP5193503B2 (ja) | 2007-06-04 | 2007-06-04 | 貫通電極付き基板及びその製造方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8349733B2 (ja) |
| EP (1) | EP2001274A3 (ja) |
| JP (1) | JP5193503B2 (ja) |
| KR (1) | KR20080106844A (ja) |
| CN (1) | CN101320695A (ja) |
| TW (1) | TW200850096A (ja) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012015209A (ja) * | 2010-06-29 | 2012-01-19 | Advantest Corp | 貫通配線基板および製造方法 |
| JP2012015201A (ja) * | 2010-06-29 | 2012-01-19 | Advantest Corp | 貫通配線基板および製造方法 |
| US8748312B2 (en) | 2011-12-20 | 2014-06-10 | Samsung Electronics Co., Ltd. | Method of manufacturing substrate for mounting electronic device |
| JP2016039512A (ja) * | 2014-08-08 | 2016-03-22 | キヤノン株式会社 | 電極が貫通配線と繋がったデバイス、及びその製造方法 |
| JP2017073534A (ja) * | 2015-10-07 | 2017-04-13 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | プリント回路基板及びその製造方法 |
| WO2017164043A1 (ja) * | 2016-03-25 | 2017-09-28 | 住友精密工業株式会社 | 充填方法 |
| JP2017538280A (ja) * | 2014-10-31 | 2017-12-21 | エーティーアイ・テクノロジーズ・ユーエルシーAti Technologies Ulc | 制約されたはんだ相互接続パッドを備える回路基板 |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8288872B2 (en) * | 2008-08-05 | 2012-10-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Through silicon via layout |
| US8294240B2 (en) * | 2009-06-08 | 2012-10-23 | Qualcomm Incorporated | Through silicon via with embedded decoupling capacitor |
| KR101095373B1 (ko) * | 2010-04-22 | 2011-12-16 | 재단법인 서울테크노파크 | 장벽층을 갖는 범프를 포함하는 반도체칩 및 그 제조방법 |
| KR20120012602A (ko) * | 2010-08-02 | 2012-02-10 | 삼성전자주식회사 | 반도체 장치, 그 제조 방법 및 반도체 패키지의 제조 방법 |
| US8693203B2 (en) | 2011-01-14 | 2014-04-08 | Harris Corporation | Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices |
| US8472207B2 (en) * | 2011-01-14 | 2013-06-25 | Harris Corporation | Electronic device having liquid crystal polymer solder mask and outer sealing layers, and associated methods |
| JP2012156327A (ja) | 2011-01-26 | 2012-08-16 | Elpida Memory Inc | 半導体装置、及び積層型半導体装置 |
| JP5878362B2 (ja) * | 2011-12-22 | 2016-03-08 | 新光電気工業株式会社 | 半導体装置、半導体パッケージ及び半導体装置の製造方法 |
| TWI475623B (zh) * | 2011-12-27 | 2015-03-01 | 財團法人工業技術研究院 | 堆疊式半導體結構的接合結構及其形成方法 |
| CN104051369A (zh) * | 2014-07-02 | 2014-09-17 | 上海朕芯微电子科技有限公司 | 一种用于2.5d封装的中间互联层及其制备方法 |
| US20190140167A1 (en) * | 2017-11-07 | 2019-05-09 | Everspin Technologies, Inc. | Angled surface removal process and structure relating thereto |
| CN108122835B (zh) * | 2017-12-12 | 2020-11-20 | 华进半导体封装先导技术研发中心有限公司 | 转接板的制造方法及其所制造的转接板 |
| WO2022158109A1 (ja) * | 2021-01-19 | 2022-07-28 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置、および、半導体装置の製造方法 |
| CN113021172A (zh) * | 2021-03-25 | 2021-06-25 | 中国电子科技集团公司第五十四研究所 | 一种带腔ltcc基板的研磨抛光方法 |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05183019A (ja) * | 1991-12-27 | 1993-07-23 | Hitachi Ltd | 半導体装置およびその製造方法 |
| JP2002314244A (ja) * | 2001-04-11 | 2002-10-25 | Ngk Insulators Ltd | コア基板とその製造方法、該コア基板を用いた複層コア基板の製造方法及び多層積層基板の製造方法 |
| JP2005064470A (ja) * | 2003-07-30 | 2005-03-10 | Tdk Corp | 半導体ic内蔵モジュール及びその製造方法 |
| JP2005072064A (ja) * | 2003-08-27 | 2005-03-17 | Ngk Spark Plug Co Ltd | 配線基板およびその製造方法 |
| JP2005072061A (ja) * | 2003-08-27 | 2005-03-17 | Ngk Spark Plug Co Ltd | 配線基板およびその製造方法 |
| JP2005150344A (ja) * | 2003-11-14 | 2005-06-09 | Casio Comput Co Ltd | 半導体装置およびその製造方法 |
| JP2006108236A (ja) * | 2004-10-01 | 2006-04-20 | Shinko Electric Ind Co Ltd | 貫通電極付基板の製造方法 |
| JP2006147873A (ja) * | 2004-11-19 | 2006-06-08 | Sharp Corp | 半導体装置の製造方法 |
| JP2006165112A (ja) * | 2004-12-03 | 2006-06-22 | Sharp Corp | 貫通電極形成方法およびそれを用いる半導体装置の製造方法、ならびに該方法によって得られる半導体装置 |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001026147A1 (en) * | 1999-10-04 | 2001-04-12 | Seiko Epson Corporation | Semiconductor device, method of manufacture thereof, circuit board, and electronic device |
| JP4023076B2 (ja) * | 2000-07-27 | 2007-12-19 | 富士通株式会社 | 表裏導通基板及びその製造方法 |
| KR100435813B1 (ko) * | 2001-12-06 | 2004-06-12 | 삼성전자주식회사 | 금속 바를 이용하는 멀티 칩 패키지와 그 제조 방법 |
| JP4045143B2 (ja) * | 2002-02-18 | 2008-02-13 | テセラ・インターコネクト・マテリアルズ,インコーポレイテッド | 配線膜間接続用部材の製造方法及び多層配線基板の製造方法 |
| JP4213478B2 (ja) * | 2003-01-14 | 2009-01-21 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| JP4098673B2 (ja) | 2003-06-19 | 2008-06-11 | 新光電気工業株式会社 | 半導体パッケージの製造方法 |
| JP2005026313A (ja) * | 2003-06-30 | 2005-01-27 | Shinko Electric Ind Co Ltd | 配線基板の製造方法 |
| US7547975B2 (en) * | 2003-07-30 | 2009-06-16 | Tdk Corporation | Module with embedded semiconductor IC and method of fabricating the module |
| JP3751625B2 (ja) * | 2004-06-29 | 2006-03-01 | 新光電気工業株式会社 | 貫通電極の製造方法 |
| JP3987521B2 (ja) * | 2004-11-08 | 2007-10-10 | 新光電気工業株式会社 | 基板の製造方法 |
| JP2007027451A (ja) | 2005-07-19 | 2007-02-01 | Shinko Electric Ind Co Ltd | 回路基板及びその製造方法 |
| JP2007148182A (ja) | 2005-11-30 | 2007-06-14 | Ricoh Co Ltd | 現像装置及び画像形成装置 |
| US7863189B2 (en) * | 2007-01-05 | 2011-01-04 | International Business Machines Corporation | Methods for fabricating silicon carriers with conductive through-vias with low stress and low defect density |
| JP5302522B2 (ja) * | 2007-07-02 | 2013-10-02 | スパンション エルエルシー | 半導体装置及びその製造方法 |
-
2007
- 2007-06-04 JP JP2007148182A patent/JP5193503B2/ja active Active
-
2008
- 2008-06-02 KR KR1020080051603A patent/KR20080106844A/ko not_active Withdrawn
- 2008-06-03 TW TW097120562A patent/TW200850096A/zh unknown
- 2008-06-03 US US12/132,187 patent/US8349733B2/en active Active
- 2008-06-04 CN CNA2008101086822A patent/CN101320695A/zh active Pending
- 2008-06-04 EP EP08157592A patent/EP2001274A3/en not_active Withdrawn
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05183019A (ja) * | 1991-12-27 | 1993-07-23 | Hitachi Ltd | 半導体装置およびその製造方法 |
| JP2002314244A (ja) * | 2001-04-11 | 2002-10-25 | Ngk Insulators Ltd | コア基板とその製造方法、該コア基板を用いた複層コア基板の製造方法及び多層積層基板の製造方法 |
| JP2005064470A (ja) * | 2003-07-30 | 2005-03-10 | Tdk Corp | 半導体ic内蔵モジュール及びその製造方法 |
| JP2005072064A (ja) * | 2003-08-27 | 2005-03-17 | Ngk Spark Plug Co Ltd | 配線基板およびその製造方法 |
| JP2005072061A (ja) * | 2003-08-27 | 2005-03-17 | Ngk Spark Plug Co Ltd | 配線基板およびその製造方法 |
| JP2005150344A (ja) * | 2003-11-14 | 2005-06-09 | Casio Comput Co Ltd | 半導体装置およびその製造方法 |
| JP2006108236A (ja) * | 2004-10-01 | 2006-04-20 | Shinko Electric Ind Co Ltd | 貫通電極付基板の製造方法 |
| JP2006147873A (ja) * | 2004-11-19 | 2006-06-08 | Sharp Corp | 半導体装置の製造方法 |
| JP2006165112A (ja) * | 2004-12-03 | 2006-06-22 | Sharp Corp | 貫通電極形成方法およびそれを用いる半導体装置の製造方法、ならびに該方法によって得られる半導体装置 |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012015209A (ja) * | 2010-06-29 | 2012-01-19 | Advantest Corp | 貫通配線基板および製造方法 |
| JP2012015201A (ja) * | 2010-06-29 | 2012-01-19 | Advantest Corp | 貫通配線基板および製造方法 |
| US8748312B2 (en) | 2011-12-20 | 2014-06-10 | Samsung Electronics Co., Ltd. | Method of manufacturing substrate for mounting electronic device |
| JP2016039512A (ja) * | 2014-08-08 | 2016-03-22 | キヤノン株式会社 | 電極が貫通配線と繋がったデバイス、及びその製造方法 |
| US10090780B2 (en) | 2014-08-08 | 2018-10-02 | Canon Kabushiki Kaisha | Device with electrode connected to through wire, and method for manufacturing the same |
| JP2017538280A (ja) * | 2014-10-31 | 2017-12-21 | エーティーアイ・テクノロジーズ・ユーエルシーAti Technologies Ulc | 制約されたはんだ相互接続パッドを備える回路基板 |
| JP2017073534A (ja) * | 2015-10-07 | 2017-04-13 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | プリント回路基板及びその製造方法 |
| KR20170041544A (ko) * | 2015-10-07 | 2017-04-17 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
| KR102494336B1 (ko) * | 2015-10-07 | 2023-02-01 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
| WO2017164043A1 (ja) * | 2016-03-25 | 2017-09-28 | 住友精密工業株式会社 | 充填方法 |
| JPWO2017164043A1 (ja) * | 2016-03-25 | 2018-10-18 | 住友精密工業株式会社 | 充填方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US8349733B2 (en) | 2013-01-08 |
| KR20080106844A (ko) | 2008-12-09 |
| EP2001274A3 (en) | 2009-11-11 |
| JP5193503B2 (ja) | 2013-05-08 |
| EP2001274A2 (en) | 2008-12-10 |
| CN101320695A (zh) | 2008-12-10 |
| TW200850096A (en) | 2008-12-16 |
| US20080299768A1 (en) | 2008-12-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5193503B2 (ja) | 貫通電極付き基板及びその製造方法 | |
| JP5340789B2 (ja) | 電子装置及びその製造方法 | |
| TWI443791B (zh) | 佈線基板之製造方法、半導體裝置之製造方法及佈線基板 | |
| CN101809735B (zh) | 具有通过镀敷形成的接线柱的互连元件 | |
| TWI437668B (zh) | 佈線板、半導體裝置、佈線板之製造方法及半導體裝置之製造方法 | |
| US9247644B2 (en) | Wiring board and method for manufacturing the same | |
| JP5106460B2 (ja) | 半導体装置及びその製造方法、並びに電子装置 | |
| JP4035034B2 (ja) | 半導体装置およびその製造方法 | |
| JP5535494B2 (ja) | 半導体装置 | |
| JP5222459B2 (ja) | 半導体チップの製造方法、マルチチップパッケージ | |
| JP5372579B2 (ja) | 半導体装置及びその製造方法、並びに電子装置 | |
| US8759685B2 (en) | Wiring substrate and method of manufacturing the wiring substrate | |
| TWI384925B (zh) | 內埋式線路基板之結構及其製造方法 | |
| JP2007053327A (ja) | 電子部品実装構造及びその製造方法 | |
| JP2010004028A (ja) | 配線基板及びその製造方法、及び半導体装置 | |
| JP5237607B2 (ja) | 基板の製造方法 | |
| JP2007012854A (ja) | 半導体チップ及びその製造方法 | |
| JP2012114400A (ja) | 配線基板の製造方法 | |
| JP2016152260A (ja) | 電子装置 | |
| CN104247584A (zh) | 印刷电路板及其制造方法 | |
| US20100096163A1 (en) | Wiring board and method of manufacturing the same | |
| JP5357239B2 (ja) | 配線基板、半導体装置、及び配線基板の製造方法 | |
| US20060043570A1 (en) | Substrate, semiconductor device, substrate fabricating method, and semiconductor device fabricating method | |
| JP2004342861A (ja) | チップ状電子部品及び擬似ウェーハ、これらの製造方法、並びに電子部品の実装構造 | |
| CN1873935B (zh) | 配线基板的制造方法及半导体器件的制造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100331 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20100331 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20110608 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110614 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110729 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120214 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120412 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20130115 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20130204 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5193503 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20160208 Year of fee payment: 3 |