JP2008199179A - Relief method in case of communication failure between layer 2 switch device and inter-card card - Google Patents

Abstract

The present invention relates to a remedy method when a communication failure occurs between a layer 2 switch device and an intra-device card so that a packet transfer is not disconnected even if a communication failure occurs on a connection path between interface cards in the device.
Each interface card includes a communication state management block 8, a distribution block 31, and a selection block 41. The communication state management block 8 manages the communication state of the connection path between each interface card. Then, the communication state of the interface card to which the packet is transferred is determined with reference to the communication state management block 8, and when communication is impossible, the packet is transferred to the connection path of another interface card that can communicate and selected. In block 41, it is determined whether or not the destination of the transferred packet is the local interface card. If the destination is the local card, the packet is sent to the output processing unit 4; The packet is transferred to the distribution block 31.
[Selection] Figure 1

Description

  The present invention relates to a layer in which an interface card (LIU: Line Interface Unit) to which a large number of communication cables are connected and a central processing unit (CPU: Central Processing Unit) that controls hardware functions of the interface card (LIU) are mounted. The present invention relates to a two-switch device and a relief method in the event of a communication failure between cards in the device.

  FIG. 13 shows an overview of a configuration example of a layer 2 switch device to which the present invention is applied. As shown in the figure, the layer 2 switching device has a large number of interface cards LIU1 to LIU3 and a CPU card on which a central processing unit (CPU) for controlling the interface cards LIU1 to LIU3 is mounted. Each of the interface cards LIU1 to LIU3 has a plurality of ports to which Ethernet (registered trademark) standard LAN (Local Area Network) cables are connected, and selectively forms a connection path between the cables connected to the ports. It has a function.

FIG. 14 shows an example of the internal structure of a conventional layer 2 switch device. Each interface card LIU1~LIU3 are respectively serially connected by a serializer / deserializer _(SerDes) 1 1 ~1 ₃ to other interface cards and the mesh-like. Inside, ports 2 ₁ to 2 ₃ to which LAN cables are attached, input processing units (Ingress) 3 _{1 to} 3 ₃ , distribution blocks 31 _{1 to} 31 ₃ , output processing units (Egress) 4 ₁ to 4 ₃ , control LAN ports 5 _{1 to} 5 ₃ and interface card CPUs (LIU-CPUs) 6 _{1 to} 6 ₃ are provided.

  The subscripts attached to the constituent elements of the interface cards LIU1 to LIU3 are shown corresponding to the interface cards LIU1 to LIU3, respectively, and need not be distinguished for each of the interface cards LIU1 to LIU3. In such cases, the subscript is omitted.

  Each functional unit in the layer 2 switch device will be described below. The port 2 is connected to another communication device or the like by an Ethernet (registered trademark) standard LAN cable, and transmits / receives a packet to / from the communication device or the like. There are various types such as 10BASE-T, 100BASE-TX, and 1000BASE-SX depending on the communication speed and the type of transmission medium. They are standardized by IEEE 802.3.

  The input processing unit 3 is a functional block that controls received packets input from the port 2, learning MAC (Media Access Control) addresses, packet control according to VLAN (Virtual LAN) settings, packet filtering, QoS (Quality of Service) It has functions for performing bandwidth control according to settings, adding a layer 1 header, and the like.

  The distribution block 31 has a function of packet transfer (forwarding), and has a function of transferring a packet to a transfer destination interface card based on the layer 1 header given by the input processing unit 3. The serializer / deserializer 1 converts a parallel signal of a packet to be transferred into a serial signal and transmits it to another interface card. Also, the serializer / deserializer 1 converts a packet received as a serial signal from another interface card into a parallel signal. It has the function to output to the output processing part 4 in the inside.

  The output processing unit 4 has a function to control the transmission packet, and deletes the layer 1 header given by the input processing unit 3, learns the MAC address, shaping, bandwidth control according to the QoS setting, packet discard control And the like. The control LAN port 5 is a port for communicating control packets with a central processing unit (CPU) 71 of the CPU card 7.

  The interface card CPU 6 is a central processing unit (CPU) that controls / monitors the serializer / deserializer 1, the port 2, the input processing unit 3, and the output processing unit 4. A request for setting hardware functions or reading status information from the CPU card 7 is received via the control LAN port 5, control is performed according to the request, and the control result is sent to the central processing unit (CPU) ( CPU) 71.

CPU card 7 by the central processing unit (CPU) is mounted, is connected by the control LAN port ₇₂ 1-72 ₃ and each interface card LIU1～LIU3, the control packet each interface card LIU1～LIU3 and該制patronized LAN The interface card CPU 6 exchanged via the ports 72 _{1 to} 723 and mounted on the interface cards LIU 1 to LIU ₃ controls the own interface card according to the control packet.

The operation of signal transmission / reception in each of the interface cards LIU1 to LIU3 is as follows. For example, interface packet input from the port 2 ₁ cards LIU1 passes the input processing unit 3 _1, sorted based on Layer 1 header distribution block 31 of _the input processor 3 _1, destination interface card for example transferred via the serializer / deserializer _{1 1} to LIU2.

In the transfer destination interface card LIU2, sent from the serializer / deserializer 1 ₁ of the transfer source interface cards LIU1 a packet inputted via the serializer / deserializer 1 _2, through the output processing section 5 ₂ from port 2 ₂ to the outside .

In the layer 2 switch device having a large number of interface cards as described above, when a communication error occurs between the interface cards or between the interface cards and the CPU card, the following failure occurs. To do.
(1) When a communication error occurs between interface cards LIUX-LIUY (X and Y are card slot numbers, 1 to 3 in the configuration example of FIG. 14) in the same device, the same between interface cards LIUX-LIUY Intra-device packet transfer becomes impossible.
(2) When a communication error occurs between the interface card LIUX (X is a card slot number, 1 to 3 in the configuration example of FIG. 14) and the CPU card 7 in the same device, the interface card LIUX in which the communication error has occurred Various settings are impossible.

Figure 15 shows an example of a failure of (1) shows a case where a failure occurs in the serializer / deserializer 1 ₂ interface card LIU2. The serializer / deserializer _{1 2} assumed to be connected to the interface card LIU1. Is input through port _{2 1} interface card LIU1, packet to be transferred to the interface card LIU2 passes the input processing unit _{3 1,} based on a layer 1 header sorting block 31 _1, the destination interface card LIU2 It is output to the connected serializer / deserializer 1 _1.

However, since the serializer / deserializer _{1 2} interface cards LIU2 connected to the interface card LIU1 has failed, from the interface card LIU1 can not forward packets to the interface card LIU2, from the interface card LIU1 to the interface card LIU2 toward the communication will be interrupted, thereby giving port 2 ₁ and 2 ₂ connected to a communication failure to the user equipment and the interface card LIU1 and LIU2.

Similarly a packet input from port _{2 2} interface cards LIU2, the case to be transferred to the interface card LIU1 also for interface cards LIU1 in which serializer / deserializer _{1 2} is connected to have failed, the interface card LIU2 The packet cannot be transferred to the interface card LIU1.

As a method for recovering such a packet transfer failure, only to replace the interface card LIU2 containing the failed serializer / deserializer 1 _2, Until carrying out the replacement work, the interface card LIU1 and interface cards LIU2 The communication between and remains disconnected.

Figure 16 shows an example of a failure of the (2), failure occurs in the control LAN port _{5 2} interface cards LIU2, shows a case where the LAN connection between the CPU card 7 and the interface card LIU2 is disconnected Yes. In this state, communication between the CPU card 7 and the interface card LIU2 becomes impossible, and all control packets for hardware setting from the CPU card 7 to the interface card LIU2 cannot be transmitted. Therefore, the hardware of the interface card LIU2 The hardware function cannot be set.

As a method for recovering failure of such hardware feature settings, only to replace the interface card LIU2 containing the failed serializer / deserializer 1 _2, until carrying out the replacement work, the interface card LIU2 The hardware function cannot be set.

  FIG. 17A shows an operation flow when a communication abnormality occurs between the interface cards in (1) described above, and a communication abnormality occurs between the interface card in (2) above and the CPU card. The operation flow is shown in FIG.

  As a prior art document related to the present invention, the following Patent Document 1 monitors a failure of a packet transfer destination line, and when a failure is detected, the packet is transferred to the output side line where the failure is detected. By transferring packets to different output lines via different routes, the route can be quickly changed due to a fault or abnormal load condition in the duplicated line or line card. A packet transfer method and a packet transfer apparatus are described in which a packet is not transmitted to a faulty line during a change.

However, the one described in the same document is to minimize packet communication disconnection when one line is disconnected with a duplex line. It does not relate to relief of packet communication interruption at the time of communication failure between the internal interface cards.
Japanese Patent Laid-Open No. 2002-9833

  In a conventional layer 2 switching device, when a failure occurs in a connection path such as a serializer / deserializer that connects between interface cards, there is a packet communication request between the interface cards connected in the connection path where the failure has occurred. In this case, the packet communication is always interrupted, and the user equipment connected to the port of the interface card in which the failure has occurred is affected by the abnormal operation. The only way to recover from the failure is to replace the interface card in which the failure has occurred. It is necessary to carry out the replacement work immediately, but packet communication through the faulty interface card cannot be relieved until the work is completed.

  In addition, when a communication failure occurs in the connection path between the interface card and the CPU card, a control packet for hardware setting or control cannot be transmitted from the CPU card to the interface card. Although the hardware cannot be set or controlled, the only way to recover from such a failure is to replace the interface card in which the failure has occurred. The hardware function settings could not be set.

  The present invention prevents a disconnection from occurring in packet communication during a communication failure in a connection path between interface cards in a layer 2 switch device, and user equipment connected to a port of the interface card A layer 2 switching device that does not affect the network is provided. Even if a communication failure occurs on the connection path between the interface card and the CPU card, a control packet for hardware setting or control is transmitted to the interface card, and the hardware of the interface card is Provided is a layer 2 switch device which can be set or controlled.

  The present invention mounts a plurality of interface cards having ports to which communication cables are connected, transfers packets via connection paths connecting the interface cards to each other, and selects between the cables connected to the ports In the layer 2 switching device that forms a connection path in an automatic manner, each of the interface cards includes a communication state management block, a distribution block, and a selection block, and the communication state management block indicates the communication state of the connection path between the interface cards. In the distribution block, the communication state of the connection path with the interface card that is the transfer destination of the packet input from the port is determined by referring to the communication state management block to determine whether communication is possible. The packet is forwarded to the connection path of the forwarding destination interface card, When the communication is impossible, the packet is transferred to a connection path of another interface card that can communicate, and in the selection block, whether or not the destination of the packet input via the distribution block is the own interface card If the packet is addressed to the own interface card, the packet is sent to the output processing unit. If the packet is not addressed to the own interface card, the packet is transferred to the distribution block.

  In addition, the hardware of the interface card includes a CPU card equipped with a central processing unit that sets or controls by transmitting a control packet to the interface card, and the CPU card has a connection path to each interface card. A communication state management block for managing a communication state, wherein the CPU card determines whether communication with an interface card that is a transmission destination of the control packet is possible with reference to the communication state management block; When possible, the control packet is transmitted to the control target interface card. When communication is not possible, the control packet is transmitted to another interface card capable of communication. In the interface card, the received control packet is transmitted to its own interface card. If it is addressed to the card and it is addressed to its own interface card Sets or controls the hardware to be controlled, and if it is not addressed to its own interface card, sets the identification information indicating that it is a control packet in the layer 1 header and the bitmap indicating the destination interface card. Based on the layer 1 header of the packet transferred to the distribution block and input via the distribution block, it is determined whether or not it is a control packet. If it is a control packet, control is performed according to the control packet. The target hardware is set or controlled.

  According to the present invention, even if a communication failure occurs in a connection path such as a serializer / deserializer that connects between interface cards, and there is a packet communication request between the interface cards via the connection path where the failure has occurred, By transferring the packet via another interface card connected via a communicable connection path, it is possible to prevent the packet from being disconnected, and communication failure occurs for user equipment connected to the interface card port. It is possible to reduce the influence of. Therefore, the replacement operation of the interface card in which the failure has occurred can be performed while avoiding the time zone that affects the user equipment.

  In addition, when a communication failure occurs in the connection path between the control target interface card and the CPU card, the control packet is transmitted to the control target interface card via another interface card connected through the communicable connection path. Therefore, even when a communication failure occurs between the control target interface card and the CPU card, the hardware of the control target interface card can be set or controlled.

FIG. 1 shows a configuration example of a layer 2 switch device of the present invention. As shown in the figure, in the layer 2 switching device of the present invention, communication state management blocks 8 ₁ to 8 ₃ and 9 are installed in the interface cards LIU1 to LIU3 and the CPU card 7, respectively, and the communication state management block 8 ₁ 8 ₃ manages each communication state of the connection path between the interface cards LIU1～LIU3, communication state management block 9 of the CPU card 7, manages the communication state between the CPU card 7 and the interface card LIU1～LIU3 To do.

In addition, a function of transferring control packets not addressed to the own interface card to the input processing units 3 _{1 to} 3 ₃ is added to the interface card CPUs 6 _{1 to} 6 ₃ . The distribution blocks 31 _{1 to} 31 ₃ in the input processing units 3 _{1 to} 3 ₃ respectively refer to the communication state management blocks 8 ₁ to 8 ₃ in the own interface card, and distribute the control packets to the interface cards capable of communication. Add functionality.

The selection block ₄₁ 1-41 ₃ of the output processing section ₄₁ to _3, the function of transferring packets other than destined for the own interface card to the distribution block ₃₁ 1-31 ₃ of each input processing unit ₃ 1 to 3 ₃ In addition, a function of transferring a control packet from the CPU card 7 to the output processing units 4 ₁ to 4 ₃ is added.

When the control packet transmitted from the CPU card 7 is input to each of the output processing units 4 ₁ to 4 ₃ , a function of transferring the control packet to the interface card CPUs 6 _{1 to} 6 ₃ is added. The interface card CPUs 6 _{1 to} 6 ₃ are added with a function of checking the communication state management blocks 8 ₁ to 8 ₃ and transferring packets to the interface cards LIU 1 to LIU ₃ that can communicate with each other.

Means for realizing the above functions will be described below. First, as a first means, each interface card LIU1 to LIU3 is provided with communication state management blocks 8 ₁ to 8 ₃ for managing the communication state as means for managing the communication state of the connection path between the interface cards. monitoring a communication state of the serializer / deserializer ₁ 1 to 1 ₃ by the communication status management block ₈ 1-8 _3.

FIG. 2 shows an example of the processing flow of the first means. As shown in the figure, for example, the interface card LUI1, when a failure in the interface card LUI2 in which serializer / deserializer _{1 1} is connected to occur, interface cards LUI1, the notification of the fault to the CPU card CPU I do. Also, it sets information of the incommunicable interface cards LUI2 in communication control block _81.

The CPU card that has received the failure notification from the interface card LUI1 notifies the interface card LIU1 to which the failed serializer / deserializer ₁₁ is connected to the interface card LIU1 in which the serializer / deserializer ₁₁ has failed. To do. Interface card LIU2 After receiving the notification, the communication status management block ₈₂ in the own card, sets information indicating that the communication with the interface card LIU1 became impossible.

  Next, a means for managing the communication state of the connection path between the CPU card and each interface card will be described as a second means. FIG. 3 shows an example of the processing flow of this means. The CPU card is provided with a communication state management block 9 for managing the communication state. The CPU card communicates (polls) with each interface card LIU at a predetermined interval by the communication state management block 9 to each interface card LIU. It is determined whether or not the LAN driver that manages the connection can communicate.

  If no response is returned from the interface card LIU during communication with the interface card LIU at regular intervals, it is assumed that a failure has occurred in the LAN driver of the interface card LIU, and the CPU card communicates within the local card. Information indicating that communication is not possible is set in the state management block 9 for the interface card LIU for which no response has been returned.

  Next, a means for transferring a packet not addressed to the own interface card will be described as a third means. The function of inputting packets to the serializer / deserializer 1 connected to the communicable interface card LIU in the distribution block 31 without inputting the packets to the serializer / deserializer 1 connected to the incommunicable interface card LIU Is provided.

  When there is no communicable interface card LIU, packet transfer is impossible, and the packet (main signal) is blocked. In the distribution process of the distribution block 31, for example, it is checked whether communication is possible from a young interface card LIU. FIG. 4 shows an example of the processing flow of this means. This figure shows an example of the processing flow of the distribution block 311 of the interface card LIU1.

Sorting block 31 of interface card LIU1 ₁ determines whether communication is possible with the destination interface card LIU specified at Layer 1 header (step 4-1), capable of communication, the Layer 1 header The packet is transferred to the serializer / deserializer of the destination interface card LIU specified in (4).

In the sorting block 31 _1, if it is determined not to be able to communicate with the destination interface card LIU specified at Layer 1 header, whether it is possible to communicate with other interface cards LIU, youth-numbered interface card LIU Are determined in order (step 4-3), and if communication with another interface card LIU is possible, the packet is transferred to the serializer / deserializer connected to the communicable interface card LIU (step 4-4). If it is determined that communication with any other interface card LIU is not possible, the packet is discarded because transfer is not possible (step 4-5).

  A function of providing a selection block 41 in the output processing unit 4 and transferring the packet to the distribution block 31 when the bitmap indicating the transmission destination of the input packet is not addressed to the own interface card LIU. Is provided. FIG. 5 shows a processing flow of the selection block 41.

  The selection block 41 determines whether or not the bitmap indicating the transmission destination of the layer 1 header of the input packet points to the own card (step 5-1). The packet is transferred to the conventional output processing function unit of the output processing unit 4 (step 5-2). If the destination bitmap does not point to the own card, the packet is transferred to the distribution block 31 of the input processing unit 3 (step 5-3).

  Next, as a fourth means, a means for detouring transfer of the control packet from the CPU card to the interface card in which a communication failure has occurred will be described. When setting or controlling the hardware from the CPU card to the interface card LIU, a control packet is transmitted to the interface card LIU, but the LAN connection with the interface card LIU is disconnected due to a failure of the control LAN port, etc. The control packet is transmitted to another interface card LIU whose LAN connection is not disconnected.

  FIG. 6 shows the processing flow of this means. The CPU card determines whether or not communication with the interface card LIU to be controlled is possible based on the setting contents of the communication state management block 9 (step 6-1). Transmitting a control packet to the LIU (6-2);

  If it is not possible to communicate with the interface card LIU to be controlled, it is checked whether other interface cards LIU can communicate sequentially from the lowest number (step 6-3), and the hardware setting from the CPU card to the communicable interface card LIU Alternatively, a control packet is transmitted (step 6-4). If it is determined as a result of the check in step 6-3 that there is no interface card LIU capable of communication, control packet transfer is not possible, and hardware setting or control of the interface card LIU is not performed (step 6-6). 5).

  Next, as a fifth means, a means for giving a layer 1 header to a control packet from a CPU card not addressed to the own card and transferring it to another interface card will be described. FIG. 7 shows the processing flow of this means. The interface card CPU 6 determines whether or not the control packet received from the control LAN port 5 is addressed to the own card (step 7-1). If the address is addressed to the own card, the interface card CPU 6 Setting or control is performed according to the control packet (step 7-2).

  If it is determined in step 7-1 that the control packet received from the control LAN port is not addressed to the own card, the control packet is transferred to the input processing unit 3 (step 7-3). The input processing unit 3 adds a layer 1 header to the control packet and transfers the packet to the distribution block 31 (step 7-4).

  In the layer 1 header added to the control packet, information indicating that the packet is a control packet is set as a frame type value, and the transmission destination bitmap of the interface card LIU is set as the destination. The input processing unit 3 transfers the control packet to the controlled interface card LIU via the serializer / deserializer 1 based on the layer 1 header in the distribution block 31 (step 7-5).

  Next, means for transferring control packets input from other interface cards to the interface card CPU will be described as sixth means. FIG. 8 shows a processing flow of this means. When the selection block 41 receives a packet via the serializer / deserializer 1, the selection block 41 checks whether the packet is a control packet based on the frame type value of the layer 1 header of the packet (step 8-1). ).

  If the received packet is a control packet, the output processing unit 4 deletes the layer 1 header (step 8-2), and transfers the control packet to the interface card CPU (step 8-3). If it is determined in step 8-1 that the received packet is not a control packet, the output processing unit 4 deletes the layer 1 header (step 8-4), and performs normal output processing similar to the conventional one. (Step 8-5).

  In the following, a description will be given of an embodiment of relief of main signal interruption at the time of communication abnormality between interface cards and relief of hardware function setting inability at the time of communication abnormality between the CPU card and the interface card. FIG. 9 shows a specific example of relief of main signal disconnection when a communication error occurs between the interface card LIU1 and the interface card LIU2.

When a packet from a port 2 ₁ interface card for LIU2 interface cards LIU1 is input, sorting block 31 ₁ determines a communicable interface card LIU based on setting information of the communication status management block _81, interface card When recognizing that the communication state to the LIU 2 is in a disconnected state, the packet is transmitted to the interface card LIU 3 that can communicate.

Interface card LIU3 receives the packet from the interface card LIU1, since in the selected block 41 ₃ checks the destination bitmap Layer 1 header of the packet, the destination bitmap is not the addressed to the own card, and it sends to block 31 ₃ distributes the packets.

In sorting block 31 _3, and transmitted from the packet input from the selection block 41 ₃ is a packet for interface cards LIU2, the serializer / deserializer 1 ₃ connected to the packet with the interface card LIU2, the serializer / via serializer / deserializer _{1 2} deserializer _{1 3} and the interface card LIU2, the packet is forwarded to the interface card LIU2.

FIG. 10 shows an embodiment of remedy that the hardware function cannot be set when communication between the CPU card and the interface card LIU2 is abnormal. As shown in the figure, communication CPU71 of CPU card 7, the interface card CPU 6 ₂ and connected to the control LAN port _{5 2} to failure are interface cards LIU2 occurs, through the該制patronized LAN port _{5 2} Is recognized based on the setting information of the communication state management block 9, the communicable interface card LIU 1 is recognized based on the setting information of the communication state management block 9, and a control packet for the interface card LIU 2 is received. , it is transmitted to the control for the LAN port _{5 1} of the interface card LIU1.

Interface card CPU 6 ₁ interface card LIU1 receives a control packet via the control LAN port 5 _1, checks the destination of the control packet, recognizes that the destination is not addressed to the own card, the control packet transferred to the input processing unit _{3 1.} Input processing unit 3 ₁ sets the destination bitmap interface cards LIU2 the Layer 1 header to the control packet is sent to block ₃₁₁ distributes the control packet, the sorting block 31 _1, the destination of the control packet Based on the bitmap, the control packet is transferred to the interface card LIU2.

In interface card LIU2, that the packet sent from the interface card LIU1 is a control packet, recognizes on the basis of the frame type of the layer 1 header, delete the layer 1 header of the control packet output processing section 4 ₂ and, to transfer the control packet to the interface card CPU6 _2.

  FIG. 11A shows a processing flow of an example of relief of main signal interruption when a communication error occurs between the interface card LIU1 and the interface card LIU2, and FIG. 11B shows the CPU described above. 8 shows a repair processing flow when hardware setting control is impossible when a communication error occurs between the card and the interface card LIU2.

  As shown in FIG. 5A, in the state where there is a packet (main signal) transfer request between the interface card LIU1 and the interface card LIU2 in the apparatus (11-1), the interface card LIU1 and the interface card LIU2 (11-2), the communication state management block for managing the communication state between the interface cards is updated by the first means shown in FIG. 3), the third means shown in FIGS. 4 and 5 executes a flow for transferring a packet not addressed to the own interface card (11-4), and the packet from the interface card LIU1 to the interface card LIU2 is transferred to the interface card. Interface card LI via card LIU3 It is transferred to 2 (11-5).

  Further, as shown in FIG. 3B, when a failure occurs in the control LAN port between the CPU card and the interface card LIU2 connected to the LAN (11-6), the second shown in FIG. By this means, it is detected that there is no response from the interface card LIU2, and the communication state management block in the CPU card is updated (11-7).

  When setting the hardware of the interface card LIU2 in a state where the control LAN port of the interface card LIU2 has failed (11-8), the interface card in which a communication failure has occurred by the fourth means shown in FIG. A control packet for LIU2 is transmitted to interface card LIU1.

  The interface card LIU1 adds the layer 1 header to the control packet not addressed to itself by the fifth means shown in FIG. 7, and transfers it to the interface card LIU2 (11-10). The interface card LIU2 transfers the control packet to the output processing unit by the third means in FIG. 5 (11-11), and the output processing unit uses the sixth means in FIG. And the control packet is transferred to the interface card CPU (11-12).

  With the above flow, the control packet reaches the interface card CPU of the interface card LIU2, and the interface card LIU2 can perform hardware setting or control according to the control packet (11-3).

  FIG. 12 shows a configuration example of the format of the layer 1 header set for the control packet by the fifth means shown in FIG. By assigning “11”, which is not used before the present invention, to the control packet originating from the CPU card as the value of the frame type (Frame Type) of the layer 1 header shown in FIG. The control packet originating from the card can be identified.

  Further, as a destination bit map (Destination Card BitMap) of the layer 1 header, as shown in (b) of the figure, interface positions LIU1 to LIU4 are assigned to bit positions 4 to 7 in correspondence with bit positions 4 to 4, respectively. 7, the interface card at the position where the value “1” is set is the destination interface card, and “1” is not set to a plurality of interface cards at the same time. . The bit area to be used is changed according to the number of interface cards.

It is a figure which shows the structural example of the layer 2 switch apparatus of this invention. It is a figure which shows the example of the processing flow of the 1st means (means which manage the communication state between interface cards). It is a figure which shows the example of the processing flow of a 2nd means (means which manages the communication state between a CPU card and each interface card). It is a figure which shows the example of the processing flow in the distribution block of the 3rd means (means to transfer the packet which is not addressed to a self-interface card). It is a figure which shows the example of the processing flow in the selection block of the 3rd means (means to transfer the packet which is not addressed to a self-interface card). It is a figure which shows the processing flow of the 4th means (means which detour-transfers a control packet from a CPU card with respect to the interface card in which the communication failure has generate | occur | produced). It is a figure which shows the processing flow of the 5th means (means which transfers the control packet which is not addressed to an own card to another interface card). It is a figure which shows the processing flow of the 6th means (means which transfers the control packet input from the other interface card to interface card CPU). It is a figure which shows the Example of relief of the main signal disconnection at the time of the communication abnormality between interface cards. It is a figure which shows the Example of relief of the hardware setting control impossible at the time of the communication abnormality between a CPU card and an interface card. (A) Relief processing flow of main signal disconnection when communication between interface cards is abnormal, and (b) Relief processing flow when hardware communication cannot be controlled when communication between the CPU card and interface card is abnormal. It is. It is a figure which shows the structural example of the format of the layer 1 header set with respect to a control packet. It is a general-view figure of the structural example of the layer 2 switch apparatus which is an application object of this invention. It is a figure which shows the structural example inside the conventional layer 2 switch apparatus. It is a figure which shows an example of the subject when communication abnormality generate | occur | produces between interface cards. It is a figure which shows an example of the subject when communication abnormality generate | occur | produces between an interface card and a CPU card. (A) Operation | movement flow when communication abnormality generate | occur | produces between interface cards, (b) It is a figure which shows the operation | movement flow when communication abnormality between an interface card and a CPU card generate | occur | produces.

Explanation of symbols

1 ₁ to 1 ₃ Serializer / Deserializer (SerDes)
2 ₁ to _{3 3} port 3 _{1 to} 3 ₃ input processing unit 31 _{1 to} 31 ₃ distribution block 4 ₁ to 4 ₃ output processing unit 41 _{1 to} 41 ₃ selection block 5 _{1 to} 5 ₃ LAN port for control 6 _{1 to} 6 ₃ Interface card CPU
7 CPU card 71 Central processing unit (CPU)
72 _{1 to} 72 ₃ LAN port for control 8 ₁ to 8 ₃ Communication state management block 9 Communication state management block

Claims (4)

A plurality of interface cards having ports to which communication cables are connected are mounted, packets are transferred via connection paths interconnecting each interface card, and connection paths are selectively connected between the cables connected to the ports In the layer 2 switch device forming
In each of the interface cards, a communication state management block for managing a communication state of a connection path between each interface card;
The communication state of the connection path with the interface card that is the transfer destination of the packet input from the port is determined by referring to the communication state management block to determine whether or not communication is possible. A distribution block for transferring the packet to the connection path of the interface card and transferring the packet to the connection path of another interface card capable of communication when communication is impossible;
It is determined whether the destination of the packet input via the distribution block is the local interface card. If the destination is the local interface card, the packet is sent to the output processing unit and is not addressed to the local interface card. A selection block that forwards the packet to the distribution block;
A layer 2 switch device comprising: A CPU card equipped with a central processing unit for setting or controlling the hardware of the interface card by sending a control packet to the interface card;
A communication state management block for managing a communication state of a connection path with each interface card in the CPU card;
Whether or not communication with the interface card that is the transmission destination of the control packet is possible is determined with reference to the communication state management block, and if possible, the control packet is transmitted to the control target interface card, Means for transmitting the control packet to another interface card capable of communication when communication is impossible,
The interface card determines whether the received control packet is destined for its own interface card. If it is destined for its own interface card, the hardware to be controlled is set or controlled. Means for setting identification information indicating that it is a control packet in a layer 1 header and a bitmap indicating a destination interface card and transferring them to the distribution block;
Based on the layer 1 header of the packet input via the distribution block, it is determined whether or not the packet is a control packet. If the packet is a control packet, the hardware to be controlled is set according to the control packet or The layer 2 switch device according to claim 1, further comprising: means for performing control. A plurality of interface cards having ports to which communication cables are connected are mounted, packets are transferred via connection paths interconnecting each interface card, and connection paths are selectively connected between the cables connected to the ports A method of remedy in the event of a communication failure between cards in the layer 2 switching device forming
Managing a communication state of a connection path between each interface card by a communication state management block provided in each of the interface cards;
In the distribution block provided for each of the interface cards, the communication state of the connection path with the interface card to which the packet input from the port is transferred is determined by referring to the communication state management block. And when the communication is possible, the packet is transferred to the connection path of the transfer destination interface card, and when the communication is impossible, the packet is transferred to the connection path of another interface card capable of communication;
In the selection block provided in each of the interface cards, it is determined whether or not the destination of the packet input via the distribution block is the own interface card. Sending to the output processing unit and, if not addressed to the own interface card, transferring the packet to the distribution block;
A relief method in the event of a communication failure between intra-device cards. In the CPU card equipped with a central processing unit for setting or controlling the hardware of the interface card by transmitting a control packet to the interface card, the communication status management block provided in the CPU card allows each interface card to Managing the communication status of
Whether or not communication with the interface card that is the transmission destination of the control packet is possible is determined with reference to the communication state management block, and if possible, the control packet is transmitted to the control target interface card, A step of transmitting the control packet to another interface card capable of communication when communication is impossible;
In the interface card, it is determined whether or not the received control packet is addressed to the own interface card. If the addressed packet is addressed to the own interface card, the hardware to be controlled is set or controlled. A step of setting identification information indicating that it is a control packet in a layer 1 header and a bitmap indicating a destination interface card and transferring the bitmap to the distribution block;
Based on the layer 1 header of the packet input via the distribution block, it is determined whether or not the packet is a control packet. If the packet is a control packet, the hardware to be controlled is set according to the control packet or The method according to claim 3, further comprising a step of performing control.

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