JP2008182038A - Semiconductor device and manufacturing method of semiconductor device - Google Patents

Abstract

A semiconductor device capable of fixing a semiconductor chip to a lead frame with high positional accuracy by a simple bonding process and without using expensive equipment and a method for manufacturing the same are provided.
A lead frame 2 is provided with a chip mounting surface 4 surrounded by a groove 3 and having a size substantially equal to the chip mounting area, and surface tension is expressed in a liquid state on the chip mounting surface 4. The solder 5 was disposed, the semiconductor chip 6 was placed on the bonding material 5, and the semiconductor chip 6 was fixed at the center position of the chip mounting surface 4 by the self-alignment effect due to the surface tension of the bonding material 5.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device for fixing a semiconductor chip to a substrate with high positional accuracy and a method for manufacturing the same.

  Various techniques for mounting a semiconductor chip on a substrate with high positional accuracy have been proposed. In particular, optical semiconductor chips are highly required to be fixed with high positional accuracy, and FIGS. 9 and 10 show one conventional example.

  In FIG. 9, solder bumps 52 are disposed on the land pattern 51 of the silicon substrate 50, and electrode portions 54 of, for example, an optical semiconductor chip 53 that is a semiconductor chip are placed on the solder bumps 52. When the solder bump 52 is heated, the solder bump 52 is melted and liquefied. The liquefied solder bump 52 is restricted in the range of the land pattern 51 by the surface tension. Further, the electrode portion 54 of the optical semiconductor chip 53 mounted on the liquefied solder bump 52 is positioned at the centering position of the land pattern 51 by the self-alignment effect due to the surface tension of the liquefied solder bump 52. Move automatically. When the liquefied solder bump 52 is solidified by cooling, the optical semiconductor chip 53 is fixed on the land pattern 51 via the solder bump 52. As shown in FIG. 10, the optical semiconductor chip 53 is fixed on the land pattern 51 of the silicon substrate 50 with high positional accuracy.

  In the above conventional example, as shown in FIG. 9, the centering position of the semiconductor chip mounted on the silicon substrate 50 side is O1, the centering position of the optical semiconductor chip 53 itself is O2, and the centering positions O1 and O2 are shifted. Even if the optical semiconductor chip 53 is placed on the silicon substrate 50 in this state, as shown in FIG. 10, the optical semiconductor chip 53 may be fixed at a position where the centering positions O1 and O2 of both are substantially coincident. it can. Therefore, it is not necessary to place the optical semiconductor chip 53 on the silicon substrate 50 with high positional accuracy (see Patent Document 1).

  Note that techniques for fixing a semiconductor chip on a substrate with high positional accuracy using a self-alignment effect due to surface tension of liquefied solder or the like are also disclosed in Patent Documents 2 and 3 and the like.

  On the other hand, a chip mounter is generally used to mount a semiconductor chip on a lead frame as a substrate. As shown in FIG. 11, a conductive adhesive 61 is applied on a lead frame 60, and a semiconductor chip 63 is mounted thereon using a chip mounter 62. When the conductive adhesive 61 is cured by applying heat or light, the semiconductor chip 63 is fixed on the lead frame 60 via the conductive adhesive 61 as shown in FIG.

In the above conventional example, as shown in FIG. 11, the centering position of the chip mounting on the lead frame 60 side is O1, the centering position of the semiconductor chip 63 itself is O2, and the semiconductor is in a state where both centering positions O1 and O2 are shifted. When the chip 63 is placed on the lead frame 60, the semiconductor chip 63 is fixed at a position where both the centering positions O1 and O2 are shifted as shown in FIG. Therefore, the position accuracy of the semiconductor chip 63 depends on the position accuracy characteristics of the chip mounter 62. If the chip mounter 62 having excellent position accuracy characteristics is used, the semiconductor chip 63 can be fixed on the lead frame 60 with high position accuracy.
Japanese Patent Laid-Open No. 2004-4195 JP 2004-79742 A JP 2003-324216 A

  However, the conventional example shown in FIGS. 9 and 10 requires a step of forming the solder bump 52 and a step of forming the land pattern 51 on the silicon substrate 50 and equipment for performing these steps. Therefore, there is a problem that the process is complicated and expensive.

  Further, in the conventional example shown in FIGS. 11 and 12, the joining process is simple, but the chip mounter 62 having excellent positional accuracy must be used. The chip mounter 62 with excellent positional accuracy has a problem that high equipment costs are required.

  Therefore, the present invention has been made to solve the above-described problems, and it is possible to fix the semiconductor chip to the substrate with high positional accuracy by a simple bonding process and without using expensive equipment, which is useless. An object is to provide an environment-friendly semiconductor device that does not use resources and a method for manufacturing the same.

  According to the first aspect of the present invention, the substrate is provided with a chip mounting surface surrounded by a groove and having a size substantially equal to the mounting area of the semiconductor chip, and surface tension is applied in a liquid state on the chip mounting surface. The present invention is a semiconductor device in which a bonding material that expresses is disposed, and a semiconductor chip placed on the bonding material is fixed to the chip mounting surface via the bonding material.

  According to a second aspect of the present invention, a chip housing groove slightly larger than the mounting area of the semiconductor chip is provided on the substrate, a bonding material that expresses surface tension in a liquid state is disposed in the chip housing groove, and the bonding material is formed on the bonding material. The semiconductor device is characterized in that the semiconductor chip placed on the chip is fixed in the chip receiving groove through the bonding material.

  A third aspect of the present invention is the semiconductor device according to the first or second aspect, wherein the substrate is a lead frame.

  A fourth aspect of the present invention is the semiconductor device according to any one of the first to third aspects, wherein the bonding material is solder.

  According to a fifth aspect of the present invention, there is provided a mask layer forming step for providing a mask layer on the substrate base material so as to expose a region corresponding to the chip receiving groove, and an etching process is performed on the substrate base material to be exposed from the mask layer. An etching step for providing a chip receiving groove in the formed portion, a bonding material that expresses a surface tension in a liquid state in the chip receiving groove, a semiconductor chip placed on the bonding material, and the bonding material And a bonding step of fixing the semiconductor chip in the chip receiving groove via the bonding material.

  A sixth aspect of the invention is a method of manufacturing a semiconductor device according to the fifth aspect of the invention, wherein the substrate base material is a lead frame base material.

  The invention according to claim 7 is the method of manufacturing a semiconductor device according to claim 6, wherein in the mask layer forming step, a mask layer is provided so as to expose a cut portion of the lead frame base material, and in the etching step, A method of manufacturing a semiconductor device, wherein a cut portion of the lead frame base material is cut by etching.

  According to the first aspect of the present invention, when the bonding material is arranged on the chip mounting surface of the substrate, the semiconductor chip is placed on the bonding material, and the bonding material is liquefied, the liquefied bonding material is turned in all directions by surface tension. As the wetting and spreading of the semiconductor is restricted to the range of the chip mounting surface, the semiconductor chip is automatically moved to the centering position on the chip mounting surface of the substrate by the self-alignment effect due to the surface tension of the liquefied bonding material, and then liquefied When the bonded material solidifies, the semiconductor chip is fixed to the chip mounting surface with high positional accuracy. In the bonding process, it is only necessary to place the semiconductor chip on the chip mounting surface of the substrate. In addition, since a strict positional accuracy is not required for the mounting position, it is necessary to use a chip mounter with excellent positional accuracy characteristics. Absent. As described above, the semiconductor chip can be fixed to the substrate with high positional accuracy by a simple bonding process and without using expensive equipment.

  According to the second aspect of the present invention, when the bonding material is disposed in the chip receiving groove of the substrate, the semiconductor chip is placed on the bonding material, and the bonding material is liquefied, the liquefied bonding material is divided into four directions by the surface tension. The semiconductor chip is automatically moved to the centering position of the chip receiving groove on the substrate by the self-alignment effect due to the surface tension of the liquefied bonding material. When the formed bonding material is solidified, the semiconductor chip is fixed in the chip receiving groove with high positional accuracy. In the bonding process, it is only necessary to place the semiconductor chip in the chip receiving groove of the substrate. In addition, since a strict positional accuracy is not required for the mounting position, it is necessary to use a chip mounter having excellent positional accuracy characteristics. There is no. As described above, the semiconductor chip can be fixed to the substrate with high positional accuracy by a simple bonding process and without using expensive equipment.

  According to the third aspect of the present invention, the semiconductor chip can be read with high positional accuracy by a simple bonding process and without using expensive equipment by the operation described in the first or second aspect of the present invention. Can be fixed to the frame.

  According to the invention of claim 4, in addition to the effects of the inventions of claims 1 to 3, since the solder exhibits a high surface tension in a liquid state, the semiconductor chip is surely secured by the self-alignment effect by the surface tension. Can be fixed with high positional accuracy.

  According to the fifth aspect of the present invention, the bonding process may be performed simply by placing the semiconductor chip in the chip receiving groove of the substrate, and at that time, no strict positional accuracy is required for the mounting position. It is not necessary to use an excellent chip mounter. As described above, the semiconductor chip can be fixed to the substrate with high positional accuracy by a simple bonding process and without using expensive equipment.

  According to the sixth aspect of the present invention, the semiconductor chip can be fixed to the lead frame with high positional accuracy by a simple bonding process and without using expensive equipment by the operation described in the fifth aspect of the present invention. it can.

  According to the invention described in claim 7, in addition to the effect of the invention described in claim 6, the chip mounting surface and the chip receiving groove whose periphery is surrounded by the groove in the normal process of manufacturing the lead frame from the lead frame base material are provided. Since it can be manufactured at the same time, a lead frame having a desired chip mounting surface and chip receiving groove can be manufactured at low cost without adding a special process.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
1 to 4 show a first embodiment of the present invention. FIGS. 1A and 1B are cross-sectional views and plan views of a main part of a semiconductor device, and FIGS. 2A to 2C are leads. FIGS. 3A and 3B are cross-sectional views showing a process for producing a lead frame from the frame base material, FIGS. 3A and 3B are cross-sectional views and plan views of main parts near the chip mounting surface of the lead frame, and FIGS. FIG. 4B is a cross-sectional view and a plan view of a main part showing a state where a semiconductor chip is mounted on a chip mounting surface of a lead frame.

  As shown in FIGS. 1A and 1B, the semiconductor device 1 has a lead frame 2 as a substrate. On the upper surface of the lead frame 2, a chip mounting surface 4 that is surrounded by the groove 3 and has a size approximately equal to the mounting area of the semiconductor chip 6 is provided. The chip mounting surface 4 has a circular shape when viewed from above. A semiconductor chip 6 is fixed on the chip mounting surface 4 via solder 5 which is a bonding material. The semiconductor chip 6 is, for example, an optical semiconductor chip (laser diode, light emitting diode, etc.). The dimension of the semiconductor chip 6 is 250 μm on one side. In this embodiment, the diameter of the chip mounting surface 4 set to a size substantially equal to the chip mounting area is set in the range of 300 μm to 400 μm.

  Next, a manufacturing procedure of the semiconductor device 1 will be described. First, the mask layer 11 is formed on both surfaces of the lead frame base material 10 which is the base material of the substrate shown in FIG. 2A (mask forming process). As shown in FIG. 2B, the mask layer 11 is formed at a position where the cut portion of the lead frame base material 10 is exposed and the portion to be the lead frame 2 is covered. Further, at the location of the lead frame 2 on which the semiconductor chip 6 is mounted, the mask layer 11 is formed so as to cover the position corresponding to the chip mounting surface 4 and to expose the periphery of the chip mounting surface 4. That is, the mask layer 11 is formed with an opening 11a for cutting a base material and an opening 11b for forming a groove.

  Next, as shown in FIG. 2C, the lead frame base material 10 on which the mask layer 11 is formed is etched (etching step). In the etching process, a deep etching process is performed on the cut portion of the lead frame base material 10 and a shallow etching process is performed on the periphery of the chip mounting surface 4. For example, the degree of etching is adjusted by changing the type of etching solution or changing the etching time. By performing such an etching process, the cut portion of the lead frame base material 10 is cut (patterned). A semicircular groove 3 is formed around the chip mounting surface 4 by a shallow etching process in the lead frame 2 for mounting a semiconductor chip (see FIGS. 3A and 3B).

  In this embodiment, since the isotropic etching is adopted as the etching, the cross section of the groove 3 is almost semicircular. However, the cross section of the groove 3 may be rectangular by adopting anisotropic etching. As an etching method, either dry etching or wet etching may be used.

  Next, the mask layer 11 is removed from each lead frame 2 (mask layer removing step).

  Thereafter, a bonding process for fixing the semiconductor chip 6 to the lead frame 2 is performed. In the bonding step, a bonding material that develops surface tension in a liquid state on the chip mounting surface 4 of the lead frame 2 shown in FIGS. 3A and 3B as shown in FIGS. 4A and 4B. The paste-like solder 5 is applied. Next, the semiconductor chip 6 is mounted on the paste-like solder 5 using a chip mounter (not shown).

  Next, the paste-like solder 5 is heated to a melting point or higher and melted (liquefied). As a result, the surface of the liquefied solder 5 is restricted in the range of the chip mounting surface 4 by the surface tension, and the semiconductor chip 6 is mounted on the chip mounting surface 4 by the self-alignment effect due to the surface tension of the liquefied solder 5. Automatically move to the centering position. Thereafter, when the liquefied solder 5 is solidified by cooling, the semiconductor chip 6 is fixed to the chip mounting surface 4 with high positional accuracy, as shown in FIGS.

  In the bonding process of the semiconductor chip 6 described above, the semiconductor chip 6 may be simply placed on the chip mounting surface 4 of the lead frame 2, and in addition, strict positional accuracy is not required for the placement position. Specifically, a process for forming solder bumps as in the conventional example is not necessary, and it is not necessary to use a chip mounter with excellent positional accuracy characteristics, and it is sufficient to use an inexpensive chip mounter that is widely used. As described above, the semiconductor chip 6 can be fixed to the lead frame 2 with high positional accuracy by a simple bonding process and without using expensive equipment.

  When the semiconductor chip 6 has a side of 250 μm, the diameter of the chip mounting surface 4 is in the range of 300 μm to 400 μm, and a chip mounter with a mounting position accuracy of about ± 50 μm is used, the mounting accuracy can be within ± 25 μm.

  In the first embodiment, in the mask layer forming step, the mask layer 11 is provided so as to expose the periphery of the chip mounting surface 4 and to expose the cut portion of the lead frame base material 10, and in the etching step, the chip mounting is performed. Grooves 3 were formed around the surface 4 by etching, and cut portions of the lead frame base material 10 were cut by etching. Therefore, since the chip mounting surface 4 surrounded by the groove 3 can be simultaneously manufactured in the normal process of manufacturing the lead frame 2 from the lead frame base material 10, the desired chip mounting can be performed at low cost without adding a special process. The lead frame 2 having the surface 4 can be manufactured.

  In the first embodiment, the substrate is the lead frame 2 and the substrate base material is the lead frame base material 10, but may be a ceramic substrate or the like, a ceramic substrate base material, or the like.

  In the first embodiment, the bonding material is solder 5. Since the solder 5 exhibits a high surface tension in a liquid state, the semiconductor chip 6 can be reliably fixed with high positional accuracy by the self-alignment effect due to the surface tension. Of course, the bonding material may be an adhesive or the like that exhibits surface tension in a liquid state.

(Second Embodiment)
FIGS. 5 to 8 show a second embodiment of the present invention, FIGS. 5A and 5B are cross-sectional views and plan views of the main part of the semiconductor device, and FIGS. 6A to 6C are leads. FIGS. 7A and 7B are cross-sectional views showing a process for producing a lead frame from a frame base material, FIGS. FIG. 4B is a cross-sectional view and a plan view of a main part showing a state in which a semiconductor chip is placed in a chip receiving groove of a lead frame.

  As shown in FIGS. 5A and 5B, the semiconductor device 20 includes a lead frame 21 that is a substrate. The lead frame 21 is provided with a chip receiving groove 22 that is slightly larger than the mounting area of the semiconductor chip 24. The size of the chip receiving groove 22 is preferably about 1.5 times the mounting area of the semiconductor chip 24. The chip receiving groove 22 has a circular shape when viewed from above. A semiconductor chip 24 is fixed in the chip receiving groove 22 via solder 23 which is a bonding material. The semiconductor chip 24 is, for example, an optical semiconductor chip (laser diode, light emitting diode, etc.). The dimension of the semiconductor chip 24 is 250 μm on one side. In this embodiment, the diameter of the chip receiving groove 22 set slightly larger than the chip mounting area is set in the range of 500 μm to 600 μm. The depth of the chip receiving groove 22 is set so as not to exceed approximately 100 μm.

  Next, a manufacturing procedure of the semiconductor device 20 will be described. First, the mask layer 31 is formed on both surfaces of the lead frame base material 30 which is the base material of the substrate shown in FIG. 6A (mask forming process). As shown in FIG. 6B, the mask layer 31 is formed at a position where the cut portion of the lead frame base material 30 is exposed and the portion to be the lead frame 21 is covered. A mask layer 31 is formed on the lead frame 21 on which the semiconductor chip 24 is mounted so that the position corresponding to the chip receiving groove 22 is exposed. That is, the mask layer 31 is formed with an opening 31a for cutting a base material and an opening 31b for forming a chip receiving groove.

  Next, as shown in FIG. 6C, the lead frame base material 30 on which the mask layer 31 is formed is etched (etching step). In the etching process, a deep etching process is performed on the cut portion of the lead frame base material 30 and a shallow etching process is performed on the portion corresponding to the chip receiving groove 22. For example, the degree of etching is adjusted by changing the type of etching solution or changing the etching time. By performing such an etching process, the cut portion of the lead frame base material 30 is cut, and the lead frame base material 30 is divided into three lead frames 21. Further, a chip receiving groove 22 is formed in the lead frame 21 for mounting a semiconductor chip by a shallow etching process (see FIGS. 7A and 7B).

  In this embodiment, since isotropic etching is adopted as the etching, the chip receiving groove 22 has a substantially arc shape, but anisotropic etching may be used to make the chip receiving groove 22 rectangular. The etching method may be either dry etching or wet etching.

  Next, the mask layer 31 is removed from each lead frame 21 (mask layer removing step).

  Next, a bonding process for fixing the semiconductor chip 24 to the lead frame 21 is performed. In the bonding step, bonding that develops surface tension in the liquid state in the chip receiving groove 22 of the lead frame 21 shown in FIGS. 7A and 7B as shown in FIGS. A paste-like solder 23 which is a material is arranged. Next, the semiconductor chip 24 is mounted on the paste-like solder 23 using a chip mounter (not shown).

  Next, the paste-like solder 23 is heated to the melting point or higher and melted (liquefied). Then, the liquefied solder 23 is restricted in the range of the chip receiving groove 22 by the surface tension, and the semiconductor chip 24 is inserted into the chip receiving groove 22 by the self-alignment effect by the surface tension of the liquefied solder 23. Automatically move to the centering position. Thereafter, when the liquefied solder 23 is solidified by cooling, the semiconductor chip 24 is fixed in the chip receiving groove 22 with high positional accuracy, as shown in FIGS.

  In the bonding process of the semiconductor chip 24 described above, the semiconductor chip 24 may be simply placed in the chip receiving groove 22 of the lead frame 21, and in addition, strict positional accuracy is not required for the placement position. Specifically, a process for forming solder bumps as in the conventional example is not necessary, and it is not necessary to use a chip mounter with excellent positional accuracy characteristics, and it is sufficient to use an inexpensive chip mounter that is widely used. As described above, the semiconductor chip 24 can be fixed to the lead frame 21 with high positional accuracy by a simple bonding process and without using expensive equipment.

  When the semiconductor chip 24 has a side of 250 μm, the chip receiving groove 22 has a diameter in the range of 500 μm to 600 μm, and a chip mounter with a mounting position accuracy of about ± 50 μm is used, the mounting accuracy can be within ± 15 μm.

  In the second embodiment, in the mask layer forming step, a mask layer 31 is provided so as to expose a portion corresponding to the chip receiving groove 22 and to expose a cut portion of the lead frame base material 30, and in the etching step, Chip receiving grooves 22 were formed in the lead frame 30 by etching, and cut portions of the lead frame base material 30 were cut by etching. Accordingly, since the chip receiving groove 22 can be simultaneously manufactured in the normal process of manufacturing the lead frame 21 from the lead frame base material 30, the lead having the desired chip receiving groove 22 can be manufactured at low cost without adding a special process. The frame 21 can be produced.

  In the second embodiment, when the semiconductor chip 24 is a light emitting element such as a laser diode or a light emitting diode, or when it is a light receiving element, the side surface of the chip receiving groove 22 can be used as a light reflecting surface.

  In this second embodiment, the substrate is the lead frame 21, and the substrate base material is the lead frame base material 30, but it may be a ceramic substrate or the like.

  In the second embodiment, the bonding material is solder 23. Since the solder 23 exhibits a high surface tension in a liquid state, the semiconductor chip 24 can be reliably fixed with high positional accuracy by the self-alignment effect due to the surface tension. Of course, the bonding material may be an adhesive or a conductive adhesive that exhibits surface tension in a liquid state.

  In the first and second embodiments described above, the isotropic etching process is performed in the etching process, but anisotropic etching is preferable when processing dimensional accuracy is taken into consideration.

(A) is principal part sectional drawing of the semiconductor device which concerns on the 1st Embodiment of this invention, (b) is the top view. (A)-(c) is sectional drawing which shows each process of producing a lead frame from a lead frame base material. (A) is principal part sectional drawing of the chip | tip mounting surface vicinity of a lead frame, (b) is the top view. (A) is principal part sectional drawing which shows the state which mounted the semiconductor chip in the chip mounting surface of a lead frame, (b) is the top view. (A) is principal part sectional drawing of the semiconductor device which concerns on the 2nd Embodiment of this invention, (b) is the top view. (A)-(c) is sectional drawing which shows each process of producing a lead frame from a lead frame base material. (A) is principal part sectional drawing of the chip | tip accommodating groove vicinity of a lead frame, (b) is the top view. (A) is principal part sectional drawing which shows the state which mounted the semiconductor chip in the chip | tip accommodation groove | channel of a lead frame, (b) is the top view. It is a side view which shows a prior art example and shows the state which mounted the optical semiconductor chip on the silicon substrate. It is a side view which showed the prior art example and fixed the optical semiconductor chip on the silicon substrate with solder. It is a side view which shows the other conventional example and shows the state which mounted the semiconductor chip on the lead frame. FIG. 10 is a side view showing another conventional example in which a semiconductor chip is fixed on a lead frame with a conductive adhesive.

Explanation of symbols

1,20 Semiconductor device 2,21 Lead frame (substrate)
3 Groove 4 Chip mounting surface 5,23 Solder 6,24 Semiconductor chip 10,30 Lead frame base material (substrate base material)
11, 31 Mask layer 22 Chip receiving groove

Claims (7)

  A substrate is provided with a chip mounting surface that is surrounded by a groove and is approximately the same size as the mounting area of the semiconductor chip, and a bonding material that expresses surface tension in a liquid state is disposed on the chip mounting surface, A semiconductor device characterized in that a semiconductor chip placed on the bonding material is fixed to the chip mounting surface via the bonding material.   A chip receiving groove slightly larger than the mounting area of the semiconductor chip is provided on the substrate, a bonding material that expresses surface tension in a liquid state is disposed in the chip receiving groove, and the semiconductor chip placed on the bonding material is mounted. A semiconductor device characterized in that the inside of the chip receiving groove is fixed via the bonding material. A semiconductor device according to claim 1 or 2, wherein
The semiconductor device, wherein the substrate is a lead frame. A semiconductor device according to any one of claims 1 to 3,
The semiconductor device, wherein the bonding material is solder. A mask layer forming step of providing a mask layer on the substrate base material so as to expose a region corresponding to the chip receiving groove;
An etching process in which an etching process is performed on the substrate base material to provide a chip receiving groove in a portion exposed from the mask layer; and
A bonding material that expresses a surface tension in a liquid state is disposed in the chip housing groove, a semiconductor chip is placed on the bonding material, the bonding material is solidified from a liquid, and the semiconductor chip is bonded. A bonding step of fixing in the chip receiving groove through a material;
A method for manufacturing a semiconductor device, comprising: A method of manufacturing a semiconductor device according to claim 5,
The method of manufacturing a semiconductor device, wherein the substrate base material is a lead frame base material. A method of manufacturing a semiconductor device according to claim 6,
In the mask layer forming step, a mask layer is provided so as to expose the cut portion of the lead frame base material, and in the etching step, the cut portion of the lead frame base material is cut by etching. Method.

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