JP2008034875A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device the flexural strength of which can be improved, and to provide its manufacturing method. <P>SOLUTION: The semiconductor device has curved surfaces 22-1 to 22-4 with a curvature radius of 0.5 to 50 μm, at a predetermined location in a part where the side surfaces 21-1 to 21-4 and the back surface 21A of a semiconductor chip 21 with a thickness of 20 to 40 μm join. Since the edges of the back surface side of the semiconductor chip are made into curved surfaces, chippings that will become the starting point of cracks are removed, stress concentration can be prevented, and the flexural strength (bending strength) can be improved. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a shape of a semiconductor chip capable of improving the bending strength of the chip and a manufacturing method thereof.

  In general, a large number of irregularities are formed on the edges of the side surfaces 11-1 to 11-4 and the back surface 11 </ b> A of the semiconductor chip 11 by chipping (chips) 12 during dicing, as shown in FIG. 8. FIGS. 9A, 9B, and 9C are SEM (Scanning Electron Microscope) photographs of the actual semiconductor chip 11. FIGS. 9A and 9B show the semiconductor chip 11 as viewed from the back surface 11A side. FIG. 4C is a SEM photograph of the semiconductor chip 11 viewed from the side.

  Thus, many damages due to chipping are formed on the edge of the conventional semiconductor chip 11 in a dicing process or the like.

  For this reason, as shown in FIG. 10A, for example, the pressure at the time of pickup in the mounting process to the lead frame or TAB tape, or the pressure F due to the difference in thermal expansion characteristics between the package material and the semiconductor chip 11 is the element formation surface. When applied to the 11B side, as shown in FIG. 10B, the semiconductor chip 11 is easily cracked starting from the chipping 12 due to stress concentration on the chipping 12 or the like.

  In order to reduce the chipping generated at the edge of the back surface 11A of the semiconductor chip 11, a technique called a pre-dicing (also called DBG, abbreviation for Dicing Before Grinding) method has been proposed (see, for example, Patent Document 1). By using this technique, as shown in FIG. 11, chipping 12 generated at the edges of the side surfaces 11-1 to 11-4 and the back surface 11A of the semiconductor chip 11 can be significantly suppressed. 12A, 12B, and 12C are SEM photographs of an actual semiconductor chip 11 formed by using the tip dicing method. FIGS. 12A and 12B show the semiconductor chip 11 on the back surface 11A. An SEM photograph of one corner portion viewed from the side, and FIG. 5C is an SEM photograph of the semiconductor chip 11 viewed from the side surface.

  However, when the semiconductor chip 11 is thinned (100 μm or less) or in an elongated semiconductor chip 11, stress is concentrated on the edge of the back surface 11 </ b> A of the semiconductor chip 11 even without the chipping 12, and the semiconductor chip 11. The strength of 11 is significantly reduced.

For this reason, there is a problem that the semiconductor chip 11 is broken in an assembly process or a reliability test until the semiconductor chip 11 is packaged, and a defective product is generated.
JP 61-112345 A

  As described above, the conventional semiconductor device and the manufacturing method thereof have a problem that the semiconductor chip is cracked in an assembly process, a reliability test, or the like when the semiconductor chip is thinned or elongated.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor device capable of improving the bending strength and a manufacturing method thereof.

  In a semiconductor device according to one embodiment of the present invention, a semiconductor element is formed on a main surface of a semiconductor substrate having a thickness of 20 to 40 μm. In the semiconductor substrate, a side surface and a back surface at a position corresponding to the main surface; A curved surface having a radius of curvature of 0.5 μm to 50 μm and no inflection point is provided at a predetermined position of the part where the

  According to the above configuration, it is possible to suppress stress concentration on the edge of the back surface of the semiconductor substrate and to increase the bending strength (bending strength).

  The semiconductor device manufacturing method according to one aspect of the present invention includes a groove having a depth that does not reach the back surface from the main surface side of the semiconductor wafer along the dicing line or chip dividing line of the semiconductor wafer on which the element is formed. Thinning of the semiconductor wafer by performing a step of forming the semiconductor wafer, a step of attaching a surface protection tape to the element forming surface of the semiconductor wafer, and grinding the back surface of the semiconductor wafer to a thickness of 20 to 40 μm And the step of simultaneously dividing into individual semiconductor substrates by the grooves, and the semiconductor wafer in a state where the kerf width is 10 μm or more after simultaneously performing the thinning of the semiconductor wafer and the division into individual semiconductor substrates. Forming a curved surface with a radius of curvature of 0.5 μm to 50 μm at a predetermined position of a portion where the side surface and the back surface of the substrate intersect, Zui by controlling the radius of curvature.

  According to the above method, since the damaged layer formed on the edge of the back surface of the semiconductor substrate is removed, it is possible to suppress stress concentration on chipping and the like, and stress is concentrated on the edge of the back surface of the semiconductor substrate. Therefore, the bending strength can be increased.

  As described above, according to the present invention, a semiconductor device capable of improving the bending strength and a manufacturing method thereof can be obtained.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 and FIGS. 2 (a) and 2 (b) are each for explaining a semiconductor device according to an embodiment of the present invention. FIG. 2A is a perspective view seen from the side 21A, FIG. 2A is a SEM photograph of one corner when the semiconductor chip 21 is seen from the back surface 21A side, and FIG. 2B is an SEM photograph of the semiconductor chip 21 seen from the side. It is.

  The semiconductor chip 21 is configured in a state in which a semiconductor element is formed on a main surface of an individual silicon wafer corresponding to a substrate.

  In the present embodiment, as shown in FIG. 1, the radius of curvature (R) is 0.5 μm to 50 μm at all portions (edges) where the side surfaces 21-1 to 21-4 of the semiconductor chip 21 intersect with the back surface 21 </ b> A. The curved surfaces 22-1 to 22-4 of the range are formed. The curved surfaces 22-1 to 22-4 are formed so as not to affect elements and wirings formed on the main surface 21B side of the semiconductor chip 21. For example, it is formed in a region outside the bonding pad formed on the main surface 21B of the semiconductor chip 21. Thereby, it is possible to suppress the occurrence of cracks in the semiconductor chip 21 due to the pressure applied during bonding. Alternatively, in the case of the semiconductor chip 21 in which the guard ring is formed, it is possible to prevent the electrical characteristics of the element from being affected by forming it in a region outside the guard ring.

  According to experiments, the curvature radius (R) has an effect of improving the bending strength from about 0.5 μm. This is because, as shown in FIG. 3, the depths (fracture layers) ΔD1 and ΔD2 of the flaws entering the semiconductor chip 21 by cutting by dicing or grinding by BSG are about 0.5 μm, and the crush layer at the edge is removed. It is assumed that the bending strength is improved. In particular, the influence on the bending strength of the portion where the side surfaces 21-1 to 21-4 of the semiconductor chip 21 intersect with the back surface 21 </ b> A and the crushing layer (damage) formed at the corner 23 is great. Therefore, by processing the portion where the side surfaces 21-1 to 21-4 intersect with the back surface 21A and the corner portion 23 into a shape having a radius of curvature of at least 0.5 μm, the influence of damage can be suppressed.

  Further, due to the curved surfaces 22-1 to 22-4, for example, stress due to the difference in thermal expansion characteristics between the package material and the semiconductor chip 21 during the pickup in the mounting process to the lead frame or the TAB tape or after the sealing is performed. Therefore, the bending strength (bending strength) can be increased.

  The curvature of the curved surfaces 22-1 to 22-4 is preferably about 20 μm when the thickness of the semiconductor chip 21 is 20 to 40 μm, and it is experimentally confirmed that a bending strength of 1 GPa close to the strength of silicon itself can be obtained. confirmed. Although depending on the thickness of the semiconductor chip 21, if the radius of curvature exceeds 50 μm, cracks are generated when pressure is applied to the bonding pad 25 formed on the main surface 21 </ b> B side of the semiconductor chip 21 in wire bonding or the like. May occur. Therefore, in order to suppress such a decrease in the strength of the semiconductor chip 21, it is preferable that the radius of curvature does not exceed 50 μm.

  The curved surfaces 22-1 to 22-4 preferably have no inflection points in order to further suppress the concentration of stress.

  FIG. 4 is a characteristic diagram showing the relationship between the bending strength and the defect occurrence rate (cumulative) in a semiconductor chip having the shape of the present invention and the conventional case (with or without chipping on the back surface edge). As shown in the drawing, when there is no chipping at the edge of the back surface, the bending strength is higher than when there is chipping, but in the present invention, the bending strength can be further increased.

  FIG. 5 is a characteristic diagram showing the relationship between the bending strength of the semiconductor chip and the defect occurrence rate (cumulative) with respect to the difference in curvature radius (R). The bending strength is higher in the middle case than in the case where the radius of curvature is small.

  In the above embodiment, the curved surfaces 22-1 to 22-4 are formed in all the portions where the side surfaces 21-1 to 21-4 and the back surface 21A of the semiconductor chip 21 intersect, but the side surfaces 21-1 and 21 are further formed. -2, 21-2 and 21-3, 21-3 and 21-4, and 21-4 and 21-1 may be curved.

  Next, a method for manufacturing the semiconductor chip 21 having the above configuration will be described with reference to the process chart of FIG.

  First, various elements are formed on the main surface of the semiconductor wafer by a known manufacturing process (STEP 1).

  Next, the main surface of the semiconductor wafer on which the above element formation is completed is diced, and a groove having a depth that does not reach the back surface from the main surface side of the wafer is formed along a dicing line or a chip dividing line. (STEP 2). For example, a diamond scriber, a diamond blade, or a laser scriber is used to form the half cut groove. The depth of the cut is about 10-30 μm (at least 5 μm) deeper than the final finished thickness of the chip. How much is increased depends on the accuracy of the dicer and grinder.

  Thereafter, a surface protection tape is attached to the element forming surface of the half-cut and diced semiconductor wafer, and the wafer is mounted on the wafer ring (STEP 3). This surface protection tape prevents damage to the device in the process of scraping and thinning the back surface of the wafer.

  Next, backside grinding (STEP 4) of the wafer is performed. In the back surface grinding process, the back surface of the wafer is shaved to a predetermined thickness while rotating a wheel with a grindstone at a high speed of 4000 to 7000 rpm. The grindstone is formed by hardening artificial diamond with a phenol resin. This back grinding process is often performed with two axes. There is also a method of roughing with a No. 320-600 grinding wheel in advance on one axis and then finishing with a No. 1500-2000 grinding wheel on two axes. Further, a method of grinding with three axes may be used. When the grinding reaches the groove, the semiconductor wafer is divided into individual semiconductor chips. Even after the semiconductor wafer is singulated, the back surface grinding is continued to a predetermined thickness, whereby the chipping formed at the position where the side surface and the back surface of the semiconductor chip intersect can be removed.

  Subsequently, the back surface of the semiconductor chip is mirror-finished by wet etching, plasma etching, polishing, buffing, CMP (Chemical Mechanical Polishing), or the like. As a result, the back-grinding streak can be removed, so that the bending strength can be further increased.

  After the semiconductor wafer is separated into pieces by the back surface grinding, the surface protection tape 24 is expanded (expanded) between the semiconductor chips 21-1 and 21-2 as shown by arrows in FIGS. 7 (a) and 7 (b). And the kerf width ΔD3 is set to about 30 μm. Of course, the cutting width (groove width) may be widened when forming the half-cut groove instead of extending the surface protection tape 24. In any case, the kerf width ΔD3 is preferably 10 μm or more.

  In this state, any one of mechanical processing, chemical processing, or processing combining chemical processing and mechanical processing, for example, CMP, wet etching, dry etching, etc., is performed to obtain curved surfaces 22-1-22. -4 is formed. By increasing the kerf width ΔD3 as described above, grinding can be performed at the time of CMP, and a curved surface can be formed at all the portions where the side surface and the back surface of the semiconductor chip intersect. Further, when the curved surface is formed by wet etching, the etching solution is easily circulated. Thereby, curved surfaces 22-1 to 22-4 having a radius of curvature of 0.5 μm to 50 μm can be formed. This radius of curvature can be controlled by the kerf width ΔD3. When the kerf width ΔD3 is increased, the radius of curvature increases.

  The curved surfaces 22-1 to 22-4 are formed, for example, in a region outside the bonding pad 25 formed on the main surfaces of the semiconductor chips 21-1 and 21-2. Thereby, it is possible to suppress the occurrence of cracks in the semiconductor chips 21-1 and 21-2 due to the pressure applied in the subsequent bonding process. Alternatively, in the case of the semiconductor chips 21-1 and 21-2 in which the guard ring 26 is formed, the curved surfaces 22-1 to 22-4 are formed in the region outside the guard ring 26 so that the curved surfaces 22-1 to 22-4 are formed in the semiconductor chip 21-1. , 21-2 does not affect the elements and wirings formed on the main surface side.

  Thereafter, the semiconductor device is completed through a mounting process such as a semiconductor chip pick-up process, a lead frame or TAB tape mounting process, a package sealing process, etc. (Step 7).

  According to such a manufacturing method, since CMP is performed after first dicing, a semiconductor chip having a curved surface with a desired radius of curvature at the back surface edge can be formed by a simpler process (small manufacturing steps).

  In addition, this invention is not limited to the said embodiment, A various deformation | transformation is possible.

[Modification 1]
In the above-described embodiment, the case where the semiconductor wafer is separated into individual semiconductor chips using the prior dicing technique has been described as an example. However, the present invention can be applied to the case where the semiconductor wafer is divided by full cut dicing.

[Modification 2]
After applying the surface protective tape, before the back surface grinding, the semiconductor wafer may be separated by cleavage and then back surface grinding may be performed. For example, a jig is pressed against the back side of the wafer, and the wafer is cleaved along the crystal orientation starting from the groove formed in the peripheral portion of the wafer. Alternatively, by applying a load along the chip dividing line from the back surface of the wafer, the wafer is cleaved along the crystal orientation starting from the groove formed in the peripheral portion of the wafer. Then, while sequentially moving the jig or wafer, the wafer is cleaved along the crystal orientation starting from the groove.

[Modification 3]
In the above embodiment, the curved surface is formed by etching after the semiconductor wafer is separated into individual semiconductor chips. However, even if the curved surface is formed by widening the opening of the groove by etching before the back surface grinding. good. Then, if the back surface is ground and separated into individual semiconductor chips, a curved surface can be formed at all the portions where the side surface and the back surface of the semiconductor chip intersect, as in the above embodiment.

[Modification 4]
In the above embodiment, the case where the curved surface is formed by etching has been described as an example. However, mechanical processing or chemical processing (wet etching / dry etching (plasma / laser, etc.)) or chemical and mechanical processing has been described. CMP is performed with good workability. In chemical processing, in order to round the edge of the back surface, a mask may be formed on a portion other than the edge, and chemical etching may be performed.

[Modification 5]
Although the case where the back surface of the semiconductor chip is mirror-finished has been described as an example, this is not necessarily an essential process, and minute unevenness (such as unevenness due to mechanical processing) such as streaks remains on the side surface and back surface of the semiconductor chip Even in the state, the effect of increasing the bending strength can be obtained.

[Modification 6]
Although the case where the surface protection tape is attached to the wafer ring has been described as an example in the above embodiment, the wafer ring is not necessarily used.

  In the present embodiment, as described above, in the semiconductor chip, the curved surface having the above-described radius of curvature is formed in all portions where the side surface and the back surface intersect. However, it is not necessary to form such a curved surface in all parts depending on the shape of the semiconductor chip. For example, when the shape of the semiconductor chip is a rectangle, the same effect can be obtained even if the curved surface having the above-described curvature is formed only in a necessary portion, such as forming only two long sides.

  Although the present invention has been described using the embodiment and its modifications, the present invention is not limited to the embodiment and its modifications, and various modifications can be made without departing from the scope of the invention at the stage of implementation. It is possible to deform to. The above-described embodiments and modifications thereof include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed structural requirements, including the order in which the steps are performed. Can be done. For example, even if some constituent elements are deleted from all the constituent elements shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and the effect described in the column of the effect of the invention Can be obtained as an invention.

The perspective view which looked at the semiconductor chip from the back surface side of an element formation surface for demonstrating the semiconductor device which concerns on embodiment of this invention. BRIEF DESCRIPTION OF THE DRAWINGS It is for demonstrating the semiconductor device which concerns on embodiment of this invention, (a) A figure is the SEM photograph of one corner | angular part which looked at the semiconductor chip from the back surface side, (b) The figure expanded the semiconductor chip from the side surface SEM photograph seen. The characteristic view which shows the relationship between the bending strength and defect incidence (cumulative) in the semiconductor chip of the shape of this invention and the former (when there is no chipping in a back surface edge). The characteristic view which shows the relationship between the bending strength of a semiconductor chip with respect to the difference in curvature radius, and defect incidence (cumulative). The characteristic view which shows the relationship between the bending strength of a semiconductor chip with respect to the difference in curvature radius (R), and defect occurrence rate (cumulative). Process drawing for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS It is for demonstrating in detail one part process in the manufacturing method of the semiconductor device which concerns on embodiment of this invention, (a) A figure is a top view which sees through a surface protection tape, (b) A figure is (a) ) Cross-sectional view along line 7B-7B in the figure. The perspective view which looked at the semiconductor chip from the back surface side for demonstrating the conventional semiconductor device. It is for demonstrating the conventional semiconductor device, (a) figure and (b) figure are SEM photographs of one corner which looked at the semiconductor chip from the back side, and (c) figure looked at the semiconductor chip from the side. SEM photograph. 2A and 2B are diagrams for explaining a conventional semiconductor device, in which FIG. 1A is a diagram for explaining stress applied to a semiconductor chip, and FIG. 2B is a diagram for explaining generation of cracks. The perspective view which looked at the semiconductor chip from the back side for demonstrating the conventional improved semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS It is for demonstrating the conventional improved semiconductor device, (a) A figure and (b) figure are the SEM photographs of one corner | angular part which looked at the semiconductor chip from the back surface side, (c) The figure is a side view of the semiconductor chip. SEM photograph seen from.

Explanation of symbols

21 ... Semiconductor chip (semiconductor substrate)
21-1 to 21-4: Side surface of semiconductor chip 21A: Back surface of semiconductor chip 21B ... Main surface of semiconductor chip 22-1 to 22-4 ... Curved surface 23 ... Corner 24 ... Surface protective tape 25 ... Bonding pad 26 ... Guard ring

Claims (5)

  A semiconductor element is formed on a main surface of a semiconductor substrate having a thickness of 20 to 40 μm, and a radius of curvature is provided at a predetermined position of a portion where a side surface of the semiconductor substrate and a back surface at a position corresponding to the main surface intersect. Has a curved surface having no inflection point at 0.5 μm to 50 μm.   2. The semiconductor device according to claim 1, wherein the curved surface is formed at all portions where a side surface and the back surface of the semiconductor substrate intersect. Forming a groove having a depth that does not reach the back surface from the main surface side of the semiconductor wafer, along the dicing line or chip dividing line of the semiconductor wafer on which the element is formed;
A step of attaching a surface protection tape to the element forming surface of the semiconductor wafer;
Performing the backside grinding of the semiconductor wafer so as to have a thickness of 20 to 40 μm, thereby simultaneously performing thinning of the semiconductor wafer and division into individual semiconductor substrates by the grooves;
After the semiconductor wafer is thinned and divided into individual semiconductor substrates at the same time, the radius of curvature is at a predetermined position at the intersection of the side surface and the back surface of the semiconductor substrate with a kerf width of 10 μm or more. Forming a curved surface of 0.5 μm to 50 μm,
A method of manufacturing a semiconductor device, wherein the radius of curvature is controlled based on the kerf width.   4. The method of manufacturing a semiconductor device according to claim 3, wherein the curved surface is formed in all of the portions where the side surface and the back surface of the semiconductor substrate intersect. 5.   The method of manufacturing a semiconductor device according to claim 3, wherein the step of forming the curved surface includes at least one of CMP, wet etching, and dry etching.

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