JP2003229460A - MOSFET and manufacturing method thereof - Google Patents

Abstract

(57) [Problem] To realize a bonding wireless structure of a power MOSFET, Ti-Ni-Au to be a UBM
However, in some cases, the preform material spreads and black spots causing chip cracks occur in the Au-rich portion. SOLUTION: By using Ti-Ni-Cu-Au for the UBM, the spread of the preform material can be suppressed, and the occurrence of black spots can be prevented. As a result, chip cracks are greatly reduced, so that there is an advantage that superiority is recognized in a reliability evaluation test even under conventional assembly conditions.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a MOSFET, and more particularly, to a method for manufacturing a MOSFET that alleviates the generation of black spots and suppresses the generation of cracks in a preform material used for a MOSFET having a wireless electrode structure.

[0002]

2. Description of the Related Art In a conventional semiconductor device assembling process, a semiconductor element which has been diced from a wafer and separated is fixed to a lead frame, and the semiconductor element is sealed by a transfer mold by a mold and resin injection. A process of cutting and separating each semiconductor device is performed.

FIG. 4 shows a MOS manufactured by the above method.
An example of FET is shown. FIG. 4A is a top view and B-
FIG. 4B is a sectional view taken along line B, and FIG. 4 is an enlarged view of an electrode portion.
It shows in (C).

MOSFET manufactured by a known method
1 has a source electrode and a gate electrode made of an aluminum alloy or the like as the surface electrode 2. Leads 26 and 27 are fixed to these surface electrodes 2, but the adhesiveness to the preform material (solder or conductive paste) is poor, so T
It is adhered via a conductive metal layer 50 such as i-Ni-Au.

The lead frame is a punched frame made of copper, and the bare chip 1 of the power MOSFET is fixed on the header 21 of the frame by the preform material 4 made of solder or Ag paste. A drain electrode is formed by a gold backing electrode (not shown) on the bare chip 1 of the power MOSFET, and a surface electrode 2 serving as a source electrode and a gate electrode is formed on the upper surface by vapor deposition of an aluminum alloy. Further, a conductive metal layer 50 of Ti—Ni—Au is vapor-deposited on the upper part of the preform material in order to reduce the resistance with respect to the solder etc. 4 and to improve the adhesiveness. The frame drain terminal 25 is the header 2
Since it is connected to the drain electrode 1, it is directly connected to the drain electrode and is the pad electrode 2 of the gate pad electrode and the source pad electrode.
Are electrically connected to the gate terminal 26 and the source terminal 27 by solder or conductive paste 5.

The bare chip 1 and the frame of the power MOSFET are resin-sealed with a die and a transfer mold, and the resin layer 28 constitutes the package outer shape.

As described above, in the transistor of the bonding wireless structure in which the lead frame is directly fixed without using the bonding wire for connecting the semiconductor chip and the lead frame, the resistance of the bonding wire itself is not added to the on-resistance of the semiconductor chip. It is possible to realize a semiconductor device that does not hinder the characteristics of the element and has a small loss.

A conventional method of manufacturing an electrode portion of a semiconductor device will be further described with reference to FIG.

First, for example, an MO manufactured by a known method.
A surface electrode (Al layer) 2 serving as a source electrode or a gate electrode is formed on the surface of the SFET 1 by using, for example, aluminum.
To form. After that, an insulating protective film (not shown) is deposited on the entire surface, and the insulating protective film on the surface electrode 2 is selectively etched to form an opening. Subsequently, for example, a Ti film 51 having a thickness of 100 Å and a Ni film 52 having a film thickness of 200 Å are provided.
And an Au film 53 having a film thickness of 1000 Å, for example, are continuously deposited.

Next, the preform material 4 such as solder is supplied onto the Au film 53 to fix the leads 27.

[0011]

Conventionally, in the case of realizing a wireless electrode structure, leads are fixed to a source electrode and a gate electrode of a MOSFET by a preform material such as solder. Also, in this case, in order to reduce the contact resistance between the preform material and the lead, UBM (UnderBump M
For example, a vapor-deposited metal layer such as Ti-Ni-Au referred to as "etal" is used. Here, Ti is adopted for the purpose of improving the adhesiveness with Al, which is the pad electrode of the MOSFET, Ni is for the purpose of bonding with the solder and for preventing the erosion of Al, and Au is the wettability of the solder. It is deposited for the purpose of improvement and anti-oxidation.

However, in this case, as shown in FIG. 4A, black spots 40 may occur at the peripheral edge of the solder. this is,
It is considered that solder is generally point-supplied, and the amount thereof decreases as the distance from the supply source increases. Since the amount of solder becomes non-uniform with respect to the Au layer formed uniformly by vapor deposition, the ratio of solder and Au varies, and the amount of Au relatively increases in the peripheral portion where the amount of solder is small.
When Au and the solder come into contact with each other, the solid Au surface disappears and a new interface is formed. At the interface, an intermetallic compound is generated, but in the peripheral portion, a metal rich in Au is contained in the solder. It is believed that intermetallic compounds are produced.
Since Ni under Au also has a good wettability, the intermetallic compound rich in Au remains in the peripheral portion while spreading, and for example, in the process of melting and solidifying such as resin molding, the ratio of the solder and the Au is out of balance. As a result, an intermetallic compound that becomes a foreign substance may be generated.

The intermetallic compound which is the foreign matter is a black dot 40, and the black dot causes cracks, which causes problems such as reduction in yield and deterioration of reliability.

[0014]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and a surface electrode on a MOSFET and a surface electrode which is deposited on the surface electrode and has good adhesion to the surface electrode is provided. A first conductive metal layer, a second conductive metal layer deposited on the first conductive metal layer to prevent erosion of the preform material, and a second conductive metal layer deposited on the second conductive metal layer. ,
A third conductive metal layer for suppressing the spread of the preform material, and a fourth conductive metal layer deposited on the third conductive metal layer and having good wettability with the preform material. It is something that can be solved.

Further, a conductive metal layer is formed on the surface electrode of the MOSFET in order to improve the adhesiveness between the surface electrode and the preform material, and the preform material on the conductive metal layer is applied to lead. MOSFE having a step of fixing
The manufacturing method of T is characterized by including a step of adding a metal layer for the purpose of suppressing spread of the preform material to the conductive metal layer.

[0016]

DETAILED DESCRIPTION OF THE INVENTION A MOSFET of the present invention will be described below with reference to FIGS.

In the process of assembling a semiconductor device, a semiconductor element separated from a wafer by dicing is fixed to a lead frame, the semiconductor element is sealed by transfer molding by a mold and resin injection, and the lead frame is cut into individual pieces. The process of separating each semiconductor device is performed.

FIG. 1 shows a MOS manufactured by the above method.
An example of FET is shown. FIG. 1A is a top view.
1B is a cross-sectional view taken along the line AA, and an enlarged view of the electrode portion is shown in FIG. The same components as those shown in FIG. 4 are designated by the same reference numerals. The semiconductor device of the present invention is a MOSF.
ET1, the surface electrode 2, the first conductive metal layer 3a, the second conductive metal layer 3b, and the third conductive metal layer 3c,
It is composed of the fourth conductive metal layer 3d, the preform material 4, and the leads 25, 26, 27.

A large number of M's are present in the actual operating area of the MOSFET 1.
The cells of the OSFET transistors are arranged, the source region of each cell contacts a source electrode provided to cover the actual operation region, and the gate electrode extends outside the actual operation region to contact the gate pad electrode. This is because the junction area needs to be as large as possible in order to reduce the on-resistance.

The lead frame is a punched frame made of copper having a drain terminal 25, a gate terminal 26 and a source terminal 27, and a preform material 4 made of solder or Ag paste on the header 21 of the frame is used for the power MOSFET. The bare chip 1 is fixed. On the bottom surface of the bare chip 1 of the power MOSFET, a drain electrode is formed by a gold backing electrode (not shown),
On the upper surface, a surface electrode layer (A
1 layer) 2 is formed.

Further, as will be described in detail later, the preform material 4
UMB (Under Bump Metal) to lower the resistance to
Then, a conductive metal layer 3 made of a metal film of Ti-Ni-Cu-Au is vapor-deposited on the upper portion thereof. Since the drain terminal 25 of the frame is connected to the header 21, it is directly connected to the drain electrode, and the source pad electrode and the gate pad electrode are electrically connected to the gate terminal 26 and the source terminal 27 by the solder or the conductive paste 4.

Here, Ti is a metal layer having good adhesion to the surface electrodes (source pad electrode, gate pad electrode). Also, the Ni provided on it is T
It is provided to prevent i from being eroded. Furthermore,
Cu is provided on Ni and suppresses the lateral spread of the solder. Au having good wettability with solder is deposited thereon.

The bare chip 1 and the frame of the power MOSFET are resin-sealed with a mold and a transfer mold, and the resin layer 28 constitutes the package outer shape.

As described above, in a transistor having a bonding wireless structure in which a bonding wire is not directly used to connect the semiconductor chip and the lead frame and the lead frame is directly fixed, the resistance of the bonding wire itself is not added to the on-resistance of the semiconductor chip. It is possible to realize a semiconductor device that does not hinder the characteristics of the element and has a small loss.

The feature of the present invention is that the Cu layer 3 is provided between the Au layer 3d and the Ni layer 3b of the conductive metal layer 3 used as the UMB.
c is provided. Since the solder is supplied by points, the amount of solder is reduced in the peripheral portion, and the ratio with Au uniformly provided varies. Originally, Au reacts with solder in a well-balanced manner to form an intermetallic compound, so it is a material with good wettability, but since the amount of Au is relatively large in the peripheral portion, an imbalanced intermetallic compound is formed. It is thought to be. When Ni is below Au as in the conventional structure, Ni also has a good wettability, so that the intermetallic compound rich in Au remains spread, which causes black spots in the process of melting and solidification such as resin molding. Cause cracks.

Therefore, according to the present invention, a thick Cu layer, which is a metal layer having poor wettability, is provided below the Au layer 3d to prevent lateral spread of the Au-rich solder. Although the detailed principle is not clear,
Poor wettability means that an alloying reaction between the two is unlikely to occur, and therefore does not spread laterally. In particular, since Cu is a material that has poor wettability and is easily eroded by solder, erosion of the Cu surface can suppress the lateral spread of an unbalanced intermetallic compound. it is conceivable that.

As a result, the unbalanced intermetallic compound does not remain in the peripheral portion, so that the generation of black spots can be suppressed,
It can prevent cracks.

The method of manufacturing the semiconductor device of the present invention will be described in detail with reference to FIGS.

The method of manufacturing the MOSFET of the present invention is based on the MO method.
A step of depositing a first conductive metal layer having good adhesion with the surface electrode on the surface electrode of the SFET, and a second conductivity for preventing corrosion of the preform material on the first conductive metal layer. A step of depositing a metal layer, a step of depositing a third conductive metal layer that suppresses the spread of the preform material on the second conductive metal layer, and a preform material on the third conductive metal layer And a step of applying a preform material on the fourth conductive metal layer and fixing the leads to the preform material. .

As shown in FIG. 2A, the first step of the present invention is to deposit on the surface electrode 2 of the MOSFET 1 a first conductive metal layer having good adhesion to the surface electrode. .

MOSFET 1 is formed on a semiconductor substrate by a known method, and a source electrode and a gate electrode are formed as surface electrode layer 2. The surface electrode layer 2 is a metal layer made of Al or Al alloy or the like, and is provided on the actual operation region in the same step. The SiN layer provided thereon is patterned into a desired source electrode and gate electrode shape to form a pad. Since an electrode is used, a source electrode will be described here as an example.

Next, considering the oxidation resistance and moisture resistance of the Al layer, a SiN layer 23 having a thickness of 600 is formed on the surface electrode layer 2 by the CVD method at 800 ° C. for about 2 hours.
Deposition is about 0Å-8000Å. After that, a resist 39 is deposited on the SiN layer 23 other than the source electrode formation region 24. Then, using the resist 39 as a mask, the source electrode 2 is formed by a known photolithography technique.
4 SiN layer 23 on the formation region is removed. At this time, Si
The N layer 23 is removed more than the resist 39, and the end portion of the resist 39 is formed as if the eaves were provided to the SiN layer 23. Then, a second opening 42 is formed by the resist 39 inside the first opening 38 made of the SiN layer 23 and becomes a pad electrode (source electrode). As a result, the structure shown in FIG. 2A is obtained.

Next, as shown in FIG. 2B, the conductive metal layer 3 is formed on the source electrode 24 through the opening 42 made of the resist 39 by the lift-off method. First, as the first metal layer, a Ti layer 3a having good adhesion to Al, for example, about 50 to 150 Å is deposited on the surface electrode 2 by electron impact heating vapor deposition.

The second step of the present invention is also shown in FIG.
As shown in FIG. 3, a second conductive metal layer for preventing corrosion of the preform material is deposited on the first conductive metal layer.

This Ti layer 3a is used as the second metal layer.
In consideration of solder erosion prevention, solderability, etc., for example, a Ni layer 3b of about 150 to 250 Å is deposited by electron impact heating vapor deposition.

The third step of the present invention is to deposit a third conductive metal layer for suppressing the spread of the preform material on the second conductive metal layer as shown in FIG. 2B. is there.

This step is a characteristic step of the present invention. As the third metal layer, the Cu layer 3c is formed on the Ni layer 32 in the same manner as the second metal layer, and the Cu layer 3c is about 1000 to 4000 Å. It is deposited by the resistance heating vapor deposition method.

As a result, the spread of the solder applied in the subsequent step can be suppressed and the generation of black spots can be suppressed. Since the solder is supplied by points, the amount of solder is reduced in the peripheral portion, and the ratio with Au uniformly provided varies. Originally, Au reacts with the solder to form an intermetallic compound and is a material having good wettability, but in the peripheral portion, the intermetallic compound has a relatively large amount of Au. As in the conventional case, when Ni is below Au, Ni also has good wettability, so that the solder rich in Au remains spread, which causes black spots in the melting and solidifying process such as resin molding and cracks. It becomes a cause.

Therefore, according to the present invention, Cu is provided under Au so as to have a thick wettability and is easily corroded by solder, and C
By dissolving the surface of u, the spread of the unbalanced intermetallic compound in the lateral direction is stopped.
As a result, the unbalanced intermetallic compound does not remain in the peripheral portion, so that the generation of black dots can be suppressed and cracks can be prevented.

Here, Cr may be used in place of Cu, and Ni
It can be realized if it is a conductive metal layer having poor wettability as compared with.

Further, since the Cu layer is deposited by the resistance heating vapor deposition method, the layer thickness can be deposited to a desired thickness, so that the corrosion of the solder can be stopped only near the surface. As a result, it is possible to provide a semiconductor device having excellent solder joint strength and excellent product quality.

The fourth step of the present invention is also shown in FIG.
As shown in (3), the fourth conductive metal layer having good wettability with the preform material is deposited on the third conductive metal layer. As the fourth metal layer, on the Cu layer 3c,
Considering the wettability of the solder and the oxidation prevention of the Cu layer, the Au layer 3
About 500 to 1500 Å is deposited by the resistance heating vapor deposition method. Further, the fourth metal layer may be a Pd layer or a Pt layer.

As shown in FIG. 2C, the fifth step of the present invention is to apply a preform material on the fourth conductive metal layer and fix the leads to the preform material. This step is also a characteristic step of the present invention. That is, the conductive metal layer 3 on the resist 39 is removed together with the resist 39 by the lift-off method, and the desired source electrode 24 is removed.
The conductive metal layer 3 is left.

After that, the MOSFET chip is mounted on the island 27 of the Cu frame, the conductive metal layer 3 is supplied with solder, and is fixed to the lead 27 to obtain the structure shown in FIG. At this time, in the second step, Ni
Since the Cu layer is formed between the Au layer and the Au layer, as described above, the solder erodes the Cu and suppresses the spread in the lateral direction, so that the solder rich in the Au component does not remain in the peripheral portion, Generation of intermetallic compounds can be suppressed, and generation of black spots can be suppressed.

Further, according to the method of manufacturing a semiconductor device of the present invention, since the wireless structure can be realized on the source electrode 24, it can be applied to a semiconductor element having a high current density. Furthermore, since the source electrode 24 and the conductive member 25 are connected by soldering, it is possible to mount without impact as compared with the case of wire bonding.

Further, in the first and second steps, by depositing the Ti layer and the Ni layer by the electron impact heating vapor deposition method,
The manufacturing cost can be reduced. If Ti and Ni, which are refractory metals, are deposited by the sputtering method, the manufacturing cost becomes high. If you use the electron impact heating evaporation method,
The cost can be reduced. According to the manufacturing method of the present invention, the film thickness can be increased by depositing the Cu layer.
And Ni have a thin film thickness, that is, they have an advantage that they can be deposited by an inexpensive electron impact heating evaporation method.

Although the source electrode side has been described in the present embodiment, there is no particular limitation, and a similar structure can be formed on the gate electrode side. In addition, various modifications can be made without departing from the scope of the present invention.

Further, in the above-mentioned manufacturing method, the same effect can be obtained in the ion milling method as the second embodiment of the present invention described in the manufacturing method by the lift-off method.

That is, as shown in FIG. 3, after removing the SiN film 23 on the desired source electrode 24, the resist is removed and the conductive metal layer 3 is vapor-deposited from the first layer to the fourth layer on the entire surface. (FIG. 3 (A)), a mask of photoresist is applied so that the desired electrode shape remains (FIG. 3 (B)), and the exposed conductive metal layer 3 is removed by etching. At this time, the second to fourth conductive metal layers (Ni-Cu-
After removing Au) by ion milling, the first layer of Ti
Are removed by wet etching (FIG. 3C).
After that, the resist is removed (FIG. 3D) to obtain a final structure.

The feature of this manufacturing method by ion milling is that the conductive metal layer 3 is expanded and attached on SiN, and therefore, although not shown here, when the gate electrode side also has a wireless structure (the area of the gate electrode is not shown). If you want to take a wide range), this is an effective method.

[0051]

According to the structure of the present invention, Au and Ni of the conductive metal layer 3 used as the UBM of the wireless electrode structure are provided.
A Cu layer is provided between them. Since the solder is supplied by points, the amount of solder is reduced in the peripheral portion, and the ratio with Au uniformly provided varies. Au reacts with the solder to become an intermetallic compound, but in the peripheral portion, it becomes an intermetallic compound having a relatively large amount of Au. When Ni is below Au as in the conventional structure, Ni also has a good wettability, so that an unbalanced intermetallic compound rich in Au remains spread, which is a black dot in the process of melting and solidification such as resin molding. Generate
It will cause cracks.

Therefore, according to the present invention, Cu,
By providing a thick metal layer such as Cr, which has poor wettability as compared with Ni and is easily corroded by solder,
Occurrence of black spots can be suppressed and cracks can be prevented. Also,
Superiority is also recognized in reliability evaluation tests.

According to the manufacturing method of the present invention, Ti,
After sequentially depositing Ni, Cu having poor wettability is provided thicker by the resistance heating vapor deposition method, and Au is further vapor deposited to supply solder. Since the solder is supplied by points, unbalanced Au and intermetallic compounds of solder are generated in the peripheral portion. However, since the Cu layer that is easily corroded by the solder is formed under Au, the lateral spread can be prevented by corroding the surface of the Cu layer. Moreover, since the Cu layer is deposited by the resistance heating vapor deposition method, the layer thickness can be deposited to a desired thickness, so that the corrosion of the solder can be stopped only near the surface. As a result, since the Au-rich solder does not remain in the peripheral portion, cracks can be prevented and the yield is improved.

As a result, cracks can be prevented and the yield can be improved.

Further, since the Cu layer is deposited by the resistance heating vapor deposition method, the layer thickness can be deposited to a desired thickness, so that the corrosion of the solder can be stopped only near the surface. As a result, it is possible to secure the bonding strength with the solder and to obtain an MO that has excellent product quality.
A method for manufacturing an SFET can be provided.

Further, since Cu can be easily vapor-deposited to have a desired film thickness, the refractory metals Ti and Ni may be thin metal layers formed by an electron beam type vapor deposition apparatus, and there is an advantage that the cost can be reduced. .

[Brief description of drawings]

FIG. 1A is a top view, FIG. 1B is a cross-sectional view, and FIG. 1C is a cross-sectional view for explaining the present invention.

FIG. 2 is a cross-sectional view for explaining the present invention.

FIG. 3 is a cross-sectional view for explaining the present invention.

4A is a top view, FIG. 4B is a cross-sectional view, and FIG. 4C is a cross-sectional view for explaining a conventional technique.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Takashi Akiba             2-5-3 Keihan Hondori, Moriguchi City, Osaka Prefecture             Within Yo Denki Co., Ltd. (72) Inventor Kenichi Hosaka             2-5-3 Keihan Hondori, Moriguchi City, Osaka Prefecture             Within Yo Denki Co., Ltd. (72) Inventor Masaya Saito             2-5-3 Keihan Hondori, Moriguchi City, Osaka Prefecture             Within Yo Denki Co., Ltd. F-term (reference) 5F033 HH07 HH08 HH11 HH13 HH17                       HH18 PP19 QQ08 QQ14 QQ19                       QQ44 RR06 VV07                 5F044 EE06 EE11 EE21

Claims (12)

[Claims] 1. A surface electrode on a MOSFET, a first conductive metal layer deposited on the surface electrode and having good adhesion to the surface electrode, and a first conductive metal layer deposited on the first conductive metal layer. A second conductive metal layer that prevents erosion of the preform material; a third conductive metal layer that is deposited on the second conductive metal layer and that suppresses the spread of the preform material; MOSFET deposited on the third conductive metal layer of No. 3 and having good wettability with the preform material. 2. The MOSFET according to claim 1, wherein the third conductive metal layer has a lower wettability than the second conductive metal layer. 3. The third conductive metal layer is Cu or C
The MOSFE according to claim 1, wherein r is r.
T. 4. The MOSFET of claim 1, wherein the third conductive metal layer is deposited thicker than the second conductive metal layer. 5. A lead is formed by forming a conductive metal layer on a surface electrode of a MOSFET to improve adhesion between the surface electrode and the preform material, and applying the preform material on the conductive metal layer. A method for manufacturing a MOSFET having a step of fixing a metal, the method comprising the step of adding a metal layer for suppressing spread of a preform material to the conductive metal layer.
Method of manufacturing FET. 6. The MOSFET according to claim 5, wherein Cu or Cr is deposited by a resistance heating method as a metal layer for the purpose of suppressing the spread of the preform material.
Manufacturing method. 7. A step of depositing a first conductive metal layer having good adhesion with the surface electrode of a MOSFET, and corrosion of a preform material on the first conductive metal layer. A step of depositing a second conductive metal layer for preventing, a step of depositing a third conductive metal layer for suppressing the spread of the preform material on the second conductive metal layer, and the third step. Depositing a fourth conductive metal layer having good wettability with the preform material on the conductive metal layer, and applying a preform material on the fourth conductive metal layer,
And a step of fixing leads to the preform material. 8. A step of forming an actual operating region in which a large number of MOSFET cells are provided on a semiconductor substrate, and a surface electrode layer is deposited on the actual operating region and a SiN layer is deposited on a desired region on the surface electrode layer. A part of the SiN layer is removed to form an opening, the surface electrode layer is exposed through the opening to form a pad electrode, and the pad electrode is formed on the pad electrode by an electron impact heating vapor deposition method. Depositing a first conductive metal layer having good adhesion with the pad electrode, and a second conductive layer for preventing erosion of the preform material on the first conductive metal layer by electron impact heating vapor deposition. A conductive metal layer, depositing a third conductive metal layer on the second conductive metal layer that suppresses the spread of the preform material by a resistance heating method, and the third conductive layer The proof is formed on the metal layer by the resistance heating method. Depositing a fourth conductive metal layer Naru wettability good with over arm member, the preform material into the fourth conductive metal layer is applied,
And a step of fixing leads to the preform material. 9. A resist layer is formed on the SiN layer, the first to fourth conductive metal layers are deposited using the resist layer as a mask, and a desired shape is obtained by a lift-off method. The MOSF according to claim 8.
ET manufacturing method. 10. The MO according to claim 8, wherein the first to fourth conductive metal layers are deposited on the entire surface of the SiN layer and a desired shape is obtained by ion milling.
Manufacturing method of SFET. 11. The M according to claim 7, wherein a metal layer having a wettability lower than that of the second conductive metal layer is deposited as the third conductive metal layer.
Method of manufacturing OSFET. 12. The method of manufacturing a MOSFET according to claim 7, wherein Cu or Cr is deposited as the third conductive metal layer.