JPH05175408A - Material and method for mounting semiconductor element - Google Patents

Abstract

(57) [Abstract] The purpose of the present invention is to use a lead, which is coated with an insulating material and has a conductor exposed only at the tip surface, when the semiconductor element and the lead are bonded by plating. Provided is a uniform and stable method for mounting a semiconductor element in a multi-pin orientation, which enables efficient connection with a minimum plating area and prevents short-circuiting between leads and the edge of the semiconductor element by making contact. [Structure] A lead frame or a TAB tape is covered with an insulating material at the tip of a lead portion to form a cut end face where a lead conductor is exposed, or a resist film of the TAB tape is provided with a via hole and the end face portion of the via hole is cut. A mounting material that constitutes an exposed end surface of a lead conductor, wherein the lead end surface portion and an electrode of a semiconductor element are fixed in a state of being close to or in contact with each other, and the exposed lead portion and the electrode are connected by plating. It is a method of mounting a semiconductor element.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting material suitable for connecting a lead frame or TAB lead to an electrode on a semiconductor element by a plating method, and a semiconductor mounting method using this material. is there.

[0002]

2. Description of the Related Art When mounting a semiconductor element, electrodes on the semiconductor element and a lead frame or TAB (Tape Auto
mated Bonding) As a method of connecting with the lead of the tape, wire bonding for cross-linking the electrode and the lead by using a fine metal wire such as Au or Al, or a TAB tape for directly connecting the lead to the electrode bump provided on the element There are joining and face-down bonding. In the former method, a physical load due to thermocompression bonding or ultrasonic vibration at the tip of the capillary is applied when joining the thin metal wires,
Occasionally, these may affect the work or the characteristics of the semiconductor element, or the narrow spacing between the cross-linked thin wires may cause contact between the thin wires. However, there is a problem that it becomes difficult to meet the demand for a large number of pins. In the latter case, many bumps provided on the electrodes (or) leads are connected (compressed) together, but the bonding temperature is high and the same problem as above remains, and the connection is stable as the number of bumps increases. Then it becomes difficult to do. On the other hand, bumps are usually formed by a method such as plating high-purity Au on electrodes, and are subjected to heat treatment at about 250 to 300 ° C. in order to reduce hardness and improve pressure bonding with leads. Due to the diffusion of Au and the electrode (Al) into
There is a case where the Al interface is deteriorated, and in order to prevent this, a complicated means of interposing a diffusion preventing metal thin film such as TiW between both metals must be taken.

In order to solve the problems caused by using such a thin wire or applying heat, a method of joining the electrodes of the semiconductor element and the leads with a plating metal has recently been proposed. For example, Japanese Patent Publication No. 57-50056 discloses that
It is disclosed that an electrode formed on a semiconductor element and an end portion of a lead wiring are arranged close to each other and an electrode-lead gap is connected by a plating method. In addition, JP-A-2-66953
In the publication, a circuit board having a base electrode on the surface and a semiconductor element having a protruding electrode on the surface face downward, and a predetermined space is set between them to bond them with a resin layer. A mounting structure of a semiconductor element in which and are connected by a plating method is shown.

[0004]

The technique of joining the electrodes and leads of the semiconductor element with the plated metal as described above is already known, but in the conventional method of this kind, the electrodes and leads (or It is difficult to set all the gaps to the electrodes uniformly, and therefore, the plating metal to be bonded does not always adhere uniformly, and the plating time must be lengthened to compensate for the lacking portion. That is, a relatively large amount of plating adheres, which imposes a restriction on the allowable interval between adjacent leads, and is not suitable for mounting a semiconductor having a multi-pin structure. Even if the gap is set uniformly, the plated metal initially adheres to the surface of the electrode and the lead surface, respectively, and gradually develops and bonds (crosslinks) from both sides. Therefore, it takes a considerable time to fill this gap. In addition to the above, the amount of adhesion from each surface is not always constant, and the same problem as described above is included.

The present invention solves the above-mentioned problems of the prior art by using a lead which is covered with an insulating material and whose tip surface is exposed to a conductor when performing plating and joining. Provide a uniform and stable method for mounting semiconductor elements for multi-pins, which enables efficient connection with a minimum plating area and prevents short circuits between leads and semiconductor edges by directly contacting the electrodes with the electrodes. The purpose is to do.

[0006]

In order to achieve the above object, the present invention has the following structures. That is, (1) a semiconductor having a plating connection portion on an end face, characterized in that a lead frame or a lead portion of a TAB tape is covered with an insulating material, and a cut cross-section exposing the lead conductor is formed at the tip of the lead portion. Material for mounting element, and (2)
The resist film of the TAB tape is provided with a via hole at a position corresponding to a position to be bonded to an electrode on a semiconductor element, and an end face part of the via hole is cut to form an exposed end face of a lead conductor. It is a material for mounting a semiconductor element having a connecting part, and (3) after covering the lead part of the lead frame or the TAB tape with an insulating material,
The tip portion is cut to expose the lead conductor on the cut end surface, the lead exposed portion and the electrode of the semiconductor element are fixed in a state of being close to or in contact with each other, and the lead exposed portion and the electrode are connected by plating. A method of mounting a semiconductor element, characterized in that As a result, the TAB tape or the lead of the lead frame and the electrode of the semiconductor element are plated and joined to each other on the end face and the electrode face, and the plated metal is not excessively adhered, and the connection can be made efficiently in a short time.

The present invention will be described in detail below. The lead of the present invention is a lead such as a TAB tape or a lead frame which is brought into direct contact with a semiconductor electrode. The peripheral surface is covered with a film, but the lead conductor is exposed at the tip end surface.
FIG. 1 is a schematic view showing an example of manufacturing a lead for the TAB tape of the present invention. The lead portion 1 is coated on its entire surface with an insulating paint, a film, an insulating inorganic substance or the like 2 as shown in FIG. (Hereinafter, referred to as insulating coating) is applied, and the tip portion 3 of the insulating coating lead 1 is cut as shown in FIG. 2B, and the lead conductor 1 is exposed at the cut end surface 4. Further, as shown in FIG. 3C, the coating 2 on the cut lead end portion 3 in FIG. 2B may be removed with a solvent or the like, or the lead portion 3 may be exposed without coating the lead portion 3. good.

The lead of the TAB tape thus formed has its tip positioned at the position of the electrode 6 provided on the semiconductor element 5, and comes close to or in contact with the surface of the electrode 6 and the jig 11 as shown in FIG. Then, the exposed conductor of the lead end face 4 and the electrode surface are connected to the plating metal 7 by immersing in the plating bath in this state or placing it in a jet plating solution in this state.

FIG. 3 is a schematic view showing another example of manufacturing the lead of the present invention for the TAB tape. In FIG. 3A, the lead 1 is arranged on an organic resist film 8 of polyimide or the like, and The film 8 in the tip portion 3 is removed to form a via hole 9, and the surface of the lead 1 is exposed 10 in the hole. Then, as shown in FIG. 2B, the lead 1 is cut along the end portion 3 of the hole 1 to the end surface portion of the hole 9 to expose the lead end surface 4 and the lead surface 10 in the via hole. Thereafter, the exposed lead tip 3 is placed at a position on the semiconductor element electrode 6, and is brought into close proximity to or in contact with the surface of the electrode 6 and fixed using the jig 11 shown in FIG. 5 as in the case of FIG. As shown in FIG. 4, the plating metal 7 is attached to the exposed conductor of the lead end face 4 and the electrode surface to connect them by immersing them in a plating bath or placing them in a jet plating solution. At this time, the lead 1 and the semiconductor element 5 are close to each other, but since the insulating film 8 to which the lead 1 is attached is interposed between them, a short circuit does not occur even if they come into contact with each other. The exposed surface other than the tip portions (4, 10) of the leads is provided with an oxide film or a plating resist coating.

The formation of the lead end surface of the present invention is preferably performed by cutting, but the invention is not necessarily limited to this, and the insulator may be removed with, for example, a solvent. Further, even if bumps are provided on the electrodes, no particular trouble will occur.

The metal to be joined by plating may be the same material as the lead or another conductive material, such as Cu, Ni, Au, Sn and alloys or solders thereof, and the amount of such an adhesion amount that gives a predetermined joining strength. And

[0012]

[Embodiment 1] FIG. 2 shows a state in which the tip of the inner lead of the TAB tape and the electrode of the semiconductor chip are connected by plating. In the TAB tape, a copper wire is provided on a sheet of resin such as polyimide. A plated joint is formed between the lead tip and the electrode, and both are electrically connected.

A method of connecting the inner leads of the TAB tape to the electrodes of the semiconductor chip by copper plating in the above semiconductor device will be described.

As the TAB tape, a two-layer TAB having a lead width of 70 μm, a lead thickness of 35 μm, a pitch of 140 μm and 200 leads was used. Semiconductor chips
200 electrodes of 80 μm × 80 μm are arranged on a 8.0 mm × 8.0 mm chip, and the lower electrode structure is A.
l was 1 μm, the intermediate TiW alloy layer was 2000 angstroms, and the upper layer was 3000 angstroms gold by sputtering.

First, the copper lead portion of the TAB tape is coated with an insulating coating for several μm [FIG. 1 (a)]. The coating material is, for example, an oil-based paint, but any material may be used as long as the insulation is maintained in the plating solution. Whether the tip of the inner lead is cut [Fig. 1 (b)] after coating with the insulating paint, or the coating of the tip portion is removed by about 100 to 200 µm from the tip with an organic solvent or the like.
Alternatively, the tip of the inner lead should be approx.
The insulating metal coating is applied to the remaining portions [FIG. 1 (c)] to expose the copper metal portion only at the tips of the inner leads.
Then, the lead tips of the TAB tape and the electrodes of the semiconductor chip are arranged so as to be close to or in contact with each other,
Fix as shown in FIG.

Next, connection plating between the lead tips and the electrodes of the semiconductor chip is performed. The plating is CuSO ₄ (0.
8 mol / l) and an aqueous solution of H ₂ SO ₄ (0.5 mol / l) were used, the plating current density was 100 A / m ² , and the plating time was 30 to 50 minutes. After plating and joining, the plate was washed with water to remove the attached plating solution, and the insulating coating during plating was removed with an organic solvent or the like.

The bonding strength was measured by pulling the lead at a position 200 μm away from the bonded portion and measuring the load at the time of breaking (pull test). The average pull strength is 40g (35 min minimum)
g, a maximum of 46 g), and it was confirmed that they were all electrically connected.

[0018]

As described above, according to the present invention, the lead conductor is exposed only at the tip of the lead, the tip is brought into contact with the electrode, and the plating is performed. It is possible to provide a highly reliable semiconductor device for multi-pins, which can prevent the contact between the leads and the edge short-circuit of the semiconductor element while achieving excellent plating.

[Brief description of drawings]

1A, 1B, and 1C are schematic views showing an example of molding a lead of the present invention.

FIG. 2 is a schematic view showing an example of a semiconductor element mounting method of the present invention using the leads of FIG.

3A and 3B are schematic views showing an example of another case of molding the lead of the present invention.

FIG. 4 is a schematic view showing an example of a semiconductor element mounting method of the present invention using the leads of FIG.

FIG. 5 is a schematic view showing a jig used for plating and bonding of the present invention.

[Explanation of symbols]

 1: Lead 2: Insulating film 3: Lead tip part 4: Lead end face 5: Semiconductor element 6: Electrode 7: Plating metal 8: Insulating film 9: Via hole 10: Lead exposed surface 11: Jig

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[Procedure amendment]

[Submission date] January 26, 1993

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Correction target item name] All drawings

[Correction method] Change

[Correction content]

[Fig. 2]

[Figure 3]

[Figure 4]

[Figure 1]

[Figure 5]

 ─────────────────────────────────────────────────── --- Continuation of the front page (72) Inventor Yasuhide Ono 1618 Ida, Nakahara-ku, Kawasaki-shi, Kanagawa Inside Nippon Steel Corporation Advanced Technology Research Center (72) Takao Fujitsu Toshiba, Komukai Toshiba, Kawasaki-shi, Kanagawa Town No. 1 Incorporation company Toshiba Tamagawa Factory (72) Inventor Yoshimasa Kudo Komukai-ku, Kawasaki City, Kanagawa Prefecture Komukai Toshiba Town No. 1 Incorporation company Toshiba Tamagawa Factory (72) Inventor Shinya Shimizu Sachi-ku Kawasaki, Kanagawa Prefecture Komukai Toshiba Town No. 1 Inside the Tama River Factory of Toshiba Corporation

Claims (3)

[Claims] 1. A semiconductor having a plated connection portion on an end face, characterized in that the lead portion of a lead frame or a TAB tape is covered with an insulating material, and a cutting cross section is formed at the tip of the lead portion to expose a lead conductor. Material for mounting elements. 2. A resist film of a TAB tape is provided with a via hole at a portion corresponding to a position to be bonded to an electrode on a semiconductor element, and an end face portion of the via hole is cut to form an exposed end face of a lead conductor. A mounting material for a semiconductor element having a plated connection portion on its end face. 3. A lead frame or a lead portion of a TAB tape is covered with an insulating material, and then a tip end portion thereof is cut to expose a lead conductor on the end face, and the lead exposed portion and an electrode of a semiconductor element are brought close to each other. Alternatively, the semiconductor element mounting method is characterized in that the leads are fixed in contact with each other and the lead exposed portions and the electrodes are connected by plating.