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GB2400731B - Substrates having buried silicon germanium layers therein and methods of forming same - Google Patents

Substrates having buried silicon germanium layers therein and methods of forming same

Info

Publication number
GB2400731B
GB2400731B GB0415353A GB0415353A GB2400731B GB 2400731 B GB2400731 B GB 2400731B GB 0415353 A GB0415353 A GB 0415353A GB 0415353 A GB0415353 A GB 0415353A GB 2400731 B GB2400731 B GB 2400731B
Authority
GB
United Kingdom
Prior art keywords
substrates
methods
silicon germanium
forming same
buried silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0415353A
Other versions
GB2400731A (en
GB0415353D0 (en
Inventor
Geum-Jong Bae
Tae-Hee Choe
Sang-Su Kim
Hwa-Sung Rhee
Nae-In Lee
Kyung-Wook Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/711,706 external-priority patent/US6633066B1/en
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB0415353D0 publication Critical patent/GB0415353D0/en
Publication of GB2400731A publication Critical patent/GB2400731A/en
Application granted granted Critical
Publication of GB2400731B publication Critical patent/GB2400731B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H10P10/00—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/051—Manufacture or treatment of FETs having PN junction gates
    • H10D30/0516—Manufacture or treatment of FETs having PN junction gates of FETs having PN heterojunction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6708—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6748—Group IV materials, e.g. germanium or silicon carbide having a multilayer structure or superlattice structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/801—FETs having heterojunction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H10P90/1904—
    • H10P90/1916—
    • H10P90/1922—
    • H10P90/1924—
    • H10W10/181—
GB0415353A 2000-01-07 2001-01-04 Substrates having buried silicon germanium layers therein and methods of forming same Expired - Fee Related GB2400731B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20000000670 2000-01-07
US09/711,706 US6633066B1 (en) 2000-01-07 2000-11-13 CMOS integrated circuit devices and substrates having unstrained silicon active layers
KR10-2000-0075482A KR100429869B1 (en) 2000-01-07 2000-12-12 CMOS Integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0100209A GB2365214B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same

Publications (3)

Publication Number Publication Date
GB0415353D0 GB0415353D0 (en) 2004-08-11
GB2400731A GB2400731A (en) 2004-10-20
GB2400731B true GB2400731B (en) 2004-12-08

Family

ID=27350133

Family Applications (4)

Application Number Title Priority Date Filing Date
GB0100209A Expired - Fee Related GB2365214B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0415350A Expired - Fee Related GB2400729B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0415351A Expired - Fee Related GB2400730B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0415353A Expired - Fee Related GB2400731B (en) 2000-01-07 2001-01-04 Substrates having buried silicon germanium layers therein and methods of forming same

Family Applications Before (3)

Application Number Title Priority Date Filing Date
GB0100209A Expired - Fee Related GB2365214B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0415350A Expired - Fee Related GB2400729B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0415351A Expired - Fee Related GB2400730B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same

Country Status (5)

Country Link
JP (1) JP4549542B2 (en)
KR (1) KR100429869B1 (en)
CN (1) CN1165085C (en)
DE (1) DE10100194A1 (en)
GB (4) GB2365214B (en)

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US6410371B1 (en) * 2001-02-26 2002-06-25 Advanced Micro Devices, Inc. Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer
US7157119B2 (en) * 2002-06-25 2007-01-02 Ppg Industries Ohio, Inc. Method and compositions for applying multiple overlying organic pigmented decorations on ceramic substrates
FR2842349B1 (en) * 2002-07-09 2005-02-18 TRANSFERRING A THIN LAYER FROM A PLATE COMPRISING A BUFFER LAYER
US6953736B2 (en) 2002-07-09 2005-10-11 S.O.I.Tec Silicon On Insulator Technologies S.A. Process for transferring a layer of strained semiconductor material
FR2842350B1 (en) * 2002-07-09 2005-05-13 METHOD FOR TRANSFERRING A LAYER OF CONCEALED SEMICONDUCTOR MATERIAL
US7018910B2 (en) 2002-07-09 2006-03-28 S.O.I.Tec Silicon On Insulator Technologies S.A. Transfer of a thin layer from a wafer comprising a buffer layer
DE10231964A1 (en) * 2002-07-15 2004-02-19 Infineon Technologies Ag Semiconductor component with stress-absorbing semiconductor layer and associated manufacturing process
DE10260860B4 (en) * 2002-12-23 2008-07-10 Robert Bosch Gmbh Layer of Si1-xGex, process for their preparation and micromechanical device with it
FR2851847B1 (en) * 2003-02-28 2005-10-14 Soitec Silicon On Insulator RELAXATION OF A THIN LAYER AFTER TRANSFER
FR2851848B1 (en) * 2003-02-28 2005-07-08 Soitec Silicon On Insulator RELAXATION AT HIGH TEMPERATURE OF A THIN LAYER AFTER TRANSFER
US7348260B2 (en) 2003-02-28 2008-03-25 S.O.I.Tec Silicon On Insulator Technologies Method for forming a relaxed or pseudo-relaxed useful layer on a substrate
US7018909B2 (en) 2003-02-28 2006-03-28 S.O.I.Tec Silicon On Insulator Technologies S.A. Forming structures that include a relaxed or pseudo-relaxed layer on a substrate
US6963078B2 (en) * 2003-03-15 2005-11-08 International Business Machines Corporation Dual strain-state SiGe layers for microelectronics
US7084460B2 (en) * 2003-11-03 2006-08-01 International Business Machines Corporation Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates
US7579636B2 (en) 2004-01-08 2009-08-25 Nec Corporation MIS-type field-effect transistor
JP4892976B2 (en) * 2004-01-08 2012-03-07 日本電気株式会社 MIS field effect transistor
US20050280081A1 (en) * 2004-06-16 2005-12-22 Massachusetts Institute Of Technology Semiconductor devices having bonded interfaces and methods for making the same
US7115955B2 (en) * 2004-07-30 2006-10-03 International Business Machines Corporation Semiconductor device having a strained raised source/drain
US8063397B2 (en) 2006-06-28 2011-11-22 Massachusetts Institute Of Technology Semiconductor light-emitting structure and graded-composition substrate providing yellow-green light emission
US7863653B2 (en) 2006-11-20 2011-01-04 International Business Machines Corporation Method of enhancing hole mobility
JP5152827B2 (en) * 2007-03-22 2013-02-27 株式会社日立製作所 THIN FILM TRANSISTOR AND ORGANIC EL DISPLAY DEVICE USING THE SAME
US8138579B2 (en) 2007-06-29 2012-03-20 International Business Machines Corporation Structures and methods of forming SiGe and SiGeC buried layer for SOI/SiGe technology
US7989306B2 (en) 2007-06-29 2011-08-02 International Business Machines Corporation Method of forming alternating regions of Si and SiGe or SiGeC on a buried oxide layer on a substrate
US8049253B2 (en) 2007-07-11 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
GB2467935B (en) 2009-02-19 2013-10-30 Iqe Silicon Compounds Ltd Formation of thin layers of GaAs and germanium materials
FR2957456B1 (en) 2010-03-10 2013-01-04 Commissariat Energie Atomique METHOD FOR MANUFACTURING A SUBSTRATE COMPRISING A SLIMMING STEP WITH DETECTION STOP OF A POROUS AREA
CN101924138B (en) * 2010-06-25 2013-02-06 中国科学院上海微系统与信息技术研究所 MOS (Metal Oxide Semiconductor) device structure for preventing floating-body effect and self-heating effect and preparation method thereof
CN101916770B (en) * 2010-07-13 2012-01-18 清华大学 Si-Ge-Si semiconductor structure with double graded junctions and forming method thereof
KR101657872B1 (en) * 2014-12-23 2016-09-19 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 Improved transistor channel
FR3064398B1 (en) * 2017-03-21 2019-06-07 Soitec SEMICONDUCTOR TYPE STRUCTURE ON INSULATION, ESPECIALLY FOR A FRONT-SIDE TYPE IMAGE SENSOR, AND METHOD FOR MANUFACTURING SUCH STRUCTURE
CN111952186B (en) * 2020-08-21 2024-07-19 中国科学院上海微系统与信息技术研究所 Field effect transistor based on cavity surrounding structure and preparation method
CN113871451B (en) * 2021-09-24 2024-06-18 华虹半导体(无锡)有限公司 DMOS device and method for forming the same

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US5185280A (en) * 1991-01-29 1993-02-09 Texas Instruments Incorporated Method of fabricating a soi transistor with pocket implant and body-to-source (bts) contact
FR2681472B1 (en) * 1991-09-18 1993-10-29 Commissariat Energie Atomique PROCESS FOR PRODUCING THIN FILMS OF SEMICONDUCTOR MATERIAL.
JP3221901B2 (en) * 1992-01-06 2001-10-22 株式会社東芝 Semiconductor device
JP3214631B2 (en) * 1992-01-31 2001-10-02 キヤノン株式会社 Semiconductor substrate and method of manufacturing the same
JP2908150B2 (en) * 1992-11-27 1999-06-21 日本電気株式会社 SOI substrate structure and manufacturing method thereof
JP3361922B2 (en) * 1994-09-13 2003-01-07 株式会社東芝 Semiconductor device
WO1997023000A1 (en) * 1995-12-15 1997-06-26 Philips Electronics N.V. SEMICONDUCTOR FIELD EFFECT DEVICE COMPRISING A SiGe LAYER
JP3376211B2 (en) * 1996-05-29 2003-02-10 株式会社東芝 Semiconductor device, method of manufacturing semiconductor substrate, and method of manufacturing semiconductor device
DE59707274D1 (en) * 1996-09-27 2002-06-20 Infineon Technologies Ag Integrated CMOS circuit arrangement and method for its production
US5906951A (en) * 1997-04-30 1999-05-25 International Business Machines Corporation Strained Si/SiGe layers on insulator
DE19720008A1 (en) * 1997-05-13 1998-11-19 Siemens Ag Integrated CMOS circuit arrangement and method for its production
JP3607194B2 (en) * 1999-11-26 2005-01-05 株式会社東芝 Semiconductor device, semiconductor device manufacturing method, and semiconductor substrate
JP4226175B2 (en) * 1999-12-10 2009-02-18 富士通株式会社 Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
CN1165085C (en) 2004-09-01
GB2400729A (en) 2004-10-20
JP4549542B2 (en) 2010-09-22
CN1322016A (en) 2001-11-14
KR20010070298A (en) 2001-07-25
GB2365214A (en) 2002-02-13
DE10100194A1 (en) 2001-07-19
GB2365214B (en) 2004-09-15
GB0415351D0 (en) 2004-08-11
GB0100209D0 (en) 2001-02-14
GB2400729B (en) 2004-12-08
GB2400731A (en) 2004-10-20
JP2001217433A (en) 2001-08-10
GB0415350D0 (en) 2004-08-11
KR100429869B1 (en) 2004-05-03
GB0415353D0 (en) 2004-08-11
GB2400730B (en) 2004-12-08
GB2400730A (en) 2004-10-20

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20110104