[go: up one dir, main page]

DE60308183D1 - Pufferanordnung für speicher - Google Patents

Pufferanordnung für speicher

Info

Publication number
DE60308183D1
DE60308183D1 DE60308183T DE60308183T DE60308183D1 DE 60308183 D1 DE60308183 D1 DE 60308183D1 DE 60308183 T DE60308183 T DE 60308183T DE 60308183 T DE60308183 T DE 60308183T DE 60308183 D1 DE60308183 D1 DE 60308183D1
Authority
DE
Germany
Prior art keywords
memory
devices
buffer
buffer arrangement
memory buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60308183T
Other languages
English (en)
Other versions
DE60308183T2 (de
Inventor
Narendra Khandekar
James Dodd
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE60308183D1 publication Critical patent/DE60308183D1/de
Application granted granted Critical
Publication of DE60308183T2 publication Critical patent/DE60308183T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Memory System (AREA)
  • Dram (AREA)
  • Vehicle Body Suspensions (AREA)
  • Non-Volatile Memory (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Information Transfer Systems (AREA)
  • Read Only Memory (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE60308183T 2002-06-27 2003-05-22 Pufferanordnung für speicher Expired - Lifetime DE60308183T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/186,357 US6639820B1 (en) 2002-06-27 2002-06-27 Memory buffer arrangement
US186357 2002-06-27
PCT/US2003/017618 WO2004003916A1 (en) 2002-06-27 2003-05-22 Memory buffer arrangement

Publications (2)

Publication Number Publication Date
DE60308183D1 true DE60308183D1 (de) 2006-10-19
DE60308183T2 DE60308183T2 (de) 2007-08-23

Family

ID=29250181

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60308183T Expired - Lifetime DE60308183T2 (de) 2002-06-27 2003-05-22 Pufferanordnung für speicher

Country Status (9)

Country Link
US (1) US6639820B1 (de)
EP (1) EP1516339B1 (de)
KR (1) KR100647162B1 (de)
CN (1) CN1679108B (de)
AT (1) ATE339006T1 (de)
AU (1) AU2003240534A1 (de)
DE (1) DE60308183T2 (de)
TW (1) TWI290322B (de)
WO (1) WO2004003916A1 (de)

Families Citing this family (62)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050010737A1 (en) * 2000-01-05 2005-01-13 Fred Ware Configurable width buffered module having splitter elements
US7404032B2 (en) 2000-01-05 2008-07-22 Rambus Inc. Configurable width buffered module having switch elements
US7266634B2 (en) 2000-01-05 2007-09-04 Rambus Inc. Configurable width buffered module having flyby elements
US7363422B2 (en) 2000-01-05 2008-04-22 Rambus Inc. Configurable width buffered module
US7356639B2 (en) * 2000-01-05 2008-04-08 Rambus Inc. Configurable width buffered module having a bypass circuit
US7120765B2 (en) * 2002-10-30 2006-10-10 Intel Corporation Memory transaction ordering
US8250295B2 (en) 2004-01-05 2012-08-21 Smart Modular Technologies, Inc. Multi-rank memory module that emulates a memory module having a different number of ranks
DE102004004026A1 (de) * 2004-01-27 2005-08-18 Infineon Technologies Ag Schaltungsanordnung zur Datenspeicherung
US20060129712A1 (en) * 2004-12-10 2006-06-15 Siva Raghuram Buffer chip for a multi-rank dual inline memory module (DIMM)
US9171585B2 (en) 2005-06-24 2015-10-27 Google Inc. Configurable memory circuit system and method
US8090897B2 (en) 2006-07-31 2012-01-03 Google Inc. System and method for simulating an aspect of a memory circuit
US10013371B2 (en) 2005-06-24 2018-07-03 Google Llc Configurable memory circuit system and method
US8077535B2 (en) 2006-07-31 2011-12-13 Google Inc. Memory refresh apparatus and method
DE112006001810T5 (de) 2005-06-24 2008-08-21 Metaram Inc., San Jose Integrierte Speicherkern - und Speicherschnittstellenschaltung
US9542352B2 (en) 2006-02-09 2017-01-10 Google Inc. System and method for reducing command scheduling constraints of memory circuits
US8438328B2 (en) 2008-02-21 2013-05-07 Google Inc. Emulation of abstracted DIMMs using abstracted DRAMs
US20080082763A1 (en) 2006-10-02 2008-04-03 Metaram, Inc. Apparatus and method for power management of memory circuits by a system or component thereof
US8089795B2 (en) 2006-02-09 2012-01-03 Google Inc. Memory module with memory stack and interface with enhanced capabilities
US7392338B2 (en) 2006-07-31 2008-06-24 Metaram, Inc. Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits
US8359187B2 (en) 2005-06-24 2013-01-22 Google Inc. Simulating a different number of memory circuit devices
US7386656B2 (en) 2006-07-31 2008-06-10 Metaram, Inc. Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
US7590796B2 (en) * 2006-07-31 2009-09-15 Metaram, Inc. System and method for power management in memory systems
US8130560B1 (en) 2006-11-13 2012-03-06 Google Inc. Multi-rank partial width memory modules
US8335894B1 (en) 2008-07-25 2012-12-18 Google Inc. Configurable memory system with interface circuit
US9507739B2 (en) 2005-06-24 2016-11-29 Google Inc. Configurable memory circuit system and method
US8796830B1 (en) 2006-09-01 2014-08-05 Google Inc. Stackable low-profile lead frame package
US7580312B2 (en) 2006-07-31 2009-08-25 Metaram, Inc. Power saving system and method for use with a plurality of memory circuits
US8081474B1 (en) 2007-12-18 2011-12-20 Google Inc. Embossed heat spreader
US8111566B1 (en) 2007-11-16 2012-02-07 Google, Inc. Optimal channel design for memory devices for providing a high-speed memory interface
US7472220B2 (en) 2006-07-31 2008-12-30 Metaram, Inc. Interface circuit system and method for performing power management operations utilizing power management signals
US8386722B1 (en) 2008-06-23 2013-02-26 Google Inc. Stacked DIMM memory interface
US20060294295A1 (en) * 2005-06-24 2006-12-28 Yukio Fukuzo DRAM chip device well-communicated with flash memory chip and multi-chip package comprising such a device
US8244971B2 (en) 2006-07-31 2012-08-14 Google Inc. Memory circuit system and method
US8397013B1 (en) 2006-10-05 2013-03-12 Google Inc. Hybrid memory module
US20080028136A1 (en) 2006-07-31 2008-01-31 Schakel Keith R Method and apparatus for refresh management of memory modules
US8060774B2 (en) 2005-06-24 2011-11-15 Google Inc. Memory systems and memory modules
US8055833B2 (en) 2006-10-05 2011-11-08 Google Inc. System and method for increasing capacity, performance, and flexibility of flash storage
US8327104B2 (en) 2006-07-31 2012-12-04 Google Inc. Adjusting the timing of signals associated with a memory system
US7609567B2 (en) 2005-06-24 2009-10-27 Metaram, Inc. System and method for simulating an aspect of a memory circuit
US8041881B2 (en) 2006-07-31 2011-10-18 Google Inc. Memory device with emulated characteristics
US7379316B2 (en) 2005-09-02 2008-05-27 Metaram, Inc. Methods and apparatus of stacking DRAMs
US7966446B2 (en) * 2005-09-12 2011-06-21 Samsung Electronics Co., Ltd. Memory system and method having point-to-point link
US7930492B2 (en) * 2005-09-12 2011-04-19 Samsung Electronics Co., Ltd. Memory system having low power consumption
KR100871835B1 (ko) * 2007-01-05 2008-12-03 삼성전자주식회사 메모리 시스템 및 메모리 시스템의 신호전송 방법
US7464225B2 (en) 2005-09-26 2008-12-09 Rambus Inc. Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology
US11328764B2 (en) 2005-09-26 2022-05-10 Rambus Inc. Memory system topologies including a memory die stack
US7562271B2 (en) 2005-09-26 2009-07-14 Rambus Inc. Memory system topologies including a buffer device and an integrated circuit memory device
US9632929B2 (en) 2006-02-09 2017-04-25 Google Inc. Translating an address associated with a command communicated between a system and memory circuits
US20070290333A1 (en) * 2006-06-16 2007-12-20 Intel Corporation Chip stack with a higher power chip on the outside of the stack
US7724589B2 (en) 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
KR100810613B1 (ko) * 2006-08-04 2008-03-07 삼성전자주식회사 개별소자들의 개선된 배치 구조를 갖는 메모리 모듈
US7761624B2 (en) * 2006-09-28 2010-07-20 Virident Systems, Inc. Systems and apparatus for main memory with non-volatile type memory modules, and related technologies
DE102006051514B4 (de) * 2006-10-31 2010-01-21 Qimonda Ag Speichermodul und Verfahren zum Betreiben eines Speichermoduls
US20080123305A1 (en) * 2006-11-28 2008-05-29 Smart Modular Technologies, Inc. Multi-channel memory modules for computing devices
US8209479B2 (en) 2007-07-18 2012-06-26 Google Inc. Memory circuit system and method
US8080874B1 (en) 2007-09-14 2011-12-20 Google Inc. Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
US8001434B1 (en) 2008-04-14 2011-08-16 Netlist, Inc. Memory board with self-testing capability
DE202010017690U1 (de) 2009-06-09 2012-05-29 Google, Inc. Programmierung von Dimm-Abschlusswiderstandswerten
CN105612580B (zh) * 2013-11-11 2019-06-21 拉姆伯斯公司 使用标准控制器部件的大容量存储系统
KR102094393B1 (ko) 2013-11-18 2020-03-27 삼성전자주식회사 불휘발성 메모리 시스템 및 그것의 동작 방법
WO2020036878A1 (en) * 2018-08-14 2020-02-20 Rambus Inc. Packaged integrated device
US12073108B2 (en) 2021-09-01 2024-08-27 Micron Technology, Inc. Memory placement in a computing system

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62104149A (ja) * 1985-10-30 1987-05-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 集積回路チツプ・モジユ−ル
AU628547B2 (en) * 1989-05-19 1992-09-17 Compaq Computer Corporation Modular computer memory circuit board
US5272664A (en) * 1993-04-21 1993-12-21 Silicon Graphics, Inc. High memory capacity DRAM SIMM
US5434745A (en) * 1994-07-26 1995-07-18 White Microelectronics Div. Of Bowmar Instrument Corp. Stacked silicon die carrier assembly
EP1036362B1 (de) * 1997-12-05 2006-11-15 Intel Corporation Speichersystem mit speichermodul mit einem speichermodul-steuerbaustein
US6487102B1 (en) * 2000-09-18 2002-11-26 Intel Corporation Memory module having buffer for isolating stacked memory devices
US6317352B1 (en) * 2000-09-18 2001-11-13 Intel Corporation Apparatus for implementing a buffered daisy chain connection between a memory controller and memory modules
US6493250B2 (en) 2000-12-28 2002-12-10 Intel Corporation Multi-tier point-to-point buffered memory interface
US6542393B1 (en) * 2002-04-24 2003-04-01 Ma Laboratories, Inc. Dual-bank memory module with stacked DRAM chips having a concave-shaped re-route PCB in-between

Also Published As

Publication number Publication date
DE60308183T2 (de) 2007-08-23
KR20050012832A (ko) 2005-02-02
KR100647162B1 (ko) 2006-11-23
CN1679108B (zh) 2011-08-17
EP1516339A1 (de) 2005-03-23
WO2004003916A1 (en) 2004-01-08
CN1679108A (zh) 2005-10-05
TWI290322B (en) 2007-11-21
US6639820B1 (en) 2003-10-28
TW200407904A (en) 2004-05-16
ATE339006T1 (de) 2006-09-15
AU2003240534A1 (en) 2004-01-19
EP1516339B1 (de) 2006-09-06

Similar Documents

Publication Publication Date Title
DE60308183D1 (de) Pufferanordnung für speicher
TW200741461A (en) Memory interface to bridge memory buses
TW200723788A (en) Single chip multimode baseband processing circuitry with a shared radio interface
WO2010080444A3 (en) Methods and systems for power consumption management of a pattern-recognition processor
TW200608197A (en) Dynamic command and/ or address mirroring system and method for memory modules
DE602004007402D1 (de) Effiziente verbindung zwischen modulen wechselbarer elektronischer schaltungskarten
DE60316190D1 (de) Speichersystem mit speichermodulen und mehrerer speicherbänke
TW200632930A (en) Memory module and signal line arrangement method thereof
WO2010025205A3 (en) Method and apparatus to combine power and control signals in a mobile computing device
TW200710864A (en) Semiconductor device
TW200713474A (en) Relay board and semiconductor device having the relay board
MY122947A (en) Variable voltage source for a flash device operating from a power-supply-in-package (psip)
TW200712841A (en) Processor configuration architecture of multi-processor system
TW200711050A (en) Electronic device including gate lines, bit lines, or a combination thereof
GB2441083A (en) Identical chips with different operations in a system
TW200801977A (en) Processor
TW200638313A (en) Semiconductor circuit, driving circuit of electro-optical device, and electronic apparatus
TW200731066A (en) Memory systems with memory chips down and up
TW200745874A (en) Computer and main circuit board thereof
TW200519964A (en) Memory system mounted directly on board and associated method
TW200634832A (en) Memory module routing
TW200644590A (en) Boot systems and methods and related devices
TW200639875A (en) Configuration of memory device
TW200741480A (en) Processor architecture
TW200729230A (en) Memory module and register with minimized routing path

Legal Events

Date Code Title Description
8364 No opposition during term of opposition