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DE112007002700A5 - Schaltungsanordnung, umfassend ein Speicherzellenfeld, und Verfahren zu deren Betrieb - Google Patents

Schaltungsanordnung, umfassend ein Speicherzellenfeld, und Verfahren zu deren Betrieb Download PDF

Info

Publication number
DE112007002700A5
DE112007002700A5 DE112007002700T DE112007002700T DE112007002700A5 DE 112007002700 A5 DE112007002700 A5 DE 112007002700A5 DE 112007002700 T DE112007002700 T DE 112007002700T DE 112007002700 T DE112007002700 T DE 112007002700T DE 112007002700 A5 DE112007002700 A5 DE 112007002700A5
Authority
DE
Germany
Prior art keywords
memory cell
cell array
circuit arrangement
arrangement
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE112007002700T
Other languages
English (en)
Other versions
DE112007002700B4 (de
Inventor
Peter Bösmüller
Johannes Fellner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams Osram AG
Original Assignee
Austriamicrosystems AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Austriamicrosystems AG filed Critical Austriamicrosystems AG
Publication of DE112007002700A5 publication Critical patent/DE112007002700A5/de
Application granted granted Critical
Publication of DE112007002700B4 publication Critical patent/DE112007002700B4/de
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
DE112007002700.2T 2006-11-15 2007-11-14 Schaltungsanordnung, umfassend ein Speicherzellenfeld, und Verfahren zu deren Betrieb Expired - Fee Related DE112007002700B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102006053902.8 2006-11-15
DE102006053902A DE102006053902A1 (de) 2006-11-15 2006-11-15 Schaltungsanordnung, umfassend ein Speicherzellenfeld, und Verfahren zu deren Betrieb
PCT/EP2007/062348 WO2008059001A2 (de) 2006-11-15 2007-11-14 Schaltungsanordnung, umfassend ein speicherzellenfeld, und verfahren zu deren betrieb

Publications (2)

Publication Number Publication Date
DE112007002700A5 true DE112007002700A5 (de) 2009-10-22
DE112007002700B4 DE112007002700B4 (de) 2014-11-06

Family

ID=39311161

Family Applications (2)

Application Number Title Priority Date Filing Date
DE102006053902A Withdrawn DE102006053902A1 (de) 2006-11-15 2006-11-15 Schaltungsanordnung, umfassend ein Speicherzellenfeld, und Verfahren zu deren Betrieb
DE112007002700.2T Expired - Fee Related DE112007002700B4 (de) 2006-11-15 2007-11-14 Schaltungsanordnung, umfassend ein Speicherzellenfeld, und Verfahren zu deren Betrieb

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE102006053902A Withdrawn DE102006053902A1 (de) 2006-11-15 2006-11-15 Schaltungsanordnung, umfassend ein Speicherzellenfeld, und Verfahren zu deren Betrieb

Country Status (3)

Country Link
US (1) US8270192B2 (de)
DE (2) DE102006053902A1 (de)
WO (1) WO2008059001A2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5462453B2 (ja) * 2008-06-19 2014-04-02 富士通セミコンダクター株式会社 半導体装置
JP5559935B2 (ja) * 2011-04-13 2014-07-23 ルネサスエレクトロニクス株式会社 フューズ素子を備える半導体装置
JP6103815B2 (ja) * 2012-04-13 2017-03-29 ラピスセミコンダクタ株式会社 不揮発性メモリ回路、及び半導体装置
WO2016068911A1 (en) * 2014-10-29 2016-05-06 Hewlett Packard Enterprise Development Lp Resistive memory device

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5384746A (en) * 1994-01-28 1995-01-24 Texas Instruments Incorporated Circuit and method for storing and retrieving data
US6141247A (en) 1997-10-24 2000-10-31 Micron Technology, Inc. Non-volatile data storage unit and method of controlling same
DE19929121B4 (de) * 1998-06-30 2013-02-28 Fujitsu Semiconductor Ltd. Integrierte Halbleiterschaltung
US6462985B2 (en) * 1999-12-10 2002-10-08 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory for storing initially-setting data
US6208549B1 (en) 2000-02-24 2001-03-27 Xilinx, Inc. One-time programmable poly-fuse circuit for implementing non-volatile functions in a standard sub 0.35 micron CMOS
JP4217388B2 (ja) * 2001-06-26 2009-01-28 株式会社東芝 半導体チップ及び半導体モジュール
US6907497B2 (en) * 2001-12-20 2005-06-14 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
DE10163484A1 (de) * 2001-12-21 2003-07-10 Austriamicrosystems Ag Zenerdiode, Zenerdiodenschaltung und Verfahren zur Herstellung einer Zenerdiode
ITMI20020984A1 (it) * 2002-05-10 2003-11-10 Simicroelectronics S R L Circuito latch non-volatile
US6876594B2 (en) * 2002-12-26 2005-04-05 Texas Instruments Incorporated Integrated circuit with programmable fuse array
KR20070069173A (ko) 2004-09-24 2007-07-02 사이프레스 세미컨덕터 코포레이션 1회 프로그램 가능〔ｏｔｐ〕 래치 및 방법
JP4619367B2 (ja) * 2004-10-26 2011-01-26 スパンション エルエルシー 不揮発性記憶装置
US7158431B2 (en) * 2005-03-28 2007-01-02 Silicon Storage Technology, Inc. Single transistor sensing and double transistor sensing for flash memory
US8116159B2 (en) * 2005-03-30 2012-02-14 Ovonyx, Inc. Using a bit specific reference level to read a resistive memory
US7486530B2 (en) * 2005-04-28 2009-02-03 Micron Technology, Inc. Method of comparison between cache and data register for non-volatile memory

Also Published As

Publication number Publication date
US20100061131A1 (en) 2010-03-11
WO2008059001A3 (de) 2008-07-03
US8270192B2 (en) 2012-09-18
WO2008059001A2 (de) 2008-05-22
DE112007002700B4 (de) 2014-11-06
DE102006053902A1 (de) 2008-05-21

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OP8 Request for examination as to paragraph 44 patent law
R016 Response to examination communication
R018 Grant decision by examination section/examining division
R020 Patent grant now final
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee