DE1160891B - Circuit for transferring information from one magnetic core to another magnetic core - Google Patents

Description

FEDERAL REPUBLIC OF GERMANY

GERMAN

PATENT OFFICE

EDITORIAL

Boarding school Class: H 03 k

German class: 21 al -37/64

Number: 1 160 891

File number: 116487 ΓΧ c / 21 a

Filing date: May 26, 1959

Opening day: January 9, 1964

In the electronic circuits used to perform arithmetic and control functions Data processing devices have been used for some time to build up the elementary logic circuits Time in addition to the tubes, diodes and transistors that were customary up to now, also because of their high operational reliability and their low space and power requirements advantageous magnetic cores with almost rectangular Hysteresis loop. Since when magnetizing a magnetic core in each of its windings one Voltage is induced, the reverse transmission of the information must in such circuits to an upstream magnetic core. In the previously known such circuits To do this, one switches diodes into the transmission circuit between two magnetic cores, which the Prevent unwanted impulses from becoming effective. This has the disadvantage that because of the sensitivity of the diodes against mechanical and thermal influences the operational safety and service life of the Circuit is reduced and because of the relatively high forward resistance of the diodes high-resistance windings with a large number of turns are required. Circuits have also been proposed in which the components for rearward blocking are also magnetic cores.

Such a known circuit is used in a shift register in which each storage magnetic core is coupled to the adjacent intermediate storage magnetic cores via a blocking magnetic core. One Winding on the storage or intermediate storage cores is each with one winding of the neighboring Blocking magnetic cores connected to a loop in which an ohmic resistor is switched on. The winding sense of the windings is chosen so that when deleting a memory or intermediate storage core the following lock magnetic core and the following latch or storage core in the one state be tilted, but the blocking magnet core in front of it remains in the zero state. The reverse transmission is avoided in this known arrangement that when tilting back the Locking magnet core on the storage or intermediate storage core located behind it, the incremental pulse is present, which brought this core into the zero state. The energy induced in the loop is used in the ohmic resistance in the loop destroyed. In this shift register, the winding has a memory or Intermediate storage core has more turns than the series winding of the following blocking magnet core. This means that only the following memory circuit can be used at the same time as a blocking magnet core to pass on information

from a magnetic core

to another magnetic core

Applicant:

IBM Germany

International office machines

Society m. B. H.,

Sindelfingen (Württ.), Tübinger Allee 49

Named as inventor:

Robert Charles Paulsen,

Rabbit Trail, Poughkeepsie, N.Y.,

Allan Arthur Kahn, Bronx, N.Y. (V. St. A.)

Claimed priority:

V. St. v. America August 27, 1958

(No. 757 482)

or intermediate storage core, but not the following blocking magnet core is toggled into the one state. In order to avoid that in the other loop coupled to the locking magnetic core of the memory or The buffer core is overturned and the information is lost, the blocking magnet core becomes so slowly reset that the impulse induced in the loop becomes so small that it causes the newly set Memory or cache core is not deleted.

This known shift register requires at least three pulse generators and one resistor per loop. In order for the circuit to work correctly, it is necessary that the reset of the blocking magnet cores take place slowly, which requires tight tolerances for the reset pulses.
In a further known shift register, a winding of a blocking magnet core is located in each of the connecting lines between the storage cores and the intermediate storage cores. The blocking magnetic cores are premagnetized in such a way that the blocking cores lying in the forward direction are driven into saturation by the pulses and thus represent a small impedance, while the magnetization of the blocking cores lying in the reverse direction is caused by the

309 778/140

Pulses is reduced so that the impedance of these nuclei is so great that reverse transmission is avoided will.

In addition to the two clock pulse sequences, a DC voltage source is used to operate this shift memory needed.

The invention has the advantage over the prior art that it is less complex. Will For example, a shift memory constructed from circuits according to the invention, are used for switching this shift memory only requires two incremental pulse trains.

The invention relates to a circuit for forwarding information from one magnetic core (input core) to another magnetic core (output core), in which the reverse transmission is prevented by a third magnetic core (blocking core) and the output winding of the input core with the input winding of the output core and a first Winding of the locking core is connected to a loop. The invention is characterized in that the Number of turns of the input winding of the output core is less than the number of turns of the first winding of the locking core is that the winding direction of these two windings is opposite and that for extensive compensation of the magnetization of the output core in the initial state resulting retransmission pulse of the blocking core simultaneously and in the same direction as the output core is magnetized.

The invention is described in more detail below using two exemplary embodiments. In the drawing shows

F i g. 1 the idealized hysteresis loop of the in the Magnetic cores used magnetic material, F i g. 2 the first,

F i g. 3 the second embodiment of the circuit according to the invention and

F i g. 4 shows the timing diagram for the operation of the circuits according to FIG. 2 and 3 required Clock pulses.

The curve in FIG. 1 shows the magnetic flux density B as a function of the applied field H for a magnetic core which has an idealized rectangular hysteresis curve. Conventionally, the opposite remanence states are used to represent binary information. They are arbitrarily labeled "0" and "1". If a "0" is stored, a pulse applied to a winding surrounding the core in the corresponding sense causes the curve to be traversed: when the pulse ends, the remanence state "1" is reached. Such a pulse is hereinafter referred to as a "write pulse". Similarly, the core is read out by a pulse in the opposite sense to the same or another winding or switched back to the "O" state in order to determine which information is stored. Such a pulse is hereinafter referred to as a "read pulse". If a “1” was stored, when switching from “1” to “0” there is a large change in the flux of the lines of force and a correspondingly high voltage is generated in the output winding. If, however, a "0" was stored, there is only a slight change in the magnetic resistance and a negligible signal is generated in the output winding.

A point next to a terminal of each winding indicates the direction of the winding. A write pulse is a positive impulse sent to your non-doted end of the coil and tends to store a "1" while a read pulse is a positive pulse. the one with one End marked with a dot and tends to store a "0".

In Fig. 2, the core S is provided with a first winding 10, which acts as both an input and an output winding and is connected to an output winding 12 on the input _{core C 1} and to an input _{winding 14 on the output core C 2} . This connection is referred to as loop A below. Information to be received is fed to the circuit through an input winding 16 on the input core C ₁ which is connected to a source X. and through an input winding 18 on core C ₁ connected to a source Y and an input winding 20 on input _{core C 1} . which is connected to a source Z. Information output signals of the circuit arise in an output _{winding 24 on the output core C 2} , which is in the form of a series circuit with an input winding 26 on the core C ₃ , an input winding 28 on the core C ₄ and an input winding 30 on the core C ₃ via a diode D. connected is. This connection is referred to as loop B below. The cores C ₃ , C ₄ and C ₅ each have an output winding 32, 34 and 36, respectively, which provide an output signal when the cores are switched from one bistable state to the other. The input core C ₁ is energized from an adjustable DC source Lu of the cores C _{2, C;!} . C ₄ and C ₅ are excited by a clock pulse source Ia and the cores S and C ₂ by a clock pulse source Ib. On the core C ₁ there is a winding 38 connected to the source hu . A winding 40 on the core 5 and a winding 42 on the output core C ₂ are connected to the source Ib , a winding 44 on the output _{core C 2} is in Connected in series with a winding 46 on core C ₃ , a winding 48 on core C ₄ and a winding 50 on core C ₅ , which are connected to the source Ia .

The sequence of the pulses supplied by the clock pulse sources I _A and I _n described above is based on FIG. 4 shows, according to which the time of occurrence of an input signal which is. a positive signal applied to the end of an input winding that is not designated by a dot is the point in time at which the clock pulse source Ia is effective. These sources work with the in FIG. 2 and 3 together.

F i g. 1 shows different points "α", "b", "c", "ei", "e" and >> / "on the magnetization curve. According to FIG. 2 and 3, the input cores C ₁ and C ₁ 'each have a winding 38 and 38'. to which the source he is connected. The point "a" on the magnetization curve of FIG. 1 can be viewed as one bias unit, point "6" as two bias units and point "c" as three bias units, which are connected to cores C ₁ or C ₁ 'through the source Li ₁ - connected to winding 38 or 38'. be created. When a bias unit is applied, a single input signal switches the core along the "σ", nh and "e" part of the curve, thus causing a large change in the magnetic flux. When the input signal ends, the premagnetization switches the

5 6

Core from point "<?" To point "f" and back to core C _{2 has} a larger number of turns, point becomes "α" and thus sets it back. When the blocking core is applied, S switched from the “0” to the “1” state, the Ar and the output _{core C 2} remains in the “1” state, at point “b” , from two pre-magnetization units. A single input pulse Then the clock pulse source Ib sends a read signal shifts the operating point from "b" to "α", causing 5 in the windings 40 and 42 on the cores S or little or no change in the magnetic flux, C ₂ , which the cores S and C _{2 resets} from the "1" to the "O" state during two simultaneously supplied input signals. The blocking core S induces a switchover after point "e". When it is reset, a voltage in the Wick application of three bias units are developed 10, whose end marked with a dot requires three simultaneous input signals to be positive for an io, and the output core C ₂ a voltage switch from point "c" to point “E” to be in the windings 14 and 24, the end of which marked with a dot is also positive. The algebraic

For the circuit according to FIG. 2 it is now assumed that the sum of the voltages induced in the windings 10 and 14 on the men, that all cores in the lower remanence state, cores S or C ₂ is almost or in the "0" state. In addition, it is assumed that 15 is zero, and only a little current flows in loop A, that only the input core is on input _{core C 1,} while that in winding 24 is on output winding 16 and windings 18 and 20 generated _{core C 2} Voltage a current flow in the clock is absent and that a bias unit in the clockwise direction in the loop B causes the diode D to be applied to the input _{core C 1} , as is passed through the point in the forward direction and a writing "a" is shown in FIG. If there is no input signal into windings 26, 28 and 30 on the cores signal to the circuit, it has sent from source Ib C ₃ , C ₄ and C ₆ , respectively, causing each of the cores out into windings 40 and 40 42 given read signal on the "0" - switched to the "1" state and one of the cores S or C _{2 has} no effect, since both cores voltage at the output windings 32, 24 and 36 are already in the "0" state . The source Iac that is generated. After completion of the / ß-clock pulse input core C ₁ in the reading direction to point "α" 25, the clock pulse source Ia sends a read signal to the premagnetized, has no effect, since the input windings 44, 46, 48 and 50 on the cores C ₂ , C ₃ , core C _{1 is} also in the "0" state. _{C 4} and C ₅ transmit similarly, whereby the cores C ₃ , C ₄ and C _{5 are} reset from the clock pulse "1" to the "0" state at the end of the / B clock pulse and so Ia source a read signal in windings 44, 46, 48 a voltage in windings 26, 28 and 30 and 50 on cores C ₂ , C ₃ , C ₄ and C ₅ , but this creates 30 on cores C ₃ , C ₄ and C ₆ which has no effect because these nuclei are already positive in the »0« - end marked with a dot. The induced state are. Tensions are additive and cause one

If it is now assumed that the source X current flows clockwise in the loop B, which is activated and tends to write an input pulse in the winding to the core C ₂ , but does not send a development 16 of the input _{core C 1} , the input 35 has the effect because the core C ₂ through the / ^ pulse applied to its output core C ₁ as a result of this input signal from winding 44 in the “0” state point “0” to point “e” on the line shown in FIG. 1 shown is held. Magnetization curve switched at the end of the Ia and / B clock pulses. When it is switched, all cores remain in the "0" state, and if the input core C _{1 is switched off,} a voltage is applied to the output signal when an input of the winding 12 is applied for the first time, in such a way that it is not generated with a 40 signal, which causes the output voltage -Point marked end of this winding is positive, branch of the transmitted information is reached so that a current flow has been counterclockwise in.

of the loop A is effected, which tends to assume that the circuit shown in FIG. 2

Read out blocking core S and the output _{core C 2} shown on the input core only the circuit

to enroll. Since the locking core S is already in "0" - 45 windings 16 and 18 with their assigned

State, it is not influenced while the sources are located and that the source Iac has two advantages

Starting _{core C 2} from the "0" - to the "1" state applies magnetization units to the core C ₁ , like

is switched to a voltage in the output by point »έ« in F i g. 1 is shown. At a

To induce winding 24 on the output core C ₂ , input signal, ie when the separate actuation

whose end not marked with a point 50 source X or Y, the input core C ₁ remains in the »0« -

is positive. The span state induced in the winding 24, and the circuit behaves as if no

Voltage tends to have a current flow against the input signal. If the

To effect clockwise in loop B , the input sources X and Y are both actuated at the same time

however blocked, and through the diode D its will be to an input signal to the not with point

Energy destroyed. When the input signal 55 ends, mark the ends of the windings 16 and 18 respectively.

at winding 16 on the input _{core C 1} puts the put, the input _{core C 1} from point »έ« to

point "e" applied to the input core C ₁ by the source hc and induces a voltage in

DC bias the core C ₁ of the winding 12, whose not marked with a dot

Point "e" to point "0" on the magnetization curve end is positive. The circuit works in the same way,

return. When it is reset from the "1" state in 60 as described above, as only an input

The pre-magnetized »0« state is induced by the presence of the signal and only one input winding

output core C ₁ a voltage in the output winding was assumed. If in the last described

ment 12, whose end circuit marked with a dot was the Iac premagnetization of this type,

is positive, whereby a clockwise current flow that the input core C ₁ a bias

is generated in loop A , which tends to have been fed to the 65 unit (point "α" in Fig. 1),

To read out core C ₂ and to switch one of the input sources X or Y into the blocking core S ¹ at all

to write. Since the winding 10 on the blocking core S niger or simultaneous actuation the input

compared to the winding 14 on the output core C ₁ . If it is assumed that in the

7 8

device write all three input windings 16, 18 and 20 and _{read the output core C 2} '. Since the input core C _{1 is} located (Fig. 2), the output core C ₂ 'switches already in the "O" state and when the input core C _{1 is} pre-magnetized at point "α", it is also connected to the winding 42' is applied, each input X, Y or Z alone or / ^ - pulse is premagnetized, it remains unaffected, two or three inputs at the same time the core C ₁ in 5 The input _{core C 1} 'is connected to the winding "1" -State. If, however, two / ₍ ? _{T pulses are applied to core C 1} and pre-magnetization units are applied (point is therefore also unaffected, and all cores "Z>"), two input sources that are operated simultaneously remain when the / ü -Taktimpulses in "0" -. necessary to the input core C ₁ switch, and condition the further application of the / j clock pulse has if the core C ₁ three Vormagnetisierungseinheiten io no effect because the cores _{C2, C3, C4} and C ₅ are fed through (point "c"), all three inputs are driven by this clock pulse to the "O" state. X, and Z are necessary to move it from point "c" to point "e" If to the Input core C ₁ 'larger pre-magnet

zii switch. are created, they require a

F i g. 3 shows a further embodiment of the large number of inputs for switching the invention, in which the 15 input cores C ₁ 'and which appear in FIG. Also could be switched in. The input source Z is here, however, omitted the circuits described each input through and a winding 52 on the core C ₂ ', connections of the input winding, e.g. B. 18 and 18 ', which is connected to an input source P , has been added with a clock pulse source L ₁ to the clock input. 20 can be made, making the core C ₁ 'in each

Again it is assumed that all cores in the "0" cycle are switched to the "1" state. A state are and an even more versatile usability would be achievable at the input core C _{1 'if the magnetization unit is applied.} One of the inputs 'are wound so that they support each other the input core C _1' if the input windings on the core _C1 or gear swell X 'or F' switches, when actuated, C ₁ point "SS" to point "e" 25 or counteract.

and thereby creates a voltage in the output in order to get a complete picture of the logical operations

winding 12 'on the input core C ₁ '. To give the circuit that works by modifying the input winding as well as the one shown in FIG. 2, change of the premagnetization or level, namely an output signal when different amounts of input winding position of the core C ₂ 'are provided by the / js clock pulse 3 ° hung on the input _{core C 1} or C ₁ ' in F i G. 2 generated. However, if the circuit operation is feasible and 3 can be reached, some such operations are now considered if the source P is described in more detail at the same time as one of the rations.

Inputs X ' or Y' is actuated. For F i g. 2 it is assumed that a pre-magnet

When switching the input _{core C 1} 'from the tization unit to the input core C ₁ , point "ß" to point "e" on the magnetization 35 and a single input, e.g. B. X, connected to it curve is a voltage in the winding 12 'is on. In this case the circuit fulfills the _{function of carrying or delaying the end of the core C 1} ', which is not marked with a dot. When applied is positive, generated. It causes a current flow in a bias unit to the input counterclockwise in the loop A ', the core C ₁ and the application of two inputs X and Y tends to read out the blocking core S' and a two-way OR is obtained in the 40 -Function. If output core C ₂ 'to be written. The blocking core S ", a bias unit at the input core, is not affected because it is already applied in the" O "state C ₁ and the inputs X and Y are connected to it. At the same time, the input source P sends a connected, but the windings 16 and 18 are entpositive Signal in the end marked with a dot, which are wound opposite, one obtains the function winding 52, BUT NOT the effect of the current in the 45. If in the last- mentioned winding loop A , the one in the not with dot arrangement a of the input windings is connected to the ked end of winding 14 'on core C ₂ ' source Ia so that the input is sent. The output _{core C 2} 'remains in the "0" core C ₁ in each cycle from point <> a " to point >> e « state, and when the input signals X 'is switched on the magnetization curve, and / or Y' and P sets the to the input core C ₁ '5 ° if the other input is so wound this created Premagnetization counteracts this change in the magnetic flux to the point "ö", the logical ope back and induces a voltage in the ration of inversion or "complement formation" from output winding 12 ', whose point marked out. By applying two bias ends is positive to cause a current flow in clockwise units to the core C ₁ and connection of two senses in the loop A ' , which tends to have 55 inputs, e.g. B. X and F, as in FIG. 2, to write into the blocking core S "and the output - the logical operation AND is obtained. _{To read out the core C 2} '. Because the winding 10' on the previous discussion it can be seen that further blocking core S 'has more turns than that Wind input windings with other clock pulse sources development 14 'on the output core C ₂ ', the blocking is switched from the "0" to the "1" state with a corresponding modification of the input core S '. 60 windings can be used to create a the clock pulse source Ib _'2 displacement and three-described aN D circuit. C' thereafter sends a read signal similar logic to perform such. as in the winding 40 'and 42' on the cores S that the lock core S ' from the "1" - in the "0" - as shown in Fig. 3, similar operations can be

stood back. The Sperrkem S 'induced in configurations as in the arrangement of Fig. 2 being reset a voltage in the winding 10', 65 are possible, with a further control, namely the labeled dot end is positive, whereby the blocking input P to Output _{core C 2} 'produces a clockwise current in the loop A , through which every executed logic stands which tends to be processed into the input _{core C 1} '.

Claims (3)

Patent claims: 1. Circuit for passing information from a magnetic core (input core) to a another magnetic core (output core), in which the reverse transmission by a third Magnetic core (locking core) is prevented and the output winding of the input core with the Input winding of the output core and a first winding of the blocking core to form a loop is connected, characterized in that the number of turns of the input winding of the Output core is smaller than the number of turns of the first winding of the locking core that the Winding direction of these two windings is opposite and that to the extensive Compensation of the magnetic reversal of the IO Output core in the initial state resulting return pulse of the blocking core is remagnetized at the same time and in the same direction as the output core. 2. Circuit according to claim 1, characterized in that for simultaneous remagnetization the output core and the blocking core, a pulse generator is provided, the output of which is connected to one winding on each of these two cores. Considered publications:
Austrian patent specification No. 196 644 (p. 3, line * len 78 to 88); U.S. Patent No. 2,781,503 (Fig. 6),
784 390 (Fig. 2). 1 sheet of drawings 309 778/140 12.63 © Bundesdruckerei Berlin