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CN203118935U - DFN (dual flat-pack no-lead) package structure for rectifier chip - Google Patents

DFN (dual flat-pack no-lead) package structure for rectifier chip Download PDF

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Publication number
CN203118935U
CN203118935U CN201320131920.8U CN201320131920U CN203118935U CN 203118935 U CN203118935 U CN 203118935U CN 201320131920 U CN201320131920 U CN 201320131920U CN 203118935 U CN203118935 U CN 203118935U
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area
rectifier chip
chip
pin
pins
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CN201320131920.8U
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Chinese (zh)
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胡乃仁
杨小平
李国发
钟利强
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Suzhou Good Ark Electronics Co Ltd
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Suzhou Good Ark Electronics Co Ltd
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    • H10W90/756

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Abstract

本实用新型公开一种整流芯片的DFN封装结构,包括整流芯片、包覆于整流芯片四周的环氧树脂层,还包括导电基盘、导电焊盘,所述导电基盘由散热区和基盘引脚区组成,此基盘引脚区由若干个相间排列的负极引脚组成,此负极引脚一端与散热区端面电连接,所述散热区位于整流芯片正下方且与整流芯片下表面之间通过软焊料层电连接;所述导电焊盘位于整流芯片另一侧,导电焊盘包括焊接区和至少两个引脚,焊接区与引脚的连接处具有一折弯部,从而使得焊接区高于引脚;若干根金属线跨接于所述整流芯片的正极与导电焊盘的焊接区之间。本实用新型DFN封装结构有利于进一步缩小器件的体积,同时减少封装体中部件的数目;且提升整流器件散热效率,热阻相比现有技术降低75%。

Figure 201320131920

The utility model discloses a DFN package structure of a rectifier chip, which comprises a rectifier chip, an epoxy resin layer coated around the rectifier chip, and a conductive substrate and a conductive pad. The conductive substrate consists of a heat dissipation area and a substrate The lead area of the substrate is composed of a number of negative pins arranged alternately. One end of the negative pins is electrically connected to the end face of the heat dissipation area. The heat dissipation area is located directly below the rectifier chip and between the lower surface of the rectifier chip. The conductive pad is located on the other side of the rectifier chip, the conductive pad includes a welding area and at least two pins, and the connection between the welding area and the pins has a bend, so that the welding The area is higher than the pins; several metal wires are connected between the anode of the rectifier chip and the welding area of the conductive pad. The DFN package structure of the utility model is beneficial to further reduce the volume of the device, and at the same time reduce the number of components in the package; and improve the heat dissipation efficiency of the rectifier device, and the thermal resistance is reduced by 75% compared with the prior art.

Figure 201320131920

Description

The DFN encapsulating structure of rectification chip
Technical field
The utility model relates to the rectification chip technical field, is specifically related to a kind of DFN encapsulating structure of rectification chip.
Background technology
Along with the development of electronic product, for example consumer electronics products such as notebook computer, mobile phone, mini CD, palmtop PC, CPU, digital camera more and more develop to miniaturization.For a short time do thinly along with doing of product, how the heat that millions of transistors among the worker IC produce distributes must not irrespective problem with regard to becoming one.In the prior art, though can reduce mode such as voltage and reduce caloric value by promoting worker IC processing procedure ability, still can not avoid the trend of heat generation density increase.Heat dissipation problem does not solve, and can make multiplexer spare because of the overheated reliability of products that has influence on, and seriously can shorten life of product even cause the product damage.
Prior art is a kind of generalized section of typical DFN encapsulating structure as shown in Figure 1, comprises chip 900, fin 920, lead frame 930, a plurality of lead 940, and the insulating cement 950 of parcel said structure.Chip 900 sticks on the fin 920, and lead frame 930 has the pin of a plurality of mutually insulateds, and the pad on chip 900 surfaces is connected lead frame 930 by lead 940.On the corresponding pin.Insulating cement 950 all wraps up said structure, and so that it is isolated with extraneous, only each pin and the fin 920 with lead frame 930 is exposed in the air with chip 900 facing surfaces.The pin that lead frame 930 comes out is used for realizing that packed chip 900 connects with extraneous electricity, and the heat that the effect that fin 920 comes out produces when being chip 900 work is dispersed into by the surface that exposes and goes in the environment, still exists volume big and be unfavorable for the technical problem of dispelling the heat.
Summary of the invention
The utility model purpose provides a kind of DFN encapsulating structure of rectification chip, and this DFN encapsulating structure is conducive to the volume of further reduction of device, reduces the number of parts in the packaging body simultaneously; And promote the rectifying device radiating efficiency, thermal resistance reduces by 75% compared to existing technology.
For achieving the above object, the technical solution adopted in the utility model is: a kind of DFN encapsulating structure of rectification chip, comprise rectification chip, be coated on rectification chip epoxy resin layer all around, also comprise conduction basal disc, conductive welding disk, described conduction basal disc is made up of radiating area and basal disc pin area, this basal disc pin area is made up of several negative pole pins alternately, this negative pole pin one end is electrically connected with the radiating area end face, described radiating area under the rectification chip and with the rectification chip lower surface between be electrically connected by the soft soldering bed of material; Described conductive welding disk is positioned at the rectification chip opposite side, and conductive welding disk comprises weld zone and at least two pins, and the junction of weld zone and pin has a bending part, thereby makes the weld zone be higher than pin; Some wires cross-over connections are between the weld zone of the positive pole of described rectification chip and conductive welding disk.
Further improved plan is as follows in the technique scheme:
1, in the such scheme, described conductive welding disk weld zone and rectification chip separately is positioned at same horizontal plane.
2, in the such scheme, the number of described metal wire is at least four.
3, in the such scheme, the number of described negative pole pin is four.
Because technique scheme is used, the utility model compared with prior art has following advantage and effect:
1, the DFN encapsulating structure of the utility model rectification chip, it has had both conductive welding disk in the prior art, three component functions of fin and basic island simultaneously, the volume that both had been conducive to further reduction of device, also reduce the number of parts in the device, because radiating area and basal disc pin area are as a whole, improved the stability of electrical property simultaneously.
3, the junction of weld zone and pin area has a bending part in the DFN encapsulating structure of the utility model rectification chip, thereby make the weld zone be higher than pin area, and guaranteed that the weld zone of first, second conductive welding disk and rectification chip positive pole are at same horizontal plane, thereby effectively avoided owing to the thin technological deficiency of in use breaking easily of second metal wire that connects grid, thereby prolonged the useful life of product and improved reliability.
4, the basal disc pin area is made up of several negative pole pins alternately in the DFN encapsulating structure of the utility model rectification chip, the pin area of conductive welding disk is made up of at least four anodal pins, it is anodal and that cathodal current is big is specific to fully take into account rectification chip, thereby be conducive to reduce the generation of heat, and further improved electrical performance indexes.
Description of drawings
Fig. 1 is prior art structural representation one;
Fig. 2 is the DFN encapsulating structure schematic diagram of the utility model rectification chip;
Fig. 3 is along the cutaway view of A-A line in the accompanying drawing 2.
In the above accompanying drawing: 1, rectification chip; 2, epoxy resin layer; 3, conduction basal disc; 31, radiating area; 32, basal disc pin area; 321, negative pole pin; 4, conductive welding disk; 5, metal wire; 6, the soft soldering bed of material; 7, weld zone; 8, pin area; 9, bending part.
Embodiment
Be further described below in conjunction with the utility model of embodiment:
Embodiment 1: a kind of DFN encapsulating structure of rectification chip, comprise rectification chip 1, be coated on rectification chip 1 epoxy resin layer 2 all around, also comprise conduction basal disc 3, conductive welding disk 4, described conduction basal disc 3 is made up of radiating area 31 and basal disc pin area 32, this basal disc pin area 32 is made up of several negative pole pins 321 alternately, these negative pole pin 321 1 ends are electrically connected with radiating area 31 end faces, described radiating area 31 under the rectification chip 1 and with rectification chip 1 lower surface between be electrically connected by the soft soldering bed of material 6; Described conductive welding disk 4 is positioned at rectification chip 1 opposite side, and conductive welding disk 4 comprises weld zone 7 and at least two pins 8, and weld zone 7 has a bending part 9 with the junction of pin, thereby makes weld zone 7 be higher than pin 8; Some wires 5 cross-over connections are between the weld zone 7 of the positive pole of described rectification chip 1 and conductive welding disk 4.
Above-mentioned conductive welding disk 4 weld zone 7 separately is positioned at same horizontal plane with rectification chip 1.
Embodiment 2: a kind of DFN encapsulating structure of rectification chip, comprise rectification chip 1, be coated on rectification chip 1 epoxy resin layer 2 all around, also comprise conduction basal disc 3, conductive welding disk 4, described conduction basal disc 3 is made up of radiating area 31 and basal disc pin area 32, this basal disc pin area 32 is made up of several negative pole pins 321 alternately, these negative pole pin 321 1 ends are electrically connected with radiating area 31 end faces, described radiating area 31 under the rectification chip 1 and with rectification chip 1 lower surface between be electrically connected by the soft soldering bed of material 6; Described conductive welding disk 4 is positioned at rectification chip 1 opposite side, and conductive welding disk 4 comprises weld zone 7 and at least two pins 8, and weld zone 7 has a bending part 9 with the junction of pin, thereby makes weld zone 7 be higher than pin 8; Some wires 5 cross-over connections are between the weld zone 7 of the positive pole of described rectification chip 1 and conductive welding disk 4; The described soft soldering bed of material 6 is made up of the component of following quality percentage composition: lead 92.5%, tin 5%, silver 2.5%.
Above-mentioned conductive welding disk 4 weld zone 7 separately is positioned at same horizontal plane with rectification chip 1; The number of above-mentioned metal wire 5 is at least four.
The number of above-mentioned negative pole pin 321 is four.
When adopting the DFN encapsulating structure of above-mentioned rectification chip, it has had both conductive welding disk in the prior art, three component functions of fin and basic island simultaneously, the volume that both had been conducive to further reduction of device, also reduce the number of parts in the device, because radiating area and basal disc pin area are as a whole, improved the stability of electrical property simultaneously; Secondly, the junction of weld zone and pin area has a bending part in the DFN encapsulating structure, thereby make the weld zone be higher than pin area, and guaranteed that the weld zone of first, second conductive welding disk and rectification chip positive pole are at same horizontal plane, thereby effectively avoided owing to the thin technological deficiency of in use breaking easily of second metal wire that connects grid, thereby prolonged the useful life of product and improved reliability; Again, the basal disc pin area is made up of several negative pole pins alternately in the DFN encapsulating structure, the pin area of conductive welding disk is made up of at least four anodal pins, it is anodal and that cathodal current is big is specific to fully take into account rectification chip, thereby be conducive to reduce the generation of heat, and further improved electrical performance indexes.
Above-described embodiment only is explanation technical conceive of the present utility model and characteristics, and its purpose is to allow the personage who is familiar with this technology can understand content of the present utility model and enforcement according to this, can not limit protection range of the present utility model with this.All equivalences of doing according to the utility model spirit essence change or modify, and all should be encompassed within the protection range of the present utility model.

Claims (4)

1. 一种整流芯片的DFN封装结构,包括整流芯片(1)、包覆于整流芯片(1)四周的环氧树脂层(2),其特征在于:还包括导电基盘(3)、导电焊盘(4),所述导电基盘(3)由散热区(31)和基盘引脚区(32)组成,此基盘引脚区(32)由若干个相间排列的负极引脚(321)组成,此负极引脚(321)一端与散热区(31)端面电连接,所述散热区(31)位于整流芯片(1)正下方且与整流芯片(1)下表面之间通过软焊料层(6)电连接;所述导电焊盘(4)位于整流芯片(1)另一侧,导电焊盘(4)包括焊接区(7)和至少两个引脚(8),焊接区(7)与引脚的连接处具有一折弯部(9),从而使得焊接区(7)高于引脚(8);若干根金属线(5)跨接于所述整流芯片(1)的正极与导电焊盘(4)的焊接区(7)之间。 1. A DFN packaging structure for a rectifier chip, comprising a rectifier chip (1), an epoxy resin layer (2) wrapped around the rectifier chip (1), characterized in that it also includes a conductive substrate (3), a conductive An electric pad (4), the conductive base plate (3) is composed of a heat dissipation area (31) and a base plate pin area (32), and the base plate pin area (32) is composed of several negative pins ( 321), one end of the negative pin (321) is electrically connected to the end surface of the heat dissipation area (31), and the heat dissipation area (31) is located directly below the rectifier chip (1) and is connected to the lower surface of the rectifier chip (1) through a soft The solder layer (6) is electrically connected; the conductive pad (4) is located on the other side of the rectifier chip (1), the conductive pad (4) includes a welding area (7) and at least two pins (8), the welding area (7) There is a bending part (9) at the connection with the pin, so that the welding area (7) is higher than the pin (8); several metal wires (5) are connected across the rectifier chip (1) between the positive electrode and the welding area (7) of the conductive pad (4). 2. 根据权利要求1所述的DFN封装结构,其特征在于:所述导电焊盘(4)各自的焊接区(7)与整流芯片(1)位于同一水平面。 2. The DFN package structure according to claim 1, characterized in that: the respective welding areas (7) of the conductive pads (4) are located on the same level as the rectifier chip (1). 3. 根据权利要求1所述的DFN封装结构,其特征在于:所述金属线(5)的数目为至少四根。 3. The DFN package structure according to claim 1, characterized in that: the number of the metal wires (5) is at least four. 4. 根据权利要求1所述的DFN封装结构,其特征在于:所述负极引脚(321)的数目为四根。 4. The DFN package structure according to claim 1, characterized in that: the number of the negative pins (321) is four.
CN201320131920.8U 2013-03-22 2013-03-22 DFN (dual flat-pack no-lead) package structure for rectifier chip Expired - Lifetime CN203118935U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106997918A (en) * 2017-05-26 2017-08-01 厦门市东太耀光电子有限公司 A kind of LED chip front pad structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106997918A (en) * 2017-05-26 2017-08-01 厦门市东太耀光电子有限公司 A kind of LED chip front pad structure

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Granted publication date: 20130807