CN1930680B - Collective substrate - Google Patents

Abstract

The collective substrate is manufactured by forming a through hole after firing the ceramic green sheet, wherein the inner surface of the through hole is formed into tapered surfaces having gradually decreasing opening sizes from the main surface side and the external connection surface side to the minimum hole portion, and angles formed by both the tapered surfaces and the main surface and the external connection surface are set to be obtuse angles. The semiconductor element mounting member includes an insulating member for cutting the aggregate substrate. The imaging device is provided with an imaging element in a region surrounded by a frame bonded to the main surface side of the insulating member, and is closed by a cover. The light emitting diode component is provided with a light emitting element on the main surface of the insulating member having the minimum hole portion filled with a conductive material, and is sealed with a fluorescent material and/or a protective resin. The light emitting diode mounts the light emitting diode component on the package.

Description

Assembly substrate

technical field

The present invention relates to a composite substrate made of ceramics in which a plurality of plate-shaped insulating members are integrally formed in a shape arranged on the same plane; a semiconductor element mounting component formed using insulating members obtained by cutting the composite substrate for each region; An imaging device formed of the semiconductor element mounting member, a semiconductor device such as a light emitting diode component, and a light emitting diode formed using the light emitting diode component.

Background technique

In recent years, the demand for imaging elements such as CCD imaging elements and C-MOS imaging elements has rapidly expanded along with the spread of digital cameras and camera-equipped mobile phones. Furthermore, not only is the number of pixels of an imaging element rapidly increasing to meet the demand for high image quality, but the size of the imaging element is also increasing, particularly with the spread of digital single-lens reflex cameras. In addition, in recent years, since a large amount of light has been realized in a light-emitting element, and white light can be emitted by combining it with a phosphor, etc., it has been widely used as a flashlight of a mobile phone with the above-mentioned camera. Light-emitting diodes.

Therefore, in order to fully exhibit the performance of semiconductor elements such as the imaging element and light emitting element with higher output, for example, a semiconductor element using a flat insulating member made of ceramics having high heat dissipation such as AlN The need for onboard parts is increasing. The semiconductor element mounting member is formed such that, for example, one surface of the insulating member is used as a main surface for semiconductor element mounting, and the opposite surface is used as an external connection surface for connecting to other components, and the main surface is formed The multilayer electrode layer for semiconductor element mounting is formed on the external connection surface for connecting to other components, and further, through the conductive layer or via conductor formed in a plurality of through holes that penetrate the insulating component , connect each electrode layer on both sides separately.

Conventionally, the semiconductor element-mounting member is generally produced by using a ceramic green sheet as a precursor of an insulating member by a so-called co-firing method (for example, refer to Patent Documents 1 and 2). That is, after the ceramic green sheet is formed into a planar shape corresponding to the outer shape of the insulating member, and through-holes are formed at predetermined positions, the via conductor, which is the foundation thereof in the case of a via conductor, is fired simultaneously with the firing of the ceramic green sheet. The conductive paste that was fired to form the via conductor was fired simultaneously with the ceramic green sheet and the conductive paste in a state filled in the through holes, thereby manufacturing a semiconductor element mounting component.

And, for example, on the main surface of the insulating member and the surface to be the external connection surface of the ceramic green sheet formed in a predetermined planar shape, the conductive paste is printed or applied in a predetermined planar shape corresponding to the shape of the electrode layer, and the ceramic After the green sheets are fired together to form a base metal layer, a plated metal layer is laminated on the base metal layer to form electrode layers on the main surface and the external connection surface.

Patent Document 1: Japanese Unexamined Patent Application Publication No. 11-135906

Patent Document 2: JP-A-2002-232017

However, since semiconductor element mounting components are produced one by one by the co-firing method, there are problems of low productivity and high production cost. For this reason, a method of manufacturing a ceramic assembly substrate in which a plurality of plate-like insulating members are integrally formed in a shape arranged on the same plane has been formed by the above-mentioned co-firing method has been studied, and then the production is carried out by using a cutting machine or the like. Each area of the collective substrate is cut to manufacture a plurality of insulating parts at a time. However, a large-area ceramic green sheet including a plurality of regions serving as insulating members suffers from a large amount of shrinkage during firing, and also shrinks unevenly as a whole, resulting in uneven shrinkage. For example, a rectangular ceramic green sheet is shrunk so that the vicinity of the center of each side enters more inwardly than the corners of the rectangle.

Therefore, even if through-holes are formed in each region on the ceramic green sheet before firing so that a plurality of regions serving as insulating members are arranged in a straight line, the formation positions of the through-holes will be shifted due to shrinkage during firing. As a result, unevenness is caused, and therefore, it is difficult to cut out respective regions from the formed collective substrate by a cutter or the like. Therefore, since each region can be cut out by a cutter or the like even in a state where the regions are not neatly arranged, the positions of each region are divided in consideration of the positional displacement of each region due to shrinkage. The formation interval is set to be wide, but in this case, the number of regions that can be formed on one collective substrate decreases, and there is a problem that material waste increases.

Therefore, a method has been studied in which a large ceramic green sheet including a plurality of regions to be insulating members is fired in advance to form a collective substrate on which a plurality of regions to be insulating members are set. After forming through-holes for each area by laser processing or the like, cutting is performed for each area to manufacture an insulating member. In the above method, simultaneously with or successively with the process of forming electrode layers on the main surface side and the external connection surface side of the insulating member by electroless plating, electroplating, etc., metallization is performed on the inner surface of the formed through-hole, by This forms a conductive layer connecting the two electrode layers.

However, since the through-hole formed by laser processing is formed in a conical shape with a gradually smaller diameter from the incident side of the laser light toward the exit side, the surface on the exit side of the laser beam has a gap between the surface and the through-hole. The inner surface intersects at an acute angle. Since the metal layer formed by physical vapor deposition, printing, plating, etc. has weak adhesion at the corners intersecting at an acute angle, and it is easy to form uneven film thickness, it is formed on an insulating member. In the case of the electrode layer and the conductive layer, there is a problem that poor connection between the electrode layer and the conductive layer is likely to occur.

Contents of the invention

An object of the present invention is to provide a composite substrate capable of making a conductive layer formed in the through-hole and a conductive layer formed in the main surface or The electrode layer on the outer interface can be reliably connected without causing poor connection or the like. Furthermore, the object of the present invention is to provide a semiconductor element mounting member formed using an insulating member cut into each region from the collective substrate, an imaging device, a light emitting diode component, etc. formed using the semiconductor element mounting member. A semiconductor device and a light emitting diode formed using the light emitting diode component.

In order to achieve the above object, the collective substrate of the present invention is characterized in that a plurality of plate-shaped insulating members having one side as a main surface for semiconductor element mounting and the opposite side as an external connection surface for connecting with other components are arranged on the same surface. The shape on the plane is integrally formed of ceramics, and at least one of the predetermined positions in the area that becomes each insulating member and the position that straddles the boundary line between each area and its outer area is respectively formed in the thickness direction of the insulating member. and the inner surface of each through-hole is formed in a tapered surface shape from the opening on the main surface side and the external connection surface side to the minimum hole portion set at one position in the thickness direction of the insulating member. , making the opening size gradually smaller. Furthermore, the composite substrate of the present invention preferably has a thermal conductivity of 10 W/mK or higher, and a thermal expansion coefficient of 10×10 ^-6 /°C or lower. Furthermore, it is preferable that the collective substrate of the present invention is produced by forming a through-hole after firing a plate-shaped precursor which is its precursor. Furthermore, it is preferable that the collective substrate of the present invention includes: an electrode layer for mounting a semiconductor element, formed on the main surface side of a region to be an insulating member; an electrode layer for connecting to other components, formed on the external connection surface side; and a conductive The layer is formed in the through hole, and connects the electrode layer on the main surface side and the electrode layer on the external connection surface side.

The semiconductor element mounting component of the present invention is characterized in that it is produced by dicing the collective substrate of the present invention including the electrode layer and the conductive layer for each region. In the semiconductor element mounting component of the present invention, it is preferable that at least a part of the outer surface of the electrode layer on the external connection surface is formed of Au.

Furthermore, it is preferable that the semiconductor element mounting member of the present invention includes: an insulating member having a region for mounting a semiconductor element set on a main surface; and a frame laminated on the main surface so as to surround the region, preferably The thermal expansion coefficients of the insulating component and the frame body are both below 10×10 ^-6 /°C, and the difference between the thermal expansion coefficient of the frame body and the thermal expansion coefficient of the insulating component is below 3×10 ^-6 /°C. In addition, in the semiconductor element mounting part of the present invention, it is preferable that 80% or more of the area of the semiconductor element mounting area surrounded by the frame on the main surface of the insulating member is at least made of metal including an electrode layer for semiconductor element mounting. layer coverage.

The imaging device of the present invention is characterized in that it includes: the semiconductor element mounting part of the present invention; the area; and the cover, which is joined to the upper surface of the frame, is used to seal the frame, and is made of a light-transmitting plate. Furthermore, the semiconductor device of the present invention is characterized in that it includes: the semiconductor element mounting part of the present invention; and a semiconductor element mounted on the main surface of an insulating member in the semiconductor element mounting part; and the semiconductor element Sealed by sealing material.

In addition, the semiconductor device of the present invention is characterized in that the minimum hole portion of the through hole is filled with the conductive material forming the conductive layer, and the through hole is closed in the thickness direction, including the electrode layer and the conductive layer. The semiconductor element is mounted on the main surface of the collective substrate, which is the region of each insulating member, and then, after sealing the entire surface of the collective substrate on the main surface side on which the semiconductor element is mounted with a sealing material, it is sealed with the sealing material At the same time, the aggregated substrate is cut for each region, and at least a part of the cut through-hole is opened on a side surface intersecting the main surface and the external connection surface.

The light emitting diode component of the present invention is characterized in that the semiconductor element of the semiconductor device of the present invention is a light emitting element, and the sealing material is at least one of a phosphor and a protective resin. Furthermore, in the light-emitting diode component of the present invention, it is preferable that at least a part of the outer surface of the electrode layer on the main surface of the insulating member is formed of Ag, Al or Al alloy. Furthermore, the light emitting diode of the present invention is characterized by comprising: a package having a recess; the light emitting diode component of the present invention mounted on the bottom of the recess of the package; A sealing cap or a lens made of a material that can transmit light from the light emitting diode component to seal the concave portion.

In the collective substrate of the present invention, since the inner surface of the through hole is formed, the openings on the main surface side and the external connection surface side of the insulating member are formed in a tapered shape, respectively, to the minimum hole portion set at one position in the thickness direction of the insulating member. The shape of the surface makes the size of the opening gradually smaller, so the main surface, the external connection surface and the inner surface of the through-hole intersect at an obtuse angle on all sides. Therefore, according to the aggregate substrate of the present invention, when the electrode layer and the conductive layer are formed by physical vapor deposition, printing, plating, etc., the peeling and film thickness unevenness of the metal layer at the corner can be greatly reduced, and the electrode layer can be reliably connected. It is possible to improve the reliability of the semiconductor device compared with conventional ones without causing poor connection or the like to the conductive layer.

Furthermore, if the thermal conductivity of the collective substrate of the present invention is 10 W/mK or more, the heat dissipation of the semiconductor element mounting part can be improved, and it can cope with higher output of semiconductor elements. In addition, if the thermal expansion coefficient of the collective substrate is 10×10 ^-6 /°C or less, it is possible to reliably prevent excessive stress from being applied to the semiconductor element when the element is driven due to thermal history, etc. The element was damaged, and the connection with the electrode layer fell off, resulting in a poor connection.

In addition, if the composite substrate of the present invention is manufactured by firing a plate-shaped precursor such as a ceramic green sheet, which is the precursor of the composite substrate, and then forming through holes, uneven shrinkage due to the precursor does not occur. As a result, the uneven positional deviation of the through hole. Therefore, positional deviation due to shrinkage can be predicted in advance, and there is no need to set the formation intervals of the regions to be the respective insulating members wide, thereby not only increasing the number of regions that can be formed on one collective substrate, but also enabling Reduce material waste.

Furthermore, if the electrode layer is formed on the main surface of the insulating member and the external connection surface of the collective substrate of the present invention, and the conductive layer is formed on the inner surface of the through-hole, the electrode layer and the conductive layer can be reliably connected without causing a problem. Poor connection etc. Therefore, according to the semiconductor element mounting component of the present invention manufactured by dicing the collective substrate of the present invention for each region, the semiconductor element mounted on the main surface and other components can be reliably connected through the two electrode layers and the conductive layer. connected together without bad connections etc. Moreover, if at least a part of the outer surface of the semiconductor element mounting member of the present invention is formed of electrodes on the external connection surface is formed of Au, it can be connected by various conventionally known connection methods such as solder bonding or wire bonding. , to further reliably connect the electrode layer and the electrode layer arranged on other components together.

If a region for semiconductor element mounting is set on the main surface of the insulating member of the semiconductor element mounting member of the present invention, and a frame is laminated on the main surface of the insulating member so as to surround the region, then the After the semiconductor element is mounted in the region, the mounted semiconductor element can be sealed by bonding the lid to the frame. In particular, when the semiconductor element is an imaging element, by using a cover made of a light-transmitting material, it is possible to seal the imaging element in a state where the imaging element can be exposed through the cover.

If the thermal expansion coefficients of the insulating part and the frame of the semiconductor element mounting part of the present invention are both 10×10 ^-6 /°C or less, and the difference between the thermal expansion coefficients of the two is 3×10 ^-6 /°C or less, then pass Making the thermal expansion coefficient of the frame body close to that of the insulating member prevents warping of the joint between the two, and also prevents joint failure due to thermal history.

In the semiconductor element mounting component of the present invention, if the area of the semiconductor element mounting region surrounded by the frame on the main surface of the insulating member is 80% or more, at least the metal layer including the electrode layer for semiconductor element mounting Covering, for example, when the semiconductor element is an imaging element, the metal layer can function as a light-shielding layer to block light incident from the back of the imaging element through an insulating member, thereby improving the sensitivity of the imaging element. Furthermore, when the semiconductor element is a light emitting element, the metal layer can be made to function as a reflective layer to improve the luminous efficiency of the light emitting diode.

The imaging element of the present invention is configured such that after mounting an imaging element as a semiconductor element on the main surface of the insulating member of the semiconductor element mounting member provided with the frame and surrounded by the frame, the frame Since the cover body made of a light-transmitting plate material is bonded to the body, the image pickup element can be sealed in a state where the image pickup element is exposed through the cover body.

The semiconductor device of the present invention has a structure in which a semiconductor element is mounted on the main surface of a semiconductor element mounting member produced by dicing a collective substrate by area, and is sealed with a sealing material, and can be handled in the same way as a chip of a conventional semiconductor element. , mounted on a mounting portion of other components such as a wiring board. In addition, it is also possible to check whether there is a defect or the like in advance before mounting on the mounting unit. Furthermore, since it does not come into direct contact with semiconductor elements during mounting operations, etc., it is also possible to minimize the occurrence of element damage due to static electricity or the like.

In addition, when using an assembly substrate in which the minimum hole portion of the through hole is filled with a conductive material and closed in the thickness direction, a semiconductor element is mounted on the main surface, and after sealing with a sealing material, the assembly is diced for each area together with the sealing material. When the semiconductor device of the present invention is manufactured without the substrate, it is possible to prevent the sealing material from leaking to the opposite side through the through hole during the sealing. Therefore, for example, it is possible to save the effort of restrictively sealing a specific region on the side of the collective substrate on which the light-emitting element is mounted, and protect the entire surface with the sealing material, thereby enabling further miniaturization of the semiconductor device.

Furthermore, if at least a part of the through-hole cut from the collective substrate is opened on the side surface of the insulating member, the conductive layer formed on the inner surface of the exposed through-hole can function as a solder bump forming portion. Therefore, when the semiconductor device is mounted on the mounting portion of another component by soldering, the electrode layer for external connection can be assisted by the formed solder bump, thereby improving the reliability of mounting.

Since the light-emitting diode component of the present invention uses a light-emitting element as the semiconductor element in the semiconductor device of the present invention, and uses at least one of a phosphor and a protective resin as a sealing material, it can be compared with conventional light-emitting elements. In the same manner as the chip, the mounting portion of the package of the light-emitting diode and the plurality of light-emitting elements can be arranged in a planar shape, and can be mounted on the mounting portion of the substrate of the formed surface light emitter, etc. In addition, before mounting on these mounting parts, it is also possible to judge whether the light-emitting element is good or not, and to check the color tone of light emission. Furthermore, since there is no direct contact with the light-emitting element during mounting work, etc., the occurrence of element damage due to static electricity or the like can be suppressed as much as possible.

If at least a part of the outer surface of the electrode layer on the main surface of the insulating member in the light-emitting diode component of the present invention is formed of Ag, Al or Al alloy, the light from the light-emitting element can be made as efficiently as possible, especially Light having a wavelength of 600 nm or less, which is preferable for combining with a phosphor to emit white light, is reflected toward the front side of the light emitting diode component, thereby improving the luminous efficiency thereof. Furthermore, the light-emitting diode of the present invention can be efficiently manufactured without wasting expensive packages for the light-emitting diode, etc., by using the light-emitting diode component of the present invention.

Description of drawings

FIG. 1 is a partially enlarged plan view of an aggregate substrate serving as a base of an insulating member for mounting an imaging element as an example of an embodiment of the aggregate substrate of the present invention.

FIG. 2 is an enlarged cross-sectional view of a portion of a through-hole in the collective substrate.

3 is an enlarged cross-sectional view of a through-hole portion in an insulating member obtained by dicing a collective substrate.

4 is a plan view showing the main surface side of the insulating member.

FIG. 5 is a plan view showing a semiconductor element mounting component formed by bonding frames on its main surface.

Fig. 6 is a bottom view showing the external connection surface side of the insulating member.

7 is a cross-sectional view of an imaging device in which an imaging element as a semiconductor element is mounted in an element mounting region on a main surface of an insulating member of a semiconductor element mounting member, and a translucent cover is bonded to a frame.

8 is an enlarged plan view of a part of a collective substrate that is a precursor of an insulating member for mounting a light emitting element as another example of an embodiment of the collective substrate of the present invention.

Fig. 9 is an enlarged cross-sectional view of a through-hole portion in the collective substrate.

10 is an enlarged cross-sectional view of a through-hole portion in an insulating member obtained by dicing the collective substrate.

11 is a plan view showing the main surface side of the insulating member.

Fig. 12 is a bottom view showing the external connection surface side of the insulating member.

13 is a cross-sectional view showing a light emitting diode component in which a light emitting element as a semiconductor element is mounted on the principal surface of an insulating member of the semiconductor element mounting member and sealed with a phosphor and/or a protective resin.

Fig. 14 is a cross-sectional view showing a light emitting diode in which components of the light emitting diode are mounted in a package.

FIG. 15 is an enlarged side view of a portion of a through hole, taken along the arrow V in FIG. 17 , in another example of the embodiment of the semiconductor element mounting component of the present invention.

FIG. 16 is a side view showing the state of the same through hole before a conductive layer is formed on the inner surface of the through hole.

17 is a plan view showing the main surface side of the semiconductor element mounting member of the above example.

Fig. 18 is a bottom view showing the external connection surface side.

FIG. 19 is an enlarged plan view of the through-hole portion before the insulating member serving as the base of the semiconductor element mounting member of the above-described example is cut from the collective substrate.

Fig. 20 is a sectional view taken along line B-B of Fig. 19 .

FIG. 21 is an enlarged plan view of a deformation portion of a through hole.

Fig. 22 is a sectional view taken along line B-B in Fig. 21 .

Detailed ways

1 is a partially enlarged plan view of an aggregate substrate 1 serving as a base of an imaging element mounting insulating member 2 as an example of an embodiment of the aggregate substrate 1 of the present invention. 2 is an enlarged cross-sectional view of the through-hole 11 in the collective substrate 1, and FIG. 3 is an enlarged cross-sectional view of the through-hole 11 in the insulating member 2 obtained by cutting the collective substrate 1. cutaway view. 4 is a plan view showing the main surface 21 side of the insulating member 2, FIG. 5 is a plan view showing the semiconductor element mounting part BL formed by joining the frame body 4 to the main surface 21, and FIG. Bottom view of the connecting surface 22 side. 7 shows that the imaging element PE1 as a semiconductor element is mounted on the element mounting region 21a on the main surface 21 of the insulating member 2 of the semiconductor element mounting part BL, and the translucent cover FL is bonded to the frame body 4. A cross-sectional view of the formed imaging device PE2.

Referring to FIG. 1 , the collective substrate 1 of this example is a flat substrate formed entirely of ceramics, and includes: a plurality of regions 1a that become plate-like insulating members 2 and have a prescribed planar shape (rectangular in the figure); and a certain The wide area 1b is provided between each area 1a in a vertical and horizontal matrix so as to divide the plurality of areas 1a, and is used for removal by a cutter. The one-dot dash line in the drawing is the boundary line L for dividing the regions 1a and 1b. A set of a plurality of (eight in the figure) through-holes 11 are formed across the boundary line L at positions corresponding to two mutually parallel sides of each region 1a.

The collective substrate 1 is preferably manufactured by firing a precursor ceramic precursor (ceramic green sheet, etc.) into a flat plate shape, and then forming the through-holes 11 by post-processing. Thereby, the through-hole 11 can be formed with high precision which is difficult to form by the conventional co-firing method.

Referring to FIG. 2, the inner surfaces forming each through-hole 11 are constituted by first and second two tapered surfaces 11b, 11c, respectively. Among them, the first tapered surface 11b is formed from the main surface 21 side of the insulating member 2 (the upper side in the figure) to the smallest hole provided at one position in the thickness direction of the insulating member 2 and having a circular planar shape. The portion 11 a is formed in a conical shape such that the diameter of the opening gradually decreases, and a circular opening is formed on the main surface 21 . In addition, the second tapered surface 11c is formed in a conical shape from the external connection surface 22 side (lower side in the figure) of the insulating member 2 to the minimum hole portion 11a so that the diameter of the opening becomes gradually smaller, and , a circular opening is formed at the external connection surface 22 .

Various methods are conceivable as a method for forming the through-hole 11 having the shape shown in the figure in the collective substrate 1 that has been baked in advance and formed into a flat plate shape by subsequent processing, but the method using the sandblasting method is particularly preferable. to form. That is, referring to FIG. 1 and FIG. 2 , the circular area corresponding to the opening of the through hole 11 on the external connection surface 22 side of the collective substrate 1 is exposed, and the other area is protected by a resist film, and the sand blasting method is used to The exposed area of the collective substrate 1 is selectively perforated in the thickness direction to form the second tapered surface 11c. At the same time, similarly, on the main surface 21 side, the circular region corresponding to the opening of the through hole 11 is exposed, and the other regions are protected by the resist film, and the thickness direction is selectively sprayed by sandblasting. The exposed area of the collective substrate 1 is perforated to form the first tapered surface 11b.

Then, since the characteristic of the perforation realized by the sandblasting method is that the more the perforation advances, the smaller the opening size is, so the two tapered surfaces 11b, 11c are formed in a conical inclined shape, and the two tapered surfaces 11b, 11c The connecting portion becomes the smallest hole portion 11a, whereby the through hole 11 is formed. In the method, by adjusting the depth and diameter of the perforated holes for forming the two tapered surfaces 11b, 11c, the opening diameter of the minimum hole portion 11a, the thickness direction of the minimum hole portion 11a in the thickness direction of the insulating member 2 can be arbitrarily controlled. form position.

In the through hole 11 having the above shape, the first tapered surface 11b and the main surface 21 connected thereto intersect at an obtuse angle, that is, an angle _θ1 , and the second tapered surface 11c and the external connecting surface connected thereto 22 also intersect at an obtuse angle, the angle θ ₂ . Therefore, when forming the electrode layers 31 and 32 and the conductive layer 33 shown in FIG. The peeling of the metal layer or uneven film thickness at the corners of the second tapered surface 11c and the external connection surface 22 can reliably connect the electrode layers 31, 32 and the conductive layer 33 without poor contact. Therefore, the reliability of the imaging device PE2 can be improved.

In addition, if the two tapered surfaces 11b and 11c intersect at an acute angle in the through-hole 11, the adhesion of the metal layer at the corner portion where the two exist, that is, the smallest hole portion 11a, is reduced, and the conductive layer 33 is in the smallest hole. There is a possibility that the part 11a is partially interrupted, or the film thickness of the metal layer becomes non-uniform. In order to form the conductive layer 33 with a uniform thickness and good connection with the upper and lower parts of the smallest hole 11a, it is preferable that the two tapered surfaces 11b and 11c also intersect at an obtuse angle, that is, an angle _θ3 . In order to make the angle _θ3 of the two tapered surfaces 11b, 11c obtuse, the angle of the tapered surfaces of the two tapered surfaces 11b, 11c may be adjusted by adjusting the drilling conditions such as sandblasting.

The collective substrate 1 preferably has a thermal conductivity of 10 W/mK or higher. If the thermal conductivity is 10 W/mK or more, the heat dissipation of the semiconductor element mounting member BL will be improved, and it will be possible to cope with higher output of the imaging element PE1. Furthermore, it is preferable that the thermal expansion coefficient of the collective substrate 1 is 10×10 ⁻⁶ /°C or less. When the coefficient of thermal expansion is 10×10 ^-6 /°C or less, it is possible to prevent excessive stress from being applied to the imaging element PE1 during expansion and contraction due to thermal history or the like during element driving, resulting in damage or bonding of the element PE1. fall off.

Examples of materials forming the collective substrate 1 satisfying these conditions include insulating ceramics such as AlN, Al ₂ O ₃ , SiC, Si ₃ N ₄ , BeO, and BN, and Al ₂ O ₃ is preferable from the viewpoint of cost. However, in consideration of heat dissipation, the thermal conductivity of the collective substrate 1 is also within the above-mentioned range of 80 W/mK or more, particularly preferably 150 W/mK or more, and AlN or SiC is preferably used to achieve such a high thermal conductivity. In addition, in consideration of reducing the difference in thermal expansion coefficient with the imaging element PE1, it is preferable to use AlN or Al ₂ O ₃ .

Therefore, if the heat dissipation function and the like are most preferred, the composite substrate 1 can be formed of AlN among the above substances, but when the heat dissipation function is not so required, it is particularly preferable to form the composite substrate 1 with Al ₂ O ₃ . In addition, in consideration of mechanical strength and other physical properties of the collective substrate 1, or manufacturing costs, etc., the thermal conductivity of the collective substrate 1 is particularly preferably 300 W/mK or less within the above-mentioned range; the thermal expansion coefficient is also particularly preferably within the above-mentioned range. 4×10 ^-6 to 7×10 ^-6 /°C.

An electrode layer 31 for mounting semiconductor elements is formed on the main surface 21 of the collective substrate 1; an electrode layer 32 for connecting to other components is formed on the external connection surface 22; Conductive layer 33 between layers 31, 32 (FIGS. 1-6).

Among the above, a plurality of electrode layers 31 on the main surface 21 side are independently formed corresponding to the through-holes 11 . Furthermore, in the illustrated example, each electrode layer 31 is formed so as to extend from the through-hole 11 formed at a position corresponding to one of two sides of a rectangle parallel to each other in the region 1a serving as the insulating member 2 toward the other side. A rectangular shape extending in the direction of one long side. On the other hand, a plurality of electrode layers 32 on the side of the external connection surface 22 are also independently formed corresponding to each through hole 11, and each electrode layer 32 is formed from two rectangular sides parallel to each other in the region 1a to be the insulating member 2. The through-hole 11 formed at a position corresponding to one of the sides is in the shape of a rectangle extending toward the direction of the other long side. The conductive layer 33 is formed to cover the entire inner surface of the through hole 11 , and is connected to the electrode layer 31 on the main surface 21 side of the collective substrate 1 , and connected to the electrode layer 32 on the external connection surface 22 side.

In addition, the metal layer 5 is formed on the main surface 21 in a state where a gap g is provided so as not to be in contact with each electrode layer 31 . The metal layer 5 functions as a light-shielding layer, and together with the electrode layer 31 covers the region 21 a for mounting a semiconductor element surrounded by the frame 4 on the main surface 21 . That is, the metal layer 5 is used to block light incident from the rear of the imaging element PE1 mounted in the region 21 a through the insulating member 2 to improve the sensitivity of the imaging element PE1 .

Preferably, the electrode layer 31 and the metal layer 5 are formed to cover 80% or more of the area of the region 21a. Thereby, the electrode layer 31 and the metal layer 5 can fully function as a light-shielding layer. However, the plurality of electrode layers 31 need to be separated from each other, and the metal layer 5 also needs to be separated from each electrode layer 31 . Therefore, it is necessary to provide a gap g between the electrode layer 31 and the metal layer 5, and therefore, the electrode layer 31 or the metal layer 5 cannot cover 100% of the area of the region 21a, that is, the entire surface of the region 21a. If it is considered that between the electrode layer 31 and the metal layer 5, a sufficient gap g capable of preventing a short circuit between a plurality of electrode layers 31 is ensured, it is preferable that the electrode layer 31 and the metal layer 5 cover 95% or less of the area of the region 21a. way to form. In addition, if each electrode layer 31 is formed larger to cover 80 to 95% of the area of the region 21a, the metal layer 5 may be omitted.

Both the electrode layers 31 and 32 and the conductive layer 33 can be formed of conventionally known various metal materials having excellent conductivity. Furthermore, each layer can be formed into a single-layer structure or a multi-layer structure of two or more layers by various metal spraying methods such as wet plating or physical vapor deposition such as vacuum vapor deposition or sputtering. Since in the wet plating method, a metal film with a sufficient thickness can be formed by one treatment, the electrode layers 31, 32 and the conductive layer 33 can also be formed in a single-layer structure, but they can also be made of Cu or Ni, for example. On top of one or two base layers, a surface layer made of a highly conductive metal such as Ag or Au with a thickness of 0.1 to 10 μm is laminated to form a multilayer structure.

On the other hand, in the physical vapor deposition method, it is preferable to form the electrode layers 31, 32 and the conductive layer 33 into a multilayer structure in which a plurality of functionally separated layers are laminated. Examples of the multilayer structure include, for example, A three-layer structure in which the following layers are sequentially stacked on the side close to the collective substrate 1, said layers refer to:

(1) an adhesive layer that is made of Ti, Cr, NiCr, Ta, and compounds of these metals, etc., and has excellent adhesiveness with the collective substrate 1,

(II) A diffusion prevention layer composed of Pt, Pd, Cu, Ni, Mo, NiCr, etc., having a function of preventing the diffusion of metals forming the surface layer described below, and

(III) A surface layer composed of Ag, Al, Au, etc. and having excellent electrical conductivity.

Preferably, the adhesive layer has a thickness of 0.01 to 1.0 μm, the diffusion prevention layer has a thickness of 0.01 to 1.5 μm, and the surface layer has a thickness of about 0.1 to 10 μm.

In addition, the physical vapor deposition method and the wet plating method may be combined to form the electrode layers 31 and 32 and the conductive layer 33 into a multilayer structure. For example, on the basis of forming the adhesion layer and the diffusion prevention layer by physical vapor deposition, a base layer composed of Cu or Ni is formed by wet plating, and then formed by physical vapor deposition or wet plating. , Al, Au and other surface layers with excellent electrical conductivity.

On the surface of the electrode layer 31 on the main surface 21 side, in order to improve the reliability when connecting the mounted imaging element PE1 and each terminal by wire bonding WB, for example, a bonding pad (bonding pad) made of Au or the like may be provided. . In addition, on the surface of the electrode layer 32 on the external connection surface 22 side, in order to improve the reliability of surface mounting by, for example, soldering between electrode layers provided on a substrate such as a digital camera, a layer made of Au or the like may be provided. Consists of a solder joint layer.

In addition, as mentioned above, when Au is used as a conductive material to form the electrode layers 31, 32 with a single-layer structure, or to be arranged on the outer surfaces of the electrode layers 31, 32 with a multi-layer structure, soldering can also be omitted. pad or on the solder joint layer. Furthermore, since the metal layer 5 and the electrode layer 31 are formed on the same surface, it is only necessary to form the metal layer 5 so as to have the same layer configuration at the same time as the electrode layer 31 is formed. However, since the metal layer 5 only needs to function as a light-shielding layer, for example, even when the electrode layer 31 is formed in the above-mentioned multilayer structure, the metal layer 5 may be formed as a single layer having a sufficient thickness. layer structure.

For patterning the electrode layers 31, 32 and the metal layer 5, for example, as long as a metal mask or a mask based on photolithography is used, the selective metallization is not carried out by the wet plating method or the physical evaporation method. The mask only needs to cover and expose the surface of the collective substrate 1 . Furthermore, in order to form the electrode layers 31 and 32 into a multilayer structure, it is only necessary to repeatedly perform metallization by different metals on the exposed surface of the collective substrate 1 . And, the conductive layer 33 should not be masked as long as the electrode layer 31 or the metal layer 35 is formed on the main surface 21, or the electrode layer 32 is formed on the external connection surface 22, or both of the above operations are performed. The opening of the through-hole 11 is covered by the mold so as to be connected to the electrode layers 31 and 32 at the same time as the electrode layers 31 and 32 .

In order to manufacture a semiconductor element mounting part BL for mounting an imaging element PE1 as a semiconductor element using the collective substrate 1 on which the electrode layers 31, 32, the conductive layer 33, and the metal layer 5 are formed, the collective substrate is removed by a dicing machine or the like. The area 1b divided by the boundary line L in 1. In this way, the remaining regions 1 a are randomly separated to form a plurality of insulating members 2 . Then, if the frame body 4 is bonded to the main surface 21 of each insulating member 2 formed via the bonding layer B1 made of, for example, resin or low-melting glass, the following semiconductor element mounting part BL is produced, That is, the region 21a of the main surface 21 exposed through the through hole 41 of the housing 4 serves as an element mounting portion for mounting the imaging element PE1 as a semiconductor element ( FIGS. 4 to 7 ).

Then, a composite substrate including a plurality of regions to be frames 4 is manufactured in which a plurality of through-holes 41 are arranged in accordance with the formation intervals of the region 1a of the composite substrate, and is bonded to the region where the electrodes are formed via the bonding layer B1. After layers 31, 32, conductive layer 33, and metal layer 5 are placed on the main surface 21 side of the collective substrate 1, the area 1b in the collective substrate 1 and the area 1b of the collective substrate that will become the frame body 4 are also removed by a cutter or the like. In the region where 1b overlaps, a plurality of semiconductor element mounting parts BL in which the insulating member 2 and the frame body 4 are laminated can be manufactured.

Considering the prevention of deformation such as warping in the stacked state with the insulating member 2, or reducing the difference in thermal expansion coefficient with the semiconductor element, the frame body 4 preferably has a thermal expansion coefficient of 10×10 ^-6 /°C or less, particularly preferably 4×10 ^-6 to 7×10 ^-6 /°C, and the difference in thermal expansion coefficient with the insulating member 2 is 3×10 ^-6 /°C or less, particularly preferably 1×10 ^-6 /°C or less. . Furthermore, it is preferable to form the frame body 4 with the same material as the insulating member 2 so that the difference in thermal expansion coefficient can be completely eliminated. For example, when the insulating member 2 is made of AlN, it is preferable that the frame 4 is also made of AlN; when the insulating member 2 is made of Al ₂ O ₃ , it is preferable that the frame 4 is also made of Al ₂ O ₃ . In addition, when the semiconductor element is an imaging element, the frame body 4 is preferably formed of a light-shielding material in order to block unnecessary light incident through the frame body 4 .

Referring to FIG. 7, the imaging device PE2 of the present invention is configured such that the imaging element PE1 is mounted on the region 21a of the semiconductor element mounting member BL, and the terminal (not shown) of the imaging element PE1 is bonded via a wire bond WB. ), and the front end exposed in the region 21a of the electrode layer 31 are connected together, on the frame body 4 via the bonding layer B2 made of resin or low-melting glass, etc., a cover made of a light-transmitting material is bonded Body FL. According to this imaging device PE2, the imaging element PE1 can be sealed in a state where the imaging element PE1 is exposed through the cover FL. Each terminal of the imaging element PE1 is connected to an electrode layer or the like provided on a substrate of a digital camera or the like via a wire bond WB, an electrode layer 31 , a conductive layer 33 , and an electrode layer 32 .

FIG. 8 is an enlarged plan view of a part of the collective substrate 1 which is a precursor of the light-emitting element mounting insulating member 2 as another example of the embodiment of the collective substrate 1 of the present invention. 9 is an enlarged cross-sectional view of the through-hole 11 in the collective substrate 1 , and FIG. 10 is an enlarged cross-sectional view of the through-hole 11 in the insulating member 2 obtained by cutting the collective substrate 1 . 11 is a plan view showing the main surface 21 side of the insulating member 2, and FIG. 12 is a bottom view showing the external connection surface 22 side. 13 shows a light emitting diode component LE2 in which a light emitting element LE1 as a semiconductor element is mounted on the main surface 21 of the insulating member 2 of the semiconductor element mounting part BL, and is sealed with a phosphor and/or a protective resin FR as a sealing material. FIG. 14 is a cross-sectional view showing a light-emitting diode LE3 in which a light-emitting diode component LE2 is mounted in a package 7 .

Referring to FIG. 8 , the collective substrate 1 of this example is also a plate-shaped substrate formed of ceramics as a whole, including: a plurality of regions 1a having a predetermined planar figure (rectangular shape in the figure) as a plate-shaped insulating member 2; and The regions 1b having a fixed width for removing the plurality of regions 1a by cutting are provided in a vertical and horizontal matrix between the regions 1a. The dashed-dotted line in the drawing is a boundary line L for dividing the regions 1a and 1b. A set of a plurality of (three in the drawing) through-holes 11 are formed in the vicinity of the boundary line L at positions corresponding to two sides in the longitudinal direction in the drawing parallel to each other in each region 1a.

The collective substrate 1 is also preferably fabricated by firing a precursor (ceramic green sheet, etc.) into a flat plate and then forming the through-holes 11 by subsequent processing, as in the previous example. Accordingly, the through-hole 11 can be formed with high positional accuracy, which is difficult to form by the conventional co-firing method. Furthermore, the electrode layers 31 and 32 and the conductive layer 33 are also preferably formed on the surface of the aggregate substrate 1 after firing. In this case, an Al layer that is difficult to form by plating may be formed as the electrode layer 31 on a base layer made of Mo or W formed by a co-firing method that has excellent light reflectance.

Referring to FIG. 9, the inner surface forming each through hole 11 is composed of first and second two tapered surfaces 11b, 11c, respectively. Among them, the first tapered surface 11b is formed from the main surface 21 side of the insulating member 2 (the upper side in the figure) to the smallest hole 11a provided at one place in the thickness direction of the insulating member 2 and having a circular planar shape. It is in the shape of a conical conical surface, so that the diameter of the opening gradually becomes smaller, and the opening at the main surface 21 is circular. In addition, the second tapered surface 11c is formed in a conical conical surface shape from the external connection surface 22 side (lower side in the figure) of the insulating member 2 to the minimum hole portion 11a so that the diameter of the opening becomes gradually smaller, and , the opening at the external connection surface 22 is circular.

Thus, the first tapered surface 11b and the main surface 21 connected thereto intersect at an obtuse angle, i.e. the angle _θ1 , and the second tapered surface 11c and the external connecting surface 22 connected thereto also intersect at an obtuse angle, i.e. the angle θ ₂ intersection, therefore, when forming the electrode layers 31 and 32 and the conductive layer 33 by, for example, physical vapor deposition, printing, plating, etc., the corners of the first tapered surface 11b and the main surface 21, and the The metal layer at the corner of the tapered surface 11c and the external connection surface 22 is peeled off or has uneven film thickness. Therefore, the electrode layers 31 , 32 and the conductive layer 33 can be reliably connected without occurrence of contact failure, thereby improving the reliability of the light emitting diode component LE2 and the light emitting diode LE3 .

Referring to FIG. 10, when the conductive layer 33 is formed on the inner surface of the through-hole 11, the part of the smallest hole 11a is filled with the accumulation of the conductive material 33a forming the conductive layer 33, and the collection is closed in the state before the cutting state. The thickness direction of the substrate 1. Thus, as described above, in the next step, when the light-emitting element LE1 mounted on the main surface 21 of each insulating member 2 of the aggregate substrate 1 is sealed with the phosphor and/or the protective resin FR as the sealing material, Therefore, it is possible to prevent the phosphor and/or protective resin FR from leaking to the back surface of the collective substrate 1 through the through hole 11 .

However, when the conductive layer 33 is formed, if peeling of the metal layer or uneven film thickness occurs in the portion of the through hole 11 that is the smallest hole portion 11a at the corner of the tapered surfaces 11b, 11c, there may be a possibility of passing through. There is a possibility that the conductive material 33a cannot well fill the minimum hole portion 11a. In consideration of satisfactorily filling the smallest hole 11a with the conductive material 33a, it is preferable that the two tapered surfaces 11b and 11c also intersect at an obtuse angle, that is, an angle _θ3 . In order to make the angle _θ3 formed by the two tapered surfaces 11b, 11c an obtuse angle, it is only necessary to adjust the inclination angles of the two tapered surfaces 11b, 11c by adjusting the conditions of perforation by sandblasting or the like.

Referring to FIG. 8 and FIG. 9, the second tapered surface 11c in the through hole 11 is formed between the region 1a to be the insulating member 2 of the collective substrate 1 and the region 1b between the regions 1a. The position of the boundary line L. And if each area 1a is cut out by removing the area 1b by a cutter or the like, then as shown in FIGS. The conductive layer 33 formed on the inner surface is exposed through the opening 11d. Therefore, the exposed conductive layer 33 functions as a solder flange (fillet), and when the light-emitting diode component LE2 is mounted on other components by soldering, for example, the package 7 of the light-emitting diode LE3 shown in FIG. At this time, the electrode layer 32 for external connection can be assisted by the formed solder bump, thereby improving the reliability of mounting.

For the collective substrate 1 in which the through-holes 11 having such a shape are preliminarily baked into a flat plate shape, it is preferable to adopt the above-described forming method by the sandblasting method as a forming method in subsequent processing. By adjusting the perforation depth and perforation diameter of the two tapered surfaces 11b and 11c in the above method, the opening diameter of the smallest hole 11a and the formation position of the smallest hole 11a in the thickness direction of the insulating member 2 can be arbitrarily controlled.

Referring to FIG. 9, the formation position of the minimum hole portion 11a in the thickness direction of the insulating member 2 controlled as described above is represented by the distance h from the main surface 21 to the minimum hole portion 11a, preferably exceeding the distance h of the insulating member 2. The range of 0 times and 2/3 times or less of thickness _t0 . Thus, it can be ensured that the tapered surfaces 11b, 11c are above and below the minimum hole portion 11a, the first tapered surface 11b and the main surface 21 intersect at an obtuse angle, that is, the angle θ ₁ , and the second tapered surface 11c and the external connecting surface 22 also intersects at an obtuse angle, that is, an angle _θ2 , whereby the electrode layers 31, 32 and the conductive layer 33 formed thereon can be reliably connected.

Moreover, the exposed area of the conductive layer 33 in the second tapered surface 11c, which is closer to the external connection surface 22 side than the minimum hole portion 11a and connected to the electrode layer 32, can be ensured. The function of the forming part of the flange. In addition, by using the sandblasting method, the first and second tapered surfaces 11b, 11c formed from both sides of the collective substrate 1 are connected, and the through hole 11 can be reliably formed without deformation or the like. In addition, in consideration of sufficiently securing the exposed area of the conductive layer 33 functioning as a formation portion of the solder bump in the second tapered surface 11c, the distance h is more preferably equal to the thickness t of the insulating member 2 _. Less than 1/2 times of that. Furthermore, in order to reliably form the through-hole 11 by the above-mentioned forming method, it is more preferable that the distance h is about 5 μm to 50 μm.

Furthermore, referring to FIG. 9 , it is preferable that the opening diameter d of the smallest hole portion 11 a is 10 μm or more. The minimum hole portion 11a having an opening diameter d of 10 μm or more can form the through-hole 11 with high precision by a normal processing method such as the above-mentioned sandblasting method. In addition, each through-hole 11 can be formed in a state where the opening diameter d of the minimum hole portion 11a is uniform. Since no other processing steps are required to form the minimum hole portion 11a, the productivity of the semiconductor element mounting part BL is improved. Cost reduction can be realized.

Furthermore, it is preferable that the opening diameter d of the smallest hole portion 11a is 200 μm or less. If the opening diameter d is 200 μm or less, when the conductive layer 33 is formed on the inner surface of the through hole 11, the smallest hole portion 11a can be more efficiently filled with the conductive material 33a, so that the phosphor and/or protection can be prevented more reliably. Leakage of resin FR, etc.

In addition, considering that the minimum hole portion 11a of the through-hole 11 is more reliably penetrated by a normal processing method such as sandblasting, and that the conductive layer 33 is formed on the inner surface of the through-hole 11, it is more efficiently filled with the conductive material 33a. As for the smallest hole portion 11a, the opening diameter d of the smallest hole portion 11a is preferably 50-150 μm, more preferably 75-125 μm.

In consideration of improving the heat dissipation of the semiconductor element mounting part BL and corresponding to the high output of the light emitting element LE1, the thermal conductivity of the collective substrate 1 is preferably 10 W/mK or more, more preferably 80 W/mK or more, and particularly preferably 150 W/mK or more. Furthermore, considering the balance of mechanical strength and other physical properties, or manufacturing cost, it is preferable that the thermal conductivity of the collective substrate 1 is 300 W/mK or less.

In addition, in consideration of preventing excessive stress from being applied to the light-emitting element LE1 during expansion and contraction due to thermal history during element driving, causing damage to the light-emitting element LE1 and disengagement of the bonding, the composite substrate 1 is preferably thermally expanded. The coefficient is below 10×10 ^-6 /°C. In addition, considering the balance of mechanical strength and other physical properties, manufacturing cost, etc., the thermal expansion coefficient of the collective substrate 1 is preferably 4×10 ^-6 to 7×10 ^-6 /°C.

Examples of materials forming the collective substrate 1 satisfying these conditions include insulating ceramics such as AlN, Al ₂ O ₃ , SiC, Si ₃ N ₄ , BeO, and BN. Among them, AlN and SiC are particularly preferably used in order to achieve high thermal conductivity, and AlN and Al ₂ O ₃ are preferably used in order to reduce the difference in thermal expansion coefficient with the light emitting element LE1. Also, Al ₂ O ₃ is preferable in consideration of cost.

Referring to the above figures, an electrode layer 31 for mounting a semiconductor element is formed on the main surface 21 of the collective substrate 1; an electrode layer 32 for connecting to other components is formed on the external connection surface 22; A conductive layer 33 connecting between the two electrode layers 31 and 32 is formed.

The smallest hole portion 11 a of the through hole 11 is filled by depositing the conductive material 33 a forming the conductive layer 33 , and the through hole 11 before the insulating member 2 is cut out is closed in the thickness direction of the collective substrate 1 . Thus, when the light-emitting element LE1 is mounted on the electrode layer 31 and sealed, it is possible to prevent the phosphor and/or the protective resin FR from leaking to the opposite side through the through hole 11, and for example, the collective substrate 1 can be sealed without restriction. For a specific region on the main surface 21 side where the light emitting element LE1 is mounted, the entire surface is sealed with the phosphor and/or the protective resin FR, thereby further reducing the size of the light emitting diode component LE2.

The thickness t 1 of the minimum hole portion 11 a filled with the conductive material 33 a in the thickness direction of the aggregate substrate ₁ is preferably 1/50 to 1/2 times the thickness t ₀ of the aggregate substrate 1 . If the thickness _t1 is 1/50 or more of the thickness _t0 of the assembly substrate 1, it can reliably prevent the phosphor and/or the protective resin FR from leaking out due to the weight of the through hole 11 passing through the closed through hole 11 during sealing. to the external connection surface 22 side. In addition, if the thickness _t1 is not more than 1/2 of the thickness _t0 of the collective substrate 1, the exposed area of the conductive layer 33 on the side of the external connection surface 22 from the minimum hole portion 11a can be ensured, and thus, as a solder The forming portion of the flange can fully function.

In addition, if it is considered to further increase the exposed area of the conductive layer 33 functioning as the formation part of the solder bump, and more reliably prevent the penetration of the closed through-hole 11 due to its weight during sealing, the phosphor and the /or when the protective resin FR leaks to the external connection surface 22 side, it is more preferable that the thickness t ₁ of the smallest hole 11a filled with the conductive material 33a in the thickness direction of the aggregate substrate 1 is equal to the thickness t ₀ of the aggregate substrate 1. 1/20 to 1/5 times.

The thickness _t2 of the conductive layer 33 formed on the inner surface of the through-hole 11 is preferably 0.2 to 1.0 times the opening diameter d of the smallest hole 11a. If the thickness _t2 is at least 0.2 times the opening diameter d, when the conductive layer 33 is formed on the inner surface of the through-hole 11, the smallest hole 11a can be more efficiently filled with the conductive material 33a, so that the phosphor can be prevented more reliably. And/or leakage of protective resin FR, etc.

However, even if the thickness _t2 exceeds 1.0 times the opening diameter d, the above effect cannot be obtained, and the extra conductive material 33a is not required, so the efficiency of filling the smallest hole 11a may decrease instead. Therefore, it is preferable that the thickness _t2 is not more than 1.0 times the opening diameter d. In addition, in consideration of filling the smallest hole 11a with the conductive material 33a more efficiently, the thickness _t2 of the conductive layer 33 is preferably 0.3 to 0.5 times the opening diameter d of the smallest hole 11a.

Two electrode layers 31 for mounting semiconductor elements are formed separately from each other in the planar direction, and are provided in an insulated state on the main surface 21 side of the region 1 a serving as each insulating member 2 of the collective substrate 1 . Furthermore, two electrode layers 32 for external connection are also formed separately from each other in the plane direction, and are provided in an insulated state on the external connection surface 22 of the region 1a of each insulating member 2 of the collective substrate 1. side. Moreover, the two electrode layers 31 on the main surface 21 side and the two electrode layers 32 on the external connection surface 22 side are components corresponding to the front and back surfaces of the collective substrate 1, respectively, and are insulated via the two electrode layers 31 and 32. The conductive layers 33 formed on the inner surfaces of the through-holes 11 at three positions on the outer peripheral side of the region 1 a of the component 2 are connected.

Specifically, the planar shape of the electrode layer 31 is approximately rectangular, and the area around the opening extending from the side 31a of the electrode layer 31 in the direction of the through hole 11 to the main surface 21 side of the through hole 11 The extended electrode layer 31b and the conductive layer 33 on the inner surface of the through hole 11 are integrally formed and connected to each other. The electrode layer 32 having a substantially rectangular planar shape and partially overlapping the opening on the external connection surface 22 and the conductive layer 33 on the inner surface of the through hole 11 are also integrally formed and connected to each other.

Preferably, the total area of the electrode layers 32 provided on the external connection surface 22 accounts for 30% or more of the area of the external connection surface 22 . Thus, when the electrode layer 32 on the external connection surface 22 side of the semiconductor element mounting part BL and the electrode layer provided between the package 7 of the light-emitting diode LE3 and the substrate of the surface light emitter, the light-emitting diode is constituted by soldering. When the component LE2 is surface-mounted, sufficient heat dissipation paths between the semiconductor element mounting component BL and the package 7 and the substrate can be ensured, so that the output of the light emitting diode LE3 can be increased.

In addition, in consideration of securing a sufficient heat dissipation path, the ratio of the total area of the electrode layers 32 to the area of the external connection surface 22 is preferably 50% or more, more preferably 70% or more. However, when considering that two or more electrode layers 32 are formed apart from each other in the plane direction as described above, to ensure sufficient insulation between the two electrode layers 32, it is preferable that the total area of the electrode layers 32 occupies 100% of the total area of the external connection surface 22. The proportion of the area is 90% or less.

As mentioned above, the electrode layers 31 and 32 and the conductive layer 33 can be formed of a single-layer structure or a multi-layer structure of two or more layers using a metal material having excellent conductivity. For patterning the electrode layers 31 and 32, the same method as described above can also be used. A reflective layer made of Ag, Al or Al alloy may also be provided on the surface of the electrode layer 31 to reflect light from the light emitting element LE1 with high reflectivity, especially short-wavelength light with a wavelength of 600 nm or less. Among them, Al is particularly suitable for the reflectance of short-wavelength light of 450 nm or less, and is preferable because it can increase the luminous efficiency of the short-wavelength light-emitting element LE1 used to emit white light in combination with a phosphor.

In addition, when these metals are used as conductive materials to form the electrode layer 31 with a single-layer structure or to be arranged on the outer surface of the electrode layer 31 with a multi-layer structure, the reflective layer may be omitted. Moreover, it is also possible to form the anti-solder bonding layer made of Au or the like described above on the surface of the electrode layer 32; it is also possible to form the electrode layer 32 of a single-layer structure by using Au as a conductive material, or to arrange it in multiple layers. Layer structure of the outer surface of the electrode layer 32 is omitted for the solder joint layer.

In order to use the collective substrate 1, the semiconductor element mounting part BL for mounting the light emitting element LE1 as a semiconductor element is manufactured, and the light emitting diode constituent part LE2 is formed on the electrode layer 31 included in each region 1a of the collective substrate 1, The light-emitting elements LE1 are respectively mounted, and the entire surface of the collective substrate 1 is sealed with phosphor and/or protective resin FR as a sealing material, and then the region 1b of the collective substrate 1 is removed by a cutter or the like. Then, the remaining regions 1a are scattered, and the semiconductor element mounting part BL is formed, and the light emitting diode component LE2 shown in FIG. 13 is obtained. Mounting of the light emitting element LE1 is performed by soldering the electrode layer 31 of the semiconductor element mounting member BL and the electrode layer (not shown) of the light emitting element LE1 via the solder layer SL.

Considering that the solder used for mounting the light emitting element LE1 can also be used to mount the light emitting diode component LE2 on the package 7 and the substrate in a subsequent process, it is preferable to use Au-Sn based solder with a relatively high melting point. Solder of Au-Ge system, Au-Si system, etc. In addition to soldering, the light emitting element LE1 may be mounted on the semiconductor element mounting member BL using Au bumps. Furthermore, after mounting the light emitting element LE1 on the semiconductor element mounting member BL using solder or adhesive paste, the light emitting element LE1 and the electrode layer 31 may be connected by wire bonding.

As the protective resin for sealing the light-emitting element LE1, conventionally known various protective resins such as epoxy-based and silicone-based protective resins can be used. In particular, when heat resistance, resistance to ultraviolet rays, and the like are taken into consideration, it is preferable to use a silicone-based resin. In addition, examples of the phosphor include conventionally known various phosphors that can emit white light in combination with a light-emitting element LE1 that emits short-wavelength light such as 600 nm or less, particularly 450 nm or less. When the phosphor and the protective resin are used together, it is preferable to seal the light-emitting element LE1 mounted on the electrode layer 31 with the phosphor and then to cover the phosphor with the protective resin. Alternatively, a mixture of phosphor and protective resin can be used for sealing.

Preferably, the area of the semiconductor element mounting part BL, that is, in this example, the area of the main surface 21 and the external connection surface 22 of the insulating member 2, is the area of the light emitting element LE1 mounted on the main surface 21 (projection on the main surface 21). area) 1.1 to 4 times. When the area of the semiconductor element mounting part BL is more than four times that of the light emitting element LE1, its shape can be reduced as much as possible to realize space saving. Therefore, like conventional light-emitting element chips, there is a problem that the light-emitting diode component LE2 formed by mounting the light-emitting element LE1 on the main surface 21 side of the semiconductor element-mounting component BL cannot be assembled into a light-emitting element while handling it as a single component. Possibility of mounting the diode LE3 on the package 7 or on the substrate of the surface emitter. In addition, there is a possibility that the semiconductor element mounting part BL becomes too large, and the waste of material generated when the light emitting element LE1 fails is hardly changed compared with the case of the conventional package.

In particular, since the insulating member 2 made of a material with high thermal conductivity as described above is expensive, it is preferable that its area be as small as possible within the above-mentioned range. That is, the area of the semiconductor element mounting member BL is particularly preferably 3.5 times or less, more preferably 3.0 times or less, the area of the light emitting element LE1 within the above range in consideration of elimination of material waste.

Furthermore, since the area of the semiconductor element mounting member BL is smaller than 1.1 times the area of the light emitting element LE1, there is a possibility that the mounting operation of the light emitting element LE1 becomes difficult. In addition, there is a possibility that the sealing by the protective resin or the like becomes insufficient particularly on the side surface of the light emitting element LE1. In addition, in consideration of improving the workability of mounting, or more reliably sealing the light emitting element LE1 with a protective resin, etc., the area of the semiconductor element mounting part BL is within the above range, and is particularly preferably 1.3 times or more the area of the light emitting element LE1, More preferably, it is 1.5 times or more.

The thickness of the insulating member 2 is preferably 0.1 to 1 mm, more preferably 0.2 to 0.5 mm, in consideration of sufficiently ensuring strength and reducing the solvent of the semiconductor element mounting member BL as much as possible.

A surface light emitting body can be constituted by mounting a plurality of the light emitting diode components LE2 on a substrate. Furthermore, the light emitting diode component LE2 can also be used as the final form of the light emitting diode device. For example, solder can be mounted at a desired position on a circuit board such as a printed circuit board or a backlight component of a liquid crystal by a method such as reflow, and it can function as a light-emitting diode.

Moreover, referring to FIG. 14, if the light emitting diode component LE2 is mounted on the two electrode layers 72 provided on the bottom surface of the concave portion 7a of the package 7 having the concave portion 7a, The sealing cap or lens LS formed of the light material of LE2 seals the opening 7b of the concave portion 7a, and the light emitting diode LE3 can be obtained.

The mounting of the light emitting diode component LE2 is performed by soldering the electrode layer 32 of the semiconductor element mounting component BL and the electrode layer 72 of the package 7 via the solder layer SL1. At this time, since a part of the molten solder is formed on the inner surface of the second tapered surface 11c in the through hole 11, it detours to the exposed conductive layer 33 on the side surface 23 of the insulating member 2, and the solder bump SL2 is formed. , so that the reliability of the installation is improved.

The package 7 includes a substrate 70 on which an electrode layer 72 is formed on the upper side in the figure, and a reflective member 71 laminated on the substrate 70 and having a through hole serving as a concave portion 7a. Furthermore, the through hole of the reflective member 71 is formed in a spindle shape expanding outward from the bottom surface side toward the opening 7b side, and the inner surface thereof serves as a reflective surface 71a. Furthermore, the light from the light emitting diode component LE2 is reflected toward the opening 7b by the surface of the reflection surface 71a, and can be more efficiently radiated to the outside of the package 7 through the lens LS.

As the substrate 70 , an insulating and heat-resistant substrate such as a ceramic substrate or a glass epoxy substrate can be used. In addition, in order to efficiently reflect light from the light emitting diode component LE2 , as the reflective member 71 , a member formed of metal as the whole or at least the reflective surface 71 a is used.

The through hole 11 in FIG. 9 may be formed at a position where the entirety of the through hole 11 enters the region 1 a of the collective substrate 1 . In this case, since the tapered surface 11c is not exposed on the side surface 23 of the insulating member 2, there is no need for the conductive layer 33 formed on the tapered surface 11c to function as a solder bump forming portion. Therefore, the through hole 11 can also be completely filled with the conductive material 33a.

15 is an enlarged side view of the portion of the through hole 11 in the direction of V in FIG. 17 in another example of the embodiment of the semiconductor element mounting part BL of the present invention. A side view of the state of the same through hole 11 before the conductive layer 33 . 17 is a plan view showing the main surface 21 side of the semiconductor element mounting component BL of the above example, and FIG. 18 is a bottom view showing the external connection surface 22 side. 19 is an enlarged plan view of the through hole 11 before cutting the insulating member 2 which is the base of the semiconductor element mounting part BL of the above example from the collective substrate 1, and FIG. 20 is a cross-sectional view taken along line B-B of FIG.

Referring to these drawings, the configuration of the semiconductor element mounting component BL of this example is substantially the same as that of the previous example of FIGS. 8 to 14 except for the shape of the through hole 11 . That is, with reference to FIGS. 17 and 18, the semiconductor element mounting part BL of this example includes: a rectangular plate-shaped insulating part 2, one side of which is used as the main surface 21 for mounting the light emitting element, and the opposite side as the outer part for connecting with other parts. Connection surface 22; two electrode layers 31 for mounting light-emitting elements, which are formed apart from each other along the surface direction on the main surface 21 of the insulating member 2, and are provided in an insulated state; two electrodes for connecting to other components The layers 32 , which are formed apart from each other in the surface direction on the external connection surface 22 , are provided in an insulating state.

The two electrode layers 31 on the main surface 21 side and the two electrode layers 32 on the external connection surface 22 side are parts corresponding to the front and back sides of the insulating member 2 respectively, and are connected together via the conductive layer 33. The conductive layer 33 The inner surfaces of the through-holes 11 that penetrate the insulating member 2 in the thickness direction are formed at one position on the outer peripheral edge side of the insulating member 2 of both electrode layers 31 and 32 .

Specifically, its planar shape is approximately rectangular, and the electrode layer 31 covering the entire surface of the main surface 21 and the conductive layer on the inner surface of the through hole 11 are covered except for a gap having a certain width between the two electrode layers 31. 33 are integrally formed and connected to each other. Furthermore, the planar shape of the electrode layer 32 formed in a substantially rectangular shape extends from one side 32 a of the electrode layer 32 toward the through hole 11 to reach the extension around the opening of the through hole 11 on the side of the external connection surface 22 . The electrode layer 32b and the conductive layer 33 on the inner surface of the through hole 11 are integrally formed and connected to each other.

In order to manufacture the semiconductor element mounting part BL and the light emitting diode component part LE2 on which the light emitting element LE1 is mounted on its main surface 21 and sealed by phosphor and/or protective resin, as in the previous example, prepare a The composite substrate 1 having the size of the component 2 is divided into a plurality of regions 1a to be insulating components 2 by the boundary line L, through-holes 11 are formed at predetermined positions, and an electrode layer 31 is formed on one surface. The electrode layer 32 is formed on the opposite surface, and the conductive layer 33 is formed on the inner surface of the through hole 11. Furthermore, after mounting the light-emitting element LE1 on the electrode layer 31 and sealing it with phosphor and/or protective resin FR as a sealing material, Each region 1a is cut separately.

15, FIG. 16, FIG. 19 and FIG. 20, the inner surface forming each through hole 11 is composed of first and second two tapered surfaces 11b, 11c, respectively. Among them, the first tapered surface 11b extends from the main surface 21 side of the insulating member 2 (the upper side in the figure) to a portion provided at one position in the thickness direction of the insulating member 2 and having an opening width d wider than that of the through hole 11. The small minimum hole portion 11 a having an oblong planar shape is formed in a tapered surface shape such that the opening width gradually becomes smaller, and an oblong opening is formed on the main surface 21 . In addition, the second tapered surface 11c is formed in a tapered surface shape from the external connection surface 22 side (lower side in the figure) of the insulating member 2 to the minimum hole portion 11a so that the opening width gradually becomes smaller. Also, an elliptical opening is formed at the external connection surface 22 .

The through-hole 11 is formed across two regions 1a delimited by the boundary line L on the collective substrate 1 and serving as the semiconductor element mounting part BL, and a region 1b removed by a dicing machine or the like therebetween. And, when the conductive layer 33 is formed on the inner surface of the through hole 11 shown in FIGS. In the state before cutting, the thickness direction of the collective substrate 1 is closed.

Therefore, when the light-emitting element LE1 is mounted on the electrode layer 31 and sealed, it is possible to prevent the phosphor and/or the protective resin FR from leaking to the opposite side through the through hole 11, so that, for example, it is possible to seal the assembly without restriction. The entire surface of a specific region of the substrate 1 on the main surface 21 side where the light emitting element LE1 is mounted is sealed with phosphor and/or protective resin FR, thereby further reducing the size of the light emitting diode component LE2.

Furthermore, when the region 1b is removed by a dicing machine or the like and each region 1a is cut out, as shown in FIGS. The conductive layer 33 formed on the inner surface of 11c is exposed through the opening 11d. Therefore, the exposed conductive layer 33 functions as a formation portion of the solder bump, and when the light emitting diode component LE2 is mounted on other components, such as the package 7 of the light emitting diode LE3, etc. by soldering, the The formed solder bump can assist the electrode layer 32 for external connection, thereby improving the reliability of mounting.

The through-hole 11 having the shape shown in the figure is also preferably formed by sandblasting. That is, if the shape of the area that is exposed without being protected by the resist film is formed in an oblong shape corresponding to the opening of the through hole 11 on the side of the surface to be the external connection surface 22 of the collective substrate 1, the surface is sandblasted by sandblasting. The exposed area of the assembly substrate 1 is selectively perforated in the thickness direction to form the second tapered surface 11c, and on the side opposite to the main surface 21, it also corresponds to the opening of the through hole 11. The shape of the exposed area protected by the resist film is formed into an oval shape, and the exposed area of the collective substrate 1 is selectively perforated in the thickness direction by sandblasting to form the first tapered surface 11b. The perforation by the sandblasting method is characterized in that the opening size becomes smaller as the perforation progresses, so that the through-hole 11 having the shape shown in FIGS. 19 and 20 is formed.

For the same reason as in the previous example, the dimensions of each portion of the through hole 11 are preferably set within the same range. That is, referring to FIGS. 15 and 16, the formation position of the minimum hole portion 11a in the thickness direction of the insulating member 2 is represented by a distance h from the main surface 21 to the minimum hole portion 11a, preferably exceeding the thickness of the insulating member 2. The range is 0 times to 2/3 times or less of t ₀ , more preferably not more than 1/2 times the thickness t ₀ of the insulating member 2 . Furthermore, it is more preferably about 5 μm to 50 μm. In addition, the opening width d of the smallest hole portion 11a is preferably 10 to 200 μm, more preferably 50 to 150 μm, and still more preferably 75 to 125 μm. In addition, the opening width d here refers to the direction perpendicular to the centerline between the centers of the semicircles connecting the two ends, corresponding to the elongated circles connecting the semicircles at both ends of the rectangular central part. width.

The thickness t ₁ of the smallest hole 11a in the thickness direction of the insulating member 2 filled with the conductive material 33a is preferably 1/50 to 1/2 times the thickness t0 of the insulating member 2, more preferably 1/20 to 1/2. /5 times. In addition, the thickness t ₂ of the conductive layer 33 formed in the plane of the through hole 11 is preferably 0.2 to 1.0 times, more preferably 0.3 to 0.5 times the opening width d of the smallest hole portion 11 a.

For the same reason as in the previous example, it is preferable to set the dimensions of each portion other than the through hole 11 within the same range. That is, the area of the main surface 21 and the external connection surface 22 of the insulating member 2 is preferably 1.1 to 4 times the area of the light emitting element LE1 mounted on the main surface 21 (the projected area on the main surface 21), more preferably 1.3 times. to 3.5 times, more preferably 1.5 to 3.0 times. In addition, the thickness of the insulating member 2 is preferably 0.1 to 1 mm, more preferably 0.2 to 0.5 mm.

The ratio of the total area of the electrode layers 32 provided on the external connection surface 22 to the area of the external connection surface 22 is preferably 30% or more, more preferably 50% or more, and still more preferably 70% or more. In addition, the ratio is preferably 90% or less.

The electrode layers 31, 32 and the conductive layer 33 can use conventionally known various metal materials with excellent conductivity, etc., and various metal materials such as wet plating, vacuum evaporation, sputtering, and other physical evaporation methods can be used. The spraying method forms a single-layer structure or a multi-layer structure of two or more layers. The electrode layer 31 is preferably formed of Ag, Al, or an Al alloy at least on its surface; and the electrode layer 32 is preferably formed of Au on at least its surface.

The insulating member 2 is preferably formed of ceramics with a thermal conductivity of 10 W/mK or higher and a thermal expansion coefficient of 10×10 ⁻⁶ /° C. or lower. The semiconductor element mounting member BL of this example including the ceramic insulating member 2 is preferably formed. After forming the plate-shaped composite substrate 1 from the ceramic precursor (ceramic green sheet) which is the precursor of the insulating member 2, through-holes 11, electrode layers 31, 32, and conductive layer 33 are formed on the composite substrate 1 through subsequent processing. made by the process.

As described above, the light-emitting diode component LE2 divides the collective substrate 1 having a size including a plurality of insulating members 2 into a plurality of regions 1a, forms through-holes 11 at predetermined positions, forms electrode layers 31 on one surface, and forms electrodes on the opposite surface. In the electrode layer 32, the conductive layer 33 is formed on the inner surface of the through hole 11, and the light emitting element LE1 is mounted on the electrode layer 31 in a state where the smallest hole portion 11a of the through hole 11 is filled with the volume of the conductive material 33a. After sealing with fluorescent substance and/or protective resin FR, each area|region 1a is cut out, respectively, and this is manufactured simultaneously with forming the semiconductor element mounting part BL.

Furthermore, a surface light-emitting body can be constituted by mounting a plurality of the light emitting diode components LE2 on a substrate. Furthermore, the light emitting diode component LE2 can also be used as the final form of the light emitting diode device. For example, solder can be mounted at a desired position on a circuit board such as a printed circuit board or a backlight component of a liquid crystal by a method such as reflow, and it can function as a light-emitting diode.

In addition, by soldering through the solder layer SL1, the light emitting diode component LE2 is mounted on the two electrode layers 72 provided on the bottom surface of the concave portion 7a of the package 7 in FIG. The opening 7b of the concave portion 7a is sealed by a sealing cap or a lens LS formed of a material that transmits light from the light emitting diode component LE2, and the light emitting diode LE3 can be obtained. At this time, since a part of the molten solder is formed on the inner surface of the second tapered surface 11c in the through hole 11, it detours to the exposed conductive layer 33 on the side surface 23 of the insulating member 2, and the solder bump SL2 is formed. , so that the reliability of the installation is improved.

As shown in FIGS. 21 and 22 , the inner surface of the through hole 11 may be a combination of the conical conical surface shape in FIGS. 9 and 10 and the conical surface shape in FIGS. 19 and 20 . That is, the inner surface of the through hole 11 in the figure is composed of: two first tapered surfaces 11b respectively provided in two adjacent regions 1a that become the semiconductor light emitting element mounting part BL; and the region 1b between the regions 1b therebetween, and one second tapered surface 11c connected to the two first tapered surfaces 11b via the two smallest hole portions 11a provided in the two regions 1a constitute.

In the above, the two first tapered surfaces 11b are respectively formed in a conical shape from the main surface 21 side (upper side in the figure) of the insulating member 2 to the two smallest hole portions 11a whose planar shape is circular. The shape is planar so that the diameter of the opening becomes gradually smaller, and, in each region 1a, a circular opening is formed at the main surface 21 . In addition, the second tapered surface 11c is formed in a tapered surface shape from the external connection surface 22 side (lower side in the figure) of the insulating member 2 to the two minimum hole portions 11a so that the planar shape is formed as At both ends of the rectangular central part, concentric semicircular ovals are respectively connected to the two minimum hole portions 11a, and the opening width of the previously defined ovals gradually becomes smaller, and, to straddle the adjacent In the state of the two regions 1 a and the region 1 b therebetween, an oblong opening is formed at the external connection surface 22 .

The through holes 11 are also preferably formed by sandblasting. That is, if the shape of the area that is exposed without being protected by the resist film is formed in an oblong shape corresponding to the opening of the through hole 11 on the side of the surface to be the external connection surface 22 of the collective substrate 1, the surface is sandblasted by sandblasting. The exposed area of the assembly substrate 1 is selectively perforated in the thickness direction to form the second tapered surface 11c, and the opposite surface side to be the main surface 21 is also corresponding to the opening of the through hole 11, and will not be covered. The shape of the area exposed by the protection of the resist film is formed into a circle, and the exposed area of the collective substrate 1 is selectively perforated in the thickness direction by sandblasting, and at both ends of the oblong circle of the second tapered surface 11c, A total of two first tapered surfaces 11b are formed one by one, and the hole size is smaller as the hole advances as it is perforated based on the sandblasting method. Hole 11.

When the conductive layer 33 is formed on the inner surface of the through hole 11, the part of the smallest hole 11a is filled with the accumulation of the conductive material 33a forming the conductive layer 33, and is closed in the thickness direction in the collective substrate 1 before dicing. Therefore, it is possible to prevent the phosphor and/or the protective resin FR from leaking to the opposite side through the through hole 11 . Furthermore, when the region 1b between the adjacent regions 1a is removed by a cutter or the like, and the region 1a is cut out as each insulating member, since the through hole 11 is formed on the inner surface of the second tapered surface 11c, The conductive layer 33 is exposed on the side surface 23 of the insulating member 2, so the conductive layer 33 can function as a solder bump forming portion. In addition, for the same reason as in the previous two examples, the dimensions of each part of the through hole 11 and the dimensions of other parts are preferably set within the same range.

The configuration of the present invention is not limited to the examples in the drawings described above, and various design changes can be made without changing the gist of the present invention.

Claims (20)

1. assembly substrate,

With one side as the interarea that is used for mounting semiconductor element and opposing face as a plurality of tabular insulating element of the outside joint face that is used for being connected with miscellaneous part, to arrange shape at grade, integrally formed by pottery, assigned position in becoming the zone of each insulating element, and stride across at least any one party in the position of boundary line between each zone and its exterior lateral area, be formed on the through hole of the thickness direction perforation of insulating element, and, form the inner face of each through hole, from the opening of described interarea side and outside joint face side to minimum aperture portion in a set positions of the thickness direction of insulating element, it is planar to form taper respectively, makes opening size diminish gradually.

2. assembly substrate as claimed in claim 1 is characterized in that,

Pyroconductivity is more than 10W/mK.

3. assembly substrate as claimed in claim 1 is characterized in that,

Thermal coefficient of expansion is 10 * 10 ^-6/ ℃ below.

4. assembly substrate as claimed in claim 1 is characterized in that,

After the tabular presoma to the predecessor that becomes assembly substrate burns till, form through hole and make.

5. assembly substrate as claimed in claim 1 is characterized in that,

By AlN, Al ₂O ₃Or SiC forms.

6. assembly substrate as claimed in claim 5 is characterized in that,

Thickness is 0.1～1mm.

7. assembly substrate as claimed in claim 1 is characterized in that,

The inner face that forms through hole is made of first taper surface and second taper surface, described first taper surface is according to the face from the interarea that becomes insulating element, minimum aperture portion to a place that is located at thickness direction, the mode that opening diameter diminishes gradually forms taper, at described opening, the face that described second taper surface forms according to the face from the outside joint face that becomes insulating element is to described minimum aperture portion, the mode that opening diameter diminishes gradually forms taper, at described opening; And the face of described first taper surface and the interarea that becomes insulating element that is attached thereto intersects the angle θ that forms ₁, second taper surface and the outside joint face that becomes insulating element that is attached thereto face intersect the angle θ that forms ₂, and described two taper surface angulation θ ₃Be the obtuse angle.

8. assembly substrate as claimed in claim 1 is characterized in that,

The distance h of the thickness direction till will be from the face of the interarea that becomes insulating element to minimum aperture portion is with respect to the thickness t of assembly substrate ₀, be set in satisfied

0＜h≤2/3t ₀

Scope in.

9. assembly substrate as claimed in claim 1 is characterized in that,

The flat shape of minimum aperture portion forms circle, and its opening diameter is 10～200 μ m.

10. assembly substrate as claimed in claim 1 is characterized in that,

Face at the interarea that becomes insulating element, set the zone that is used for mounting semiconductor element accordingly with each insulating element, and on described, to be arranged with other assembly substrate a plurality of through holes, that become a plurality of frameworks of surrounding described each zone accordingly stacked with each zone.

11. assembly substrate as claimed in claim 10 is characterized in that,

Assembly substrate and described other the thermal coefficient of expansion of assembly substrate are 10 * 10 ^-6/ ℃ below, and described other the thermal coefficient of expansion of assembly substrate and the difference of the thermal coefficient of expansion of assembly substrate 3 * 10 ^-6/ ℃ below.

12. assembly substrate as claimed in claim 10 is characterized in that,

In the face of interarea assembly substrate, that become insulating element, the metal level described, that comprise the electrode layer that mounting semiconductor element uses that is formed on more than 80% of area that exposes by described other the through hole of assembly substrate, each is used for the zone of mounting semiconductor element covers.

13. assembly substrate as claimed in claim 1 is characterized in that,

Comprise:

The electrode layer that is used for semiconductor element mounted thereon is formed at the interarea side in the zone that becomes insulating element;

Be used for the electrode layer that is connected with miscellaneous part, be formed at outside joint face side; With

Conductive layer is formed in the through hole, connects the electrode layer of interarea side and the electrode layer of outside joint face side.

14. assembly substrate as claimed in claim 13 is characterized in that,

At least a portion electrode layer, outer surface that is used for being connected with miscellaneous part is formed by Au.

15. assembly substrate as claimed in claim 13 is characterized in that,

At least a portion electrode layer, outer surface that is used for semiconductor element mounted thereon is formed by Ag, Au, Al or Al alloy.

16. assembly substrate as claimed in claim 13 is characterized in that,

The electrode layer that is used for semiconductor element mounted thereon forms the multi-ply construction that comprises as lower floor in turn in the side near assembly substrate:

(I) connect airtight layer by what the compound of Ti, Cr, NiCr, Ta or these metals constituted,

(II) diffusion that is made of Pt, Pd, Cu, Ni, Mo or NiCr prevents layer, and

(III) superficial layer that constitutes by Ag, Al or Au.

17. assembly substrate as claimed in claim 16 is characterized in that,

The thickness that connects airtight layer is 0.01～1.0 μ m, and diffusion prevents that the thickness of layer from being 0.01～1.5 μ m, and the thickness of superficial layer is 0.1～10 μ m.

18. assembly substrate as claimed in claim 13 is characterized in that,

Be used for the electrode layer of semiconductor element mounted thereon, be laminated with the Au pad.

19. assembly substrate as claimed in claim 13 is characterized in that,

The minimum aperture portion of through hole is formed the electric conducting material of conductive layer and fills, and described through hole is closed at thickness direction.

20. assembly substrate as claimed in claim 13 is characterized in that,

The integral body of through hole is formed the electric conducting material of conductive layer and fills, and described through hole is closed at thickness direction.

Images