CN1997261B - Electronic carrier board and its structure - Google Patents

Abstract

The invention discloses an electronic carrier plate and a packaging structure thereof, wherein the electronic carrier plate comprises a body, a plurality of welding pads which are arranged on the surface of the body in pairs, and a protective layer which covers the surface of the body. Compared with the prior art, the electronic carrier plate and the packaging structure thereof form a space for the circulation of the insulating resin between the pair of welding pads, so that the insulating resin material is fully distributed in the gap between the electronic element and the electronic carrier plate, the problems of air explosion and electrical bridging caused by air holes are avoided, the problems of air holes and subsequent air explosion are avoided, an electrical insulating barrier is formed between the pair of welding pads, the improper electrical bridging between the pair of welding pads is prevented, due to the fact that the electronic carrier plate and the packaging structure thereof can have the same wetting area, the tombstone phenomenon is avoided, meanwhile, the welding pad design with different plane sizes can be matched, and the welding pad areas exposed out of the protective layer are the same.

Description

Electronic carrier board and its structure

technical field

The present invention relates to an electronic carrier board and a structural structure, in particular to an electronic carrier board and a structural structure applied in Surface Mounted Technology (SMT).

Background technique

With the advancement of integrated circuit production technology, the design and production of electronic components continue to develop towards the trend of miniaturization, and because they have larger-scale and highly integrated electronic circuits, their product functions are also more complete.

In this case, the electronic components that are traditionally placed using Through Hole Technology (Through Hole Technology, THT) cannot be further reduced in size, thus occupying such as printed circuit boards (Printed Circuit Board; PCB), circuit boards (circuit board) or substrate (substrate) and other electronic carrier boards have a lot of space, plus the plug-in assembly technology needs to drill holes on the electronic carrier board corresponding to each pin position of each electronic component, so this type of electronic component connector The feet actually occupy the space on both sides of the electronic carrier board, and the solder joints at the connection between the electronic component and the electronic carrier board are also relatively large. Therefore, in the current electronic component assembly process, a large number of surface mount technology (Surface Mounted Technology; SMT) is used. Efficiently assemble electronic components on electronic carriers.

Electronic components using surface mount technology, because their electrical connection terminals (pins) are soldered on the electronic carrier board on the same side as the electronic component, therefore, there is no need for a large number of drills in the electronic carrier board like plug-in assembly technology. Holes are used for pin penetration of electronic components, that is, electronic components can be assembled on both sides of the electronic carrier board at the same time by using surface mount technology, which greatly improves the space utilization of the electronic carrier board. In addition, due to the electronic components of surface mount technology Compared with electronic components of traditional plug-in assembly technology, the number of electronic components using surface mount technology is denser on the electronic carrier board, and the cost of electronic components of surface mount technology is also cheaper. Therefore, it has become the mainstream of electronic components assembled on electronic substrates.

Furthermore, based on electrical and performance requirements, placing passive components such as capacitors, resistors, or inductors on electronic substrates has become indispensable for maintaining the electrical quality of electronic products. missing steps. Therefore, in line with the development of electronic products in the direction of light, thin, small, and low energy consumption, the plug-in components used in traditional electronic carrier boards must drill holes before soldering, and then fix them by welding after the component pins pass through. Due to the large size of electronic components, In addition, the pins cannot be too close together, and the dense solder joints on the back of the electronic substrate are difficult to effectively use. In recent years, they have been gradually replaced by surface-mounted chip components.

Please refer to Fig. 1A, it is the welding state between the surface mount type passive component and the substrate, and it is mainly formed on a predetermined position on the substrate 11 with a pair of spaced apart welding pads 12, and these two welding pads 12 are respectively Exposed to cover the solder mask (Solder Mask) 13 on the substrate 11, wherein the form of the solder pad 12 exposed to the solder mask 13 can be defined as a solder mask surrounded by a solder mask. Define, SMD) pad, or it can be a non-solder mask definition (Non-Solder Mask Define, NSMD) pad that fully exposes the pad. After applying an appropriate amount of solder paste (Solder Paste) 15, the two ends of a passive component 14 can be respectively bonded to the solder paste 15, and then reflow soldering (Reflow Soldering) is performed, and the passive component 14 can be The solder paste 15 is properly electrically connected to the pad 12 . Among them, in order to avoid the tombstone phenomenon (Tombstone) caused by the unbalanced solder paste 15 on both sides when the passive component 14 is connected to the solder pad 12, the size of the wetting area (wetting area) of the solder paste 15 is designed to be consistent. The sizes of the openings formed to expose the solder resist layers 13 of the two opposite solder pads 12 are all symmetrical to each other and have the same size.

When applied to semiconductor packages, due to the coating amount of solder paste 15 and the melting of solder paste 15 during reflow processing, it is difficult to precisely control the height of passive components 14. In addition, the surface of solder mask 13 is not smooth, and sometimes dents occur A gap (Clearance) 17 is often formed between the soldered passive component 14 and the solder resist layer 13, and the gap 17 is generally only 10 to 30μ in height, and the resin material of the encapsulation colloid covering the passive component 14 is filled with particles (Filler) The size (average size about 50μ) is generally larger than this gap height. Therefore, when the molding operation is filled with resin, the gap 17 at the bottom of the passive element 14 cannot be filled with resin, forming a void, which will cause a popcorn effect in the subsequent high-temperature working environment, and the entire structure will be damaged. The structure is damaged; or the molten solder paste may drill through the gap 17 (ie capillary phenomenon) to form a bridge, resulting in a short circuit of the passive component 14 (as shown in FIG. 1B ), thereby affecting the yield of the finished product.

For this reason, please refer to Fig. 2, a kind of passive element assembling method of No. 442934 of Chinese Taiwan Patent Announcement, it is to utilize an electrical insulation substance 28 such as epoxy resin, fill the possible existence between passive element 24 and substrate 21 air holes to avoid gas explosion and electrical bridging problems. This method will increase the process steps and cost, which is not economical.

Please also refer to FIG. 3 , the technology of U.S. Patent No. 6,521,997 is to add a groove (Groove) 330 at the same time when forming the opening of the solder resist layer 33 between the opposing pads 32, and to expand the gap for the resin to pass through by opening the groove 330 .

However, the opening of the trench 330 is limited by the low resolution of the photosensitive solder mask layer 33, and its width can only be opened to a minimum of 150 microns, and due to the mask alignment accuracy of the solder pad opening As a limitation, the pad solder mask width M needs to be at least 75 microns wide. Therefore, as components shrink in size, it becomes more difficult to create trenches between the limited pad pitches.

At the same time, the size specifications of passive components currently used in the semiconductor industry (such as 0603 or 0402) generally represent the length and width of the passive component by two sets of numbers. units, and the higher number is arranged first. Take the 0402-type chip passive component as an example. 0402 is a passive component with specific specifications. The size of the component is 0.040 inches (length) x 0.020 inches (width). If converted into metric units, it is equivalent to the length 0.040x25.4= 1.016 cm (about 1000 microns), a width of 0.020x25.4 = 0.508 cm (about 500 microns), and a chip-type capacitor, resistor or inductor with a height of 500 microns in general.

However, with the gradual development of semiconductor products in the direction of lightness, thinness, shortness, and smallness, the thickness of the encapsulant (Encapsulant) of Thin & Fine Ball Grid Array (TFBGA) has grown to 530 microns. Therefore, In the future, thin packages will inevitably be unable to accommodate 0402-type chip passive components with a thickness of 500 microns, and must be replaced with smaller-sized 0201-type chip passive components to reduce the overall thickness of the package. The length, width, and height of the 0201-type chip passive components are half of the 0402-type chip passive components, that is, 500 microns (length) x 250 microns (width) x 250 microns (height), in order to match the length of the 0201 small-size passive components (500 microns), the spacing (Spacing) A1 between two pairs of pads on the substrate is also reduced from 400 microns to 250 microns.

However, the solder mask is a photosensitive (Photoimage) material. Due to the low photosensitive resolution and the limitation of the mask alignment accuracy of the opening between the pads, the solder mask of the solder pad must have a minimum width of 75 microns. At the same time, if a groove with a width of 150 microns is opened on the solder mask layer between the solder pads according to the technology proposed in the above-mentioned US Patent No. 6,521,997, as shown in Figure 4, the distance between the opening of the solder mask layer of each exposed solder pad and the groove The width A2 of the solder mask is only (250-150)/2=50 microns. Therefore, when the distance between the solder mask opening and the groove of the exposed pad is reduced to 50 microns, it is obviously beyond the minimum of 75 microns on the current substrate. The manufacturing capacity cannot be produced with the existing process.

To sum up, how to provide an electronic carrier board can avoid air holes and electrical bridging problems caused by the gap between the electronic component and the electronic carrier board when the electronic components are connected, and at the same time, it can be used in the existing process equipment It is an urgent problem to be solved in this industry to install small surface-mounted electronic components under the conditions.

Contents of the invention

In order to overcome the above-mentioned problems in the prior art, the main purpose of the present invention is to provide an electronic carrier and a structure that can effectively distribute the filling resin covering the electronic components between the electronic components and the electronic carrier to avoid Air cavity generation and electrical bridging problems.

Another object of the present invention is to provide an electronic carrier board and a construction structure, when 0201 type chip passive components are connected to it, the problems of air cavity, air explosion and electrical bridging will not occur.

Another object of the present invention is to provide an electronic carrier board and its assembly structure, which can use the existing carrier board process technology to solve the problem that the bottom packaging resin of 0201 or smaller surface mount (SMT) passive components cannot flow into the problem .

Another object of the present invention is to provide an electronic carrier board and assembly structure, which can solve the problem of process failure due to insufficient resolution of the solder mask layer when soldering 0201-type or smaller passive components.

Another object of the present invention is to provide an electronic carrier board and a structure to avoid tombstone phenomenon when electronic components are connected to the electronic carrier board.

In order to achieve the above and other objects, the present invention provides an electronic carrier board, which comprises: a main body; welding pads arranged in pairs on the surface of the main body; and a protective layer covering the surface of the main body, wherein the protective layer is formed with The opening exposes the welding pad, and a groove (groove) is formed between the pair of welding pads. One side of the paired pads and form a communication state with the opening on the side. Wherein, the length of the groove can be selected to be greater than or equal to the size of the opening; the solder pad can be selected to be completely, partially adjoined or not adjoined to the groove; the electronic carrier is a substrate, a circuit board or a printed circuit board etc., the protective layer is a solder mask, and the insulating resin is an encapsulation resin; the electronic component is a passive component, and the protective layer can wrap around the solder pad and only expose the central part of the solder pad, so as to constitute the definition of solder mask (Solder Mask Define, SMD) pad, or completely expose the pad to form a non-solder mask define (Non-Solder Mask Define, NSMD) pad; in addition, the exposed pad area of the protective layer opening is the same design , to avoid the tombstone phenomenon (Tombstone) when electronic components are placed on the electronic carrier.

The present invention also relates to an electronic carrier board, which includes: a body; a plurality of welding pads arranged in pairs on the surface of the body; and a protective layer covering the surface of the body, in which a plurality of openings are formed. Each of the pads is exposed for a plurality of electronic components to be adjacently placed on the paired pads, and a groove is formed between the paired pads, and the length of the groove is greater than that occupied by the plurality of adjacent electronic components. The width and eccentricity are placed on one side of the plurality of pairs of welding pads, and communicate with the plurality of openings on the side.

The present invention also relates to yet another electronic carrier board, which includes: a body; two welding pads arranged in rows opposite to each other on the surface of the body; and a protective layer covering the surface of the body, in the protective layer A plurality of openings are formed to expose each of the welding pads. Passive components for optional parallel and serial connection are placed on the row of welding pads, and grooves are formed between the rows of welding pads. The length of the groove is longer than that of the passive components. The width occupied by the component is eccentrically placed on one side of the row of pads, and communicated with a plurality of openings on the side.

The invention provides a construction structure of an electronic carrier board, which comprises: an electronic carrier board, the electric carrier board has a body, welding pads arranged in pairs on the surface of the body, and a pad covering the surface of the body A protective layer, an opening is formed in the protective layer to expose the welding pad, and a groove is formed between the pair of welding pads, the groove is eccentrically placed on one side of the pair of welding pads and formed with the opening on the side Connected state; electronic components are correspondingly placed on the pads that expose the opening of the protective layer, and the length of the groove is greater than the width of the electronic components; and insulating resin covers the electronic components and is fully distributed on the electronic components. In the gap between the component and the electronic carrier.

In addition, the present invention also proposes a welding pad structure, which is covered with a protective layer, and an opening is formed in the protective layer to expose a part of the welding pad. The opening is connected to a groove (groove), and the length of the groove is larger than the opening size. Wherein, the welding pad can be selected to be completely, partially or not adjacent to the trench.

Compared with the prior art, the electronic carrier board and its construction structure of the present invention make grooves formed between corresponding pairs of welding pads in the electronic carrier board, and make the grooves eccentrically placed on one side, and make the The groove communicates with the opening of the solder resist layer for exposing the solder pad on this side. Through this asymmetric design, under the resolution capability of forming a protective layer such as a solder resist layer, an insulating layer can be formed between the paired solder pads. The space for the resin to circulate, so that the insulating resin material can be effectively and fully distributed in the gap between the electronic component and the electronic carrier, so as to avoid air explosion and electrical bridging problems caused by air holes.

Therefore, when thin and small electronic components such as 0201-type chip passive components are placed on it, the asymmetric design can still be used to effectively fill the insulating resin material between the electronic components and the electronic carrier under the existing process conditions. board clearance. In this way, under the conditions of the existing process equipment, the insulating resin can be fully distributed on the lower side of the electronic component without hindrance, avoiding the generation of voids (Voids) and the subsequent problem of popcorn (popcorn), and between the paired pads Forms an electrically insulating barrier to prevent inappropriate electrical bridging between paired pads.

In addition, the area of the exposed solder pad in the present invention can be designed to be the same, so that when the subsequent electronic components are connected to the solder pad by surface mount technology through solder paste, they have the same wetting area (wetting area), avoiding the phenomenon of tombstoning ( Tombstone). It can be designed with pads of different plane sizes so that the area of the pad exposed to the protective layer is the same and provides the same wetting area.

Description of drawings

1A and 1B are schematic diagrams of the welding state between the existing surface mount passive components and the substrate;

Fig. 2 is a schematic diagram of passive component assembly of Taiwan Patent Announcement No. 442934;

Fig. 3 is a schematic diagram of assembly of passive components disclosed in US Patent No. 6,521,997;

Figure 4 is a schematic diagram of the comparison of the existing 0402-type chip passive components and 0201-type chip passive components welded to the substrate;

5A is a schematic plan view of Embodiment 1 of the electronic carrier board of the present invention;

5B and 5C are schematic cross-sectional and plan views of the structure of the electronic carrier shown in FIG. 5A;

6A and 6B are schematic plan views of Embodiment 2 of the electronic carrier board of the present invention, and a schematic cross-sectional view of Embodiment 2 of electronic components assembled on the electronic carrier board;

7A and 7B are schematic plan views of Embodiment 3 of the electronic carrier board of the present invention, and a schematic cross-sectional view of Embodiment 3 of electronic components assembled on the electronic carrier board;

8A and 8B are schematic plan views of Embodiment 4 of the electronic carrier board of the present invention, and a schematic cross-sectional view of Embodiment 4 of electronic components assembled on the electronic carrier board;

9A and 9B are schematic plan views of Embodiment 5 of the electronic carrier board of the present invention, and a schematic cross-sectional view of Embodiment 5 of electronic components constructed on the electronic carrier board;

Fig. 10 is a schematic plan view of Embodiment 6 of the electronic carrier board of the present invention;

11 is a schematic plan view of Embodiment 7 of the electronic carrier board of the present invention;

Fig. 12 is a schematic plan view of Embodiment 8 of the electronic carrier board of the present invention;

Figure 13 is a schematic plan view of Embodiment 9 of the electronic carrier of the invention; and

FIG. 14 is a schematic plan view of Embodiment 10 of the electronic carrier board of the present invention.

Detailed ways

Example 1

Please refer to FIG. 5A, FIG. 5B, and FIG. 5C, which are a schematic plan view of Embodiment 1 of the electronic carrier board of the present invention, and a schematic cross-sectional and plan view of Embodiment 1 of electronic components assembled on the electronic carrier board. Among them, it should be noted that Yes, the drawings are all simplified schematic diagrams, only illustrating the basic structure of the present invention in a schematic manner. Therefore, only elements related to the present invention are shown in the drawings, and the number, shape, and size ratio of the shown elements are not drawn in actual implementation, and the layout of the elements may be more complicated.

As shown in the figure, the electronic carrier 51 of the present invention includes: a body 511; a plurality of welding pads 52 arranged in pairs on the surface of the body 511; and a protective layer 53 for covering the surface of the body, the protective layer 53 Openings 530, 530' are formed in the middle to expose the welding pad 52, and an oval-shaped groove 54 not covered by the protective layer 53 is formed between the pair of welding pads 52, and the length of the groove 54 is longer than that welded to the forming The width of the electronic component of the pair of welding pads 52 is eccentrically placed on one side of the pair of welding pads 52 and forms a communication state with the opening 530 ′ of this side, wherein the welding pad 52 is completely adjacent to the groove 54 .

The electronic carrier 51 may be a packaging substrate, a circuit board, or a printed circuit board used for chip packaging. In this embodiment, the packaging substrate is mainly used as an example for illustration. The body 511 of the electronic carrier 51 can be an insulating layer or an insulating layer in which circuit layers are stacked at intervals, and a plurality of conductive circuits (not shown) and welding pads 52 are arranged on its surface, and some of the welding pads are two Two pairs set. The insulating layer is made of materials such as glass fiber, epoxy resin (Epoxy), polyimide film, FR4 resin and BT (Bismaleimide Triazine) resin, and the circuit layer is, for example, a copper layer.

The electronic carrier body 511 is covered with a protective layer 53 to protect the conductive circuit from external damage and pollution. The protective layer 53 is, for example, a solder mask, and the material of the solder mask is selected to have high fluidity. Polymer (Polymer), such as epoxy resin (Epoxy Resin), etc., and the protective layer 53 is formed with openings 530, 530' corresponding to the position of the welding pad to expose the welding pad 52. In this embodiment, the The solder pad 52 exposed from the protection layer 53 may be a solder mask defined (Solder Mask Define, SMD) solder pad surrounded by a solder mask.

In addition, an elliptical groove 54 is formed in the protective layer corresponding to the pairs of welding pads. The groove 54 is eccentrically placed on one side of the pair of welding pads 52 and connected to the opening 530' on the side. A connected state is formed, and the length of the trench 54 is greater than the width of the electronic components soldered to the pair of pads 52 . In addition, the groove 54 can be in other shapes besides the ellipse shown in the figure, and it is not limited thereto.

As shown in FIG. 5B and FIG. 5C, the present invention also provides a construction structure of an electronic carrier board, which includes: an electronic carrier board 51, wherein the electrical carrier board 51 has a body 511, a plurality of For the welding pad 52 provided on the surface of the main body, and a protective layer 53 for covering the surface of the main body, the protective layer 53 is formed with openings 530, 530' to expose the welding pad 52, wherein the pair of welding pads A groove 54 is formed between 52, the length L of the groove 54 is greater than the width W of the electronic component 55, and it is placed eccentrically on one side of the pair of pads and forms a communication state with the opening 530' on this side; an electronic Component 55 is correspondingly placed on the pad 52 that exposes the opening of the protective layer; and an insulating resin 57 covers the electronic component 55 and is fully distributed in the gap between the electronic component 55 and the electronic carrier 51 .

After the solder pads 52 are respectively coated with conductive materials 56 such as solder paste, the two ends of an electronic component 55 can be placed on the solder paste, and then the reflow operation is carried out so that the electronic component 55 can be soldered by the solder paste. soldered to the pad 52 to form an electrical connection. The electronic component 55 is a passive component, and can be, for example, a 0201-type or smaller chip passive component. In this embodiment, the 0201-type chip passive component is used as an example for illustration. Set, the distance S1 between the two exposed pads 52 arranged in pairs is 250 microns, the width S3 of the connected part of the groove 54 and the opening 530' is limited by the resolution of the solder mask layer, the minimum is 150 microns , so the solder mask width S2 of the opening 530 will have 250-150=100 microns, which is far greater than the minimum width limit of 75 microns. In this way, when the packaging substrate carrying the 0201-type chip passive components is subjected to the molding process, it is used for cladding The fluid insulating resin 57 of the passive element, such as epoxy resin, can effectively flow into the space formed by the communication between the groove 54 and the opening 530', and then be fully distributed in the gap between the 0201-type chip passive element and the packaging substrate, Avoid the generation of Voids and subsequent gas explosion in the thermal environment, and form an electrical insulation barrier between the paired pads to prevent improper electrical bridging between the paired pads.

Compared with the prior art, the electronic carrier board and its assembly structure of the present invention are such that grooves are formed between corresponding pairs of welding pads in the electronic carrier board, and the length of the grooves is greater than the width of the electronic components. And it is placed eccentrically on one side, and at the same time, the groove communicates with the opening of the solder mask layer that exposes the solder pad on this side. Through this asymmetric design, under the minimum width of the solder mask layer of the solder pad 75 microns A space for the insulating resin to flow is formed between the paired pads, so that the insulating resin material is effectively and fully distributed in the gap between the electronic component and the electronic carrier board, and the air explosion and electrical bridging problems caused by the generation of air holes are avoided.

Therefore, when thin and small electronic components such as 0201-type chip passive components are placed on it, the asymmetric design can still make the insulating resin material available under the existing process conditions with a minimum solder mask width of 75 microns It effectively fills the gap between electronic components and electronic carrier boards, and there will be no gas explosion and electrical bridging problems. In this way, existing process equipment can be used to effectively form grooves under the electronic components, and the insulating resin can be fully distributed on the underside of the electronic components without hindrance, avoiding the generation of voids and subsequent popcorn problems , and form an electrical insulation barrier between the paired pads to prevent improper electrical bridging between the paired pads.

In addition, the area of the exposed pad in the present invention can be designed to be the same, so that when the subsequent electronic components are connected to the pad by surface mount technology through solder paste, they have the same wetting area (wetting area), avoiding tombstoning Phenomenon (Tombstone).

Example 2

Please refer to FIG. 6A and FIG. 6B , which are schematic plan views of Embodiment 2 of the electronic carrier board of the present invention, and a schematic cross-sectional view of Embodiment 2 of constructing electronic components on the electronic carrier board.

The electronic carrier board and its assembly structure of Embodiment 2 of the present invention are substantially the same as those of Embodiment 1 above, the main difference is that the corresponding openings 530, 530' formed in the protective layer (solder resist layer) 53 are larger in size than the solder pads 52, the solder pad 52 is completely exposed to the protection layer 53, thereby forming a non-solder mask defined (NSMD) solder pad.

Similarly, when a passive component such as a 0201 type chip is correspondingly connected, the distance S1 between the exposed pads 52 is 250 microns, and the distance S4 between the edge of the opening 530 and the edge of the non-solder mask layer defines the pad 52 is 25 microns, and the opening 530 'The space width S3 formed by communicating with the groove 54 has a minimum width of 150 microns, then the minimum width S2 of the solder resist layer still has 250-25-150=75 microns, so it can effectively flow in the insulating resin, and then the insulating resin 57 can be effectively Fully distributed between the electronic components 55 and the electronic carrier 51 .

Example 3

Please refer to FIG. 7A and FIG. 7B , which are schematic plan views of Embodiment 3 of the electronic carrier board of the present invention, and schematic cross-sectional views of Embodiment 3 of constructing electronic components on the electronic carrier board.

The electronic carrier board and its assembly structure of Embodiment 3 of the present invention are substantially the same as Embodiment 1 above, the main difference is that the groove 54 is rectangular.

It should also be noted that the solder pads 52 exposed from the protection layer 53 may be solder mask defined solder pads or non-solder mask defined solder pads, which are not limited by this drawing.

Example 4

Please refer to FIG. 8A and FIG. 8B , which are schematic plan views of Embodiment 4 of the electronic carrier board of the present invention, and schematic cross-sectional views of Embodiment 4 of constructing electronic components on the electronic carrier board.

The electronic carrier board and its assembly structure of Embodiment 4 of the present invention are substantially the same as those of Embodiment 3 above, the main difference being that the size of the opening 530 is larger than the size of the solder pad 52, that is, the solder pad 52 that exposes the protective layer 53 is surrounded by Non-Solder Mask Defined (NSMD) pads with the solder mask fully exposed. And the size of the opening 530 is larger than the size of the opening 530', and the pads 52 exposed from the protective layer openings 530 and 530' have the same area, providing the same wetting area.

Example 5

Please refer to FIG. 9A and FIG. 9B , which are schematic plan views of the fifth embodiment of the electronic carrier board of the present invention, and a schematic cross-sectional view of the fifth embodiment of electronic components assembled on the electronic carrier board.

The electronic carrier board and its assembly structure of Embodiment 5 of the present invention are substantially the same as those of Embodiment 3 above, the main difference lies in the openings 530 and 530 ′ correspondingly formed in the protective layer (solder resist layer) 53, and the groove The size of the opening 530' connected to 54 is larger than the size of the pad 52, that is, the pad 52 that exposes the protective layer 53 is in the form of a non-solder mask definition (NSMD) pad that completely exposes the solder mask around it, corresponding to another The size of an opening 530 is smaller than that of the pad 52 , that is, the pad 52 exposed from the protective layer 53 is in the form of a solder mask defined (SMD) pad surrounded by a solder mask.

The size of the opening 530' is larger than that of the opening 530, and the solder pads exposed from the protection layer openings 530 and 530' have the same area, providing the same wetting area.

Example 6

Please refer to FIG. 10 , which is a schematic plan view of Embodiment 6 of the electronic carrier board of the present invention.

The electronic carrier board of Embodiment 6 of the present invention is substantially the same as Embodiment 3 above, the main difference being that the length of the groove 54 formed between the pads 52 is larger than the width of the electronic component and equal to the size of the opening 530'.

Example 7

Please refer to FIG. 11 , which is a schematic plan view of Embodiment 7 of the electronic carrier board of the present invention.

Embodiment 7 of the present invention is substantially the same as Embodiment 3 above, the main difference is that the pad 52 is formed with an extended structure that can be partially adjacent to the groove 54 when the distance between the pads is permitted, and the pad 52 is connected to the groove. The distance D of the groove 54 is at least 75 microns, so as to prevent the exposed area of the pad 52 from being changed in a large range when the groove 54 is shifted to the left, thereby affecting the subsequent wetting area.

Example 8

Please refer to FIG. 12 , which is a schematic plan view of Embodiment 8 of the electronic carrier board of the present invention.

The electronic carrier board of Embodiment 8 of the present invention is substantially the same as that of Embodiment 3 above, the main difference is that the solder pad 52 is not adjacent to the groove 54 at all, and the distance D between the solder pad 52 and the groove 54 is at least 75 microns, avoiding the groove. When the groove 54 is shifted to the left, the exposed area of the pad 52 is changed, thereby affecting the subsequent wetting area.

Example 9

Please refer to FIG. 13 , which is a schematic plan view of Embodiment 9 of the electronic carrier board of the present invention.

The electronic carrier board of Embodiment 9 of the present invention is substantially the same as the above-mentioned Embodiment 3, the main difference is that the electronic carrier board can be connected to adjacent electronic components (not marked) in a plurality of pairs of soldered adjacent electronic components. A groove 54 is formed between the pads 52. The length of the groove 54 is greater than the width occupied by adjacent electronic components and is eccentrically placed on one side of the plurality of pairs of soldering pads 52, and can expose each The protective layer openings 530' of the welding pads are connected, and the adjacent electronic components are connected on the plurality of pairs of welding pads 52, and the insulating resin (not shown) used to cover these electronic components can be used later to be able to The spaces between the grooves and the openings of the protective layer are fully distributed under the electronic components, so as to avoid the problems of air holes and improper electrical bridging.

Example 10

Please refer to FIG. 14 , which is a schematic plan view of Embodiment 10 of the electronic carrier board of the present invention.

The electronic carrier board of Embodiment 10 of the present invention is substantially the same as the above-mentioned Embodiment 3, the main difference is that when connecting parallel or serial passive elements on the electronic carrier board, such as the 0805 type passive element, it is composed of multiple paired Therefore, the solder pads 52 used to connect the 0805-type passive components are also arranged in multiple pairs, and the protective layer openings 530, 530' used to expose the solder pads 52 are also presented correspondingly. arrangement, so a groove 54 is formed between the two correspondingly arranged welding pads 52, the length of the groove 54 is greater than the width of the passive element such as 0805 type and is placed eccentrically on one side of the row of welding pads 52, And can communicate with each protection layer opening 530 ′ exposing each row of pads 52 .

In addition, it should be noted that the contents of the above-mentioned embodiments of the present invention can be matched and changed according to actual process requirements, and are not limited to the descriptions of the respective embodiments.

Claims (28)

1. an electronic carrier board is characterized in that, this electronic carrier board comprises:

Body;

Be located at the weld pad of this body surface in pairs; And

Cover the protective layer of this body surface; be formed with opening in this protective layer and expose outside this weld pad; and between this paired weld pad, be formed with groove; this weld pad be select with this groove all in abutting connection with, partly adjacency or adjacency not fully; the length of this groove is greater than connecing the width of putting the electronic component on this weld pad, and makes this groove off-centre place a side of this paired weld pad and form connected state with the opening of this side.

2. electronic carrier board as claimed in claim 1 is characterized in that, the length of this groove is to select more than or equal to this opening size.

3. electronic carrier board as claimed in claim 1 is characterized in that, the weld pad of adjacent trench is not minimum apart from this groove fully is 75 microns for this.

4. electronic carrier board as claimed in claim 1 is characterized in that, this electronic carrier board is base plate for packaging or the circuit board that Chip Packaging is used.

5. electronic carrier board as claimed in claim 4 is characterized in that this circuit board is a printed circuit board (PCB).

6. electronic carrier board as claimed in claim 1 is characterized in that the body of this electronic carrier board is an insulating barrier.

7. electronic carrier board as claimed in claim 1 is characterized in that, the body of this electronic carrier board is the insulating barrier that middle interval storehouse has line layer.

8. electronic carrier board as claimed in claim 1 is characterized in that, this weld pad size is to select to be greater than or less than this opening size, to form welding resisting layer definition weld pad or non-welding resisting layer definition weld pad.

9. electronic carrier board as claimed in claim 1, it is characterized in that, be coated with electric conducting material on this weld pad, connect by this electric conducting material and puts and be electrically connected to this weld pad for an electronic component, and make the insulating resin that coats this electronic component be distributed to gap between this electronic component and electronic carrier board fully.

10. electronic carrier board as claimed in claim 9 is characterized in that, this electronic component is a passive device.

11. electronic carrier board as claimed in claim 1 is characterized in that, the pad area that this protective layer opening is exposed is that design is identical.

12. an electronic carrier board is characterized in that, this electronic carrier board comprises:

Body;

A plurality of weld pads that are located at this body surface in pairs; And

Cover the protective layer of this body surface; be formed with a plurality of openings in this protective layer and expose outside respectively this weld pad; put on these paired weld pads for a plurality of electronic components are adjacent; and between these paired weld pads, be formed with groove; this weld pad be select with this groove all in abutting connection with, partly adjacency or adjacency not fully; this trench length is greater than these a plurality of sides that place these a plurality of paired weld pads in abutting connection with the shared width of electronic component and this groove off-centre, and is connected with described a plurality of openings of this side.

13. electronic carrier board as claimed in claim 12 is characterized in that, the weld pad of adjacent trench is not minimum apart from this groove fully is 75 microns for this.

14. an electronic carrier board is characterized in that, this electronic carrier board comprises:

Body;

Be located at two a plurality of weld pads that in a row dispose relatively on this body surface; And

Cover the protective layer of this body surface; be formed with a plurality of openings in this protective layer and expose outside respectively this weld pad; the passive device of selective parallel connection and series connection connects to be put on this weld pad in a row; and between this weld pad in a row, be formed with groove; this weld pad be select with this groove all in abutting connection with, partly adjacency or adjacency not fully; this trench length is two weld pads in a row side of a weld pad in a row wherein that places described relative configuration greater than the shared width of this passive device and this groove off-centre, and is connected with described a plurality of openings of this side.

15. electronic carrier board as claimed in claim 14 is characterized in that, the weld pad of adjacent trench is not minimum apart from this groove fully is 75 microns for this.

16. the assembling structure of an electronic carrier board is characterized in that, the assembling structure of this electronic carrier board comprises:

Electronic carrier board, the protective layer that this electricity support plate has body, is located at the weld pad of this body surface and covers this body surface in pairs, be formed with opening in this protective layer and expose outside this weld pad, and between this paired weld pad, be formed with groove, this weld pad be select with this groove all in abutting connection with, part adjacency or adjacency not fully, this groove off-centre place this paired weld pad a side and with the opening formation connected state of this side;

Electronic component, correspondence connect to be put on the weld pad that exposes outside this protective layer opening, and the length of this groove is the width greater than this electronic component; And

Insulating resin coats this electronic component, and is fully distributed in the gap between this electronic component and this electronic carrier board.

17. the assembling structure of electronic carrier board as claimed in claim 16 is characterized in that, the length of this groove is to select more than or equal to this opening size.

18. the assembling structure of electronic carrier board as claimed in claim 16 is characterized in that, the weld pad of adjacent trench is not minimum apart from this groove fully is 75 microns for this.

19. the assembling structure of electronic carrier board as claimed in claim 16 is characterized in that, this electronic carrier board is base plate for packaging or the circuit board that Chip Packaging is used.

20. the assembling structure of electronic carrier board as claimed in claim 19 is characterized in that, this circuit board is a printed circuit board (PCB).

21. the assembling structure of electronic carrier board as claimed in claim 16 is characterized in that, the body of this electronic carrier board is an insulating barrier.

22. the assembling structure of electronic carrier board as claimed in claim 16 is characterized in that, the body of this electronic carrier board is the insulating barrier that middle interval storehouse has line layer.

23. the assembling structure of electronic carrier board as claimed in claim 16 is characterized in that, this weld pad size is to select to be greater than or less than this opening size, forms welding resisting layer definition weld pad or non-welding resisting layer definition weld pad.

24. the assembling structure of electronic carrier board as claimed in claim 16 is characterized in that, is coated with electric conducting material on this weld pad, connects by this electric conducting material for this electronic component and puts and be electrically connected to this weld pad.

25. the assembling structure of electronic carrier board as claimed in claim 16 is characterized in that, this electronic component is a passive device.

26. the assembling structure of electronic carrier board as claimed in claim 16 is characterized in that, the pad area that this protective layer opening is exposed is that design is identical.

27. welding pad structure; comprise paired weld pad; be coated with a protective layer on it; be formed with the opening that correspondence exposes outside the part surface of each described weld pad in this protective layer; it is characterized in that, between this paired weld pad, be formed with groove, this weld pad be select with this groove all in abutting connection with, partly adjacency or adjacency not fully; the length of this groove is greater than this opening size, and this groove off-centre places a side of this paired weld pad and forms connected state with the opening of this side.

28. welding pad structure as claimed in claim 27 is characterized in that, the weld pad of adjacent trench is not minimum apart from this groove fully is 75 microns for this.

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