CN1328764C - Method for leveling semiconductor deposited layers - Google Patents

Abstract

The invention relates to a method for flattening a semiconductor deposition layer, which comprises the following steps of firstly, providing a substrate; then, forming a semiconductor deposition layer on the substrate by using a high-density plasma chemical vapor deposition method; then, processing the surface of the semiconductor deposition layer by a sputtering etching method; then, the surface of the semiconductor deposition layer is flattened by a chemical mechanical polishing method. The method uses sputter etching to process the surface of the semiconductor deposition layer, and can improve the grinding efficiency of the chemical mechanical grinder for grinding the semiconductor deposition layer.

Description

Method for leveling semiconductor deposited layers

technical field

The invention relates to a method for smoothing a semiconductor deposition layer, in particular to a method for sequentially treating the surface of a semiconductor deposition layer by sputter etching (sputter etching) and chemical mechanical polishing (CMP).

Background technique

In the modern society where science and technology are developing with each passing day, all kinds of so-called high-tech electronic products have been integrated into the lives of modern people one after another, making modern people use these electronic products to achieve the purpose of convenient life. Therefore, electronic products have become an indispensable part of the daily life of modern people. Among them, various electronic products are equipped with different corresponding integrated circuits (ICs), and ICs gather circuit elements such as transistors, diodes, resistors, and capacitors on a chip (Die) through a semiconductor manufacturing process to form an integrated circuit. A complete logic circuit to achieve functions such as control, calculation or memory, so that electronic products can perform their functions and deal with various affairs of modern people. This brings great convenience to people's life.

Please refer to FIGS. 1A-1E , which are cross-sectional views of a method for smoothing a semiconductor deposition layer in a conventional semiconductor manufacturing process. First, in FIG. 1A , a substrate 12 is provided, such as a wafer, and a silicon oxynitride (SiON) layer 14 is formed on the substrate 12 . Next, a silicon nitride (SiN) layer 16 is formed on the silicon oxynitride layer 14, and a photoresist layer 18 is patterned on the silicon nitride layer 16, as shown in FIG. 1B. Then, remove the exposed part of the silicon nitride layer 16 and part of the silicon oxynitride layer 14 below, and then remove part of the substrate 12 to form a plurality of shallow trenches (shallow trenches) in the substrate 12, as shown in Figure 1C shown.

After the patterned photoresist layer 18 is removed, a semiconductor deposition layer 22 is formed on the substrate 12 by high density plasma chemical vapor deposition (HDP CVD), as shown in FIG. 1D . The semiconductor deposition layer 22 covers the silicon nitride layer 16 and fills up the shallow trench 20 . The semiconductor deposition layer 22 is, for example, a silicon dioxide (SiO ₂ ) layer. In FIG. 1D , there are a plurality of protruding sharp triangles on the semiconductor deposition layer 22 , and these triangle structures correspond to the underlying silicon nitride layer 16 . Each triangular structure has a highest point A and a lowest point B, and there is a step height between the highest point A and the lowest point B. Next, use chemical mechanical polishing (CMP) to make the surface of the semiconductor deposition layer 22 smooth, that is, use a chemical mechanical polishing machine to grind the surface of the semiconductor deposition layer 22, so that the surface of the semiconductor deposition layer 22 is smoother, as shown in Figure 1E shown.

It should be noted that since the semiconductor deposition layer 22 in FIG. 1D is provided with a plurality of protruding sharp triangles, and the height difference between the highest point A and the lowest point B is usually large, the surface of the semiconductor deposition layer 22 is very uneven. Therefore, the rate of grinding the semiconductor deposition layer 22 with the chemical mechanical grinder will decrease, so the grinding time for grinding the semiconductor deposition layer 22 with the chemical mechanical grinder will be prolonged, which has a great impact on the semiconductor manufacturing process. Therefore, it is an urgent and urgent technical issue to improve the grinding rate of the semiconductor deposition layer and reduce the grinding time by chemical mechanical grinding machine.

Contents of the invention

Accordingly, the technical problem to be solved in the present invention is to provide a method for smoothing the semiconductor deposition layer. The method uses sputter etching to process the surface of the semiconductor deposition layer, which can improve the efficiency of the subsequent chemical mechanical grinding machine to grind the semiconductor deposition layer. efficiency.

In order to solve the above problems, in the method for smoothing the semiconductor deposition layer proposed by the present invention, a base material is firstly provided, and then, a high density plasma chemical vapor deposition method (high density plasma chemical vapor deposition, HDP CVD) is used on the above-mentioned base material A semiconductor deposition layer is formed. Then, a sputter etching method (sputter etching) is used to process the surface of the semiconductor deposition layer, wherein, the surface of the semiconductor deposition layer is sputtered with nitrous oxide plasma. Next, the surface of the semiconductor deposition layer is smoothed by chemical mechanical polishing (CMP).

In another method that the present invention proposes to make the semiconductor deposition layer flat, at first a wafer is provided; then a silicon oxynitride layer is formed on the wafer; then, a silicon nitride layer is formed on the silicon oxynitride layer; then , form a patterned photoresist layer on the silicon nitride layer; then remove the exposed part of the silicon nitride layer and silicon oxynitride layer; then, form a plurality of shallow trenches in the wafer; then, remove A patterned photoresist layer; afterward, a semiconductor deposition layer is formed on the substrate by a high-density plasma chemical vapor deposition method, the semiconductor deposition layer covers part of the silicon nitride layer, and fills the above-mentioned shallow trench; then , treating the surface of the semiconductor deposition layer with a sputter etching method, wherein the surface of the semiconductor deposition layer is sputtered with nitrous oxide plasma. Then, the surface of the semiconductor deposition layer is smoothed by chemical mechanical polishing.

Description of drawings

In order to make the above-mentioned purposes, features, and advantages of the present invention more obvious and understandable, a preferred embodiment will be described in detail below in conjunction with the accompanying drawings:

1A to 1E are cross-sectional views of a method for smoothing a semiconductor deposition layer in a traditional semiconductor manufacturing process;

2 is a flow chart of a method for smoothing a semiconductor deposition layer according to a preferred embodiment of the present invention;

3A to 3F are cross-sectional views of a method for smoothing a semiconductor deposition layer according to a preferred embodiment of the present invention;

Fig. 4 is the relation curve of grinding rate and surface treatment condition.

Explanation of reference numbers

12, 112: Substrate

14, 114: silicon oxynitride layer

16, 116: silicon nitride layer

18, 118: patterned photoresist layer

20, 120: shallow trench

22, 122: semiconductor deposition layer

Detailed ways

The method for smoothing the semiconductor deposition layer proposed by the present invention uses the step of sputter etching to treat the surface of the semiconductor deposition layer, which can increase the rate of grinding the semiconductor deposition layer by a subsequent chemical mechanical grinder.

Please refer to FIG. 2 and FIGS. 3A-3F, wherein FIG. 2 is a flow chart of a method for smoothing a semiconductor deposition layer according to a preferred embodiment of the present invention, and FIGS. Layer leveling method flow profile. First, in step 202 , a substrate 112 is provided, such as a wafer, and a silicon oxynitride (SiON) layer 114 is formed on the substrate 112 , as shown in FIG. 3A . Next, proceed to step 204, using high density plasma chemical vapor deposition (high density plasma chemical vapor deposition, HDP CVD) to form a semiconductor deposition layer on the substrate 112 .

In the step of forming a semiconductor deposition layer on the substrate 112 by high-density plasma chemical vapor deposition, multiple sub-steps may also be included: first, a silicon nitride (SiN) layer 116 is formed on the silicon oxynitride layer 114, And a patterned photoresist layer 118 is formed on the silicon nitride layer 116, as shown in FIG. 3B. Next, remove the exposed part of the silicon nitride layer 116 and the part of the silicon oxynitride layer 114 below, and remove part of the substrate 112, so as to form a plurality of shallow trenches (shallowtrench) 120 in the substrate 112, as shown in FIG. 3C. Then, the patterned photoresist layer 118 is removed, and a semiconductor deposition layer 122 is formed on the substrate 112 by high-density plasma chemical vapor deposition. The semiconductor deposition layer 122 covers the silicon nitride layer 116 and fills The above-mentioned shallow trench 120 is shown in FIG. 3D. Wherein, the semiconductor deposition layer 122 is, for example, a silicon dioxide (SiO ₂ ) layer. In FIG. 3D , a plurality of protruding sharp triangles are disposed on the semiconductor deposition layer 122 , and these triangle structures correspond to the underlying silicon nitride layer 116 . Each triangular structure has a highest point A and a lowest point B, and there is a step height between the highest point A and the lowest point B.

After the semiconductor deposition layer 122 is formed, proceed to step 206, using sputter etching to treat the surface of the semiconductor deposition layer 122, so that the surface of the semiconductor deposition layer 122 can be slightly flatter, as shown in FIG. 3E. In FIG. 3E , the triangular structures protruding from the semiconductor deposition layer 122 each have a highest point C and a lowest point D. As shown in FIG. It can be clearly seen that the height difference between the highest point C and the lowest point D is smaller than the height difference between the highest point A and the lowest point B in FIG. 3D . It should be noted that the present invention can also use oxygen (O ₂ ) plasma, argon (Ar) plasma, nitrogen (N ₂ ) plasma or nitrous oxide (N ₂ O) plasma to sputter the surface of the semiconductor deposition layer 122 to The surface of the semiconductor deposition layer 122 is slightly flattened. In addition, HDP chemical vapor deposition and sputter etching can be performed sequentially in a high density plasma chemical vapor deposition machine.

Next, perform step 208, use chemical mechanical polishing (chemical mechanical polishing, CMP) to make the surface of the above-mentioned semiconductor deposition layer 122 smooth, that is, use a chemical mechanical polishing machine to grind the surface of the semiconductor deposition layer 122, so that the surface of the semiconductor deposition layer 122 is smoother , as shown in Figure 3F.

Since the protruding triangular structure on the semiconductor deposition layer 122 in FIG. 3E has been slightly flattened by sputter etching, the height difference between the highest point C and the lowest point D in FIG. The speed of 122 is much improved and the grinding time is shortened, so that the smooth operation of the semiconductor manufacturing process can be maintained. Even, the service life of the chemical mechanical grinder can be extended.

When using a chemical mechanical grinder to grind the deposited semiconductor layer that has not been treated by sputter etching, the grinding rate is about 750 (A/min), as shown by point X in FIG. 4 . That is to say, the chemical mechanical grinder can grind away a semiconductor deposition layer with a thickness of 750 (A) per minute. When the sputter-etched semiconductor deposition layer is polished by a chemical mechanical polishing machine, the polishing rate is about 2000 (A/min), as shown at point Y in FIG. 4 . That is to say, the chemical mechanical grinder can grind away a semiconductor deposition layer with a thickness of 2000 (A) per minute. Therefore, the design of treating the surface of the semiconductor deposition layer with the sputter etching method of the present invention is beneficial to improve the grinding efficiency of the chemical mechanical grinder.

In the method for leveling the semiconductor deposition layer disclosed in the above embodiments of the present invention, sputter etching is used to treat the surface of the semiconductor deposition layer, which can increase the grinding rate of the subsequent chemical mechanical polishing machine for grinding the semiconductor deposition layer.

In summary, although the present invention has been disclosed as above in a preferred embodiment, this is not a limitation of the present invention. Any person of ordinary skill in the art can make various modifications without departing from the concept and scope of the present invention. Therefore, the scope of protection of the present invention should be as defined by the appended claims.

Claims (6)

1. one kind makes method of flattening semiconductor deposition, comprises the steps: at least

One base material is provided;

On above-mentioned base material, form the semiconductor sedimentary deposit with the high density plasma chemical vapor deposition method;

Handle above-mentioned semiconductor deposition laminar surface with sputter etching, wherein, with this semiconductor deposition laminar surface of nitrous oxide plasma sputtering; And

Make the surfacing of semiconductor deposition with chemical mechanical milling method.

2. the method for claim 1, wherein above-mentioned base material comprises a wafer.

3. method as claimed in claim 2, the wherein above-mentioned step that forms the semiconductor sedimentary deposit with the high density plasma chemical vapor deposition method on above-mentioned base material also comprises:

On above-mentioned base material, form a silicon oxynitride layer;

On this silicon oxynitride layer, form a silicon nitride layer;

On this silicon nitride layer, form the photoresist layer of composition;

Remove the above-mentioned silicon nitride layer and the silicon oxynitride layer of exposed portions;

In above-mentioned wafer, form many shallow channel;

Remove the photoresist layer of composition; And

On above-mentioned base material, form the semiconductor sedimentary deposit with the high density plasma chemical vapor deposition method, this above-mentioned silicon nitride layer in semiconductor deposition cover part, and fill up above-mentioned shallow channel.

4. method as claimed in claim 3, wherein above-mentioned semiconductor deposition comprises a silicon dioxide layer.

5. one kind makes method of flattening semiconductor deposition, comprises the steps: at least

One wafer is provided;

On this wafer, form a silicon oxynitride layer;

On this silicon oxynitride layer, form a silicon nitride layer;

On this silicon nitride layer, form the photoresist layer of composition;

Remove the above-mentioned silicon nitride layer and the silicon oxynitride layer of exposed portions;

In above-mentioned wafer, form many shallow channel;

Remove the photoresist layer of above-mentioned composition;

On above-mentioned base material, form the semiconductor sedimentary deposit with the high density plasma chemical vapor deposition method, this above-mentioned silicon nitride layer in semiconductor deposition cover part, and fill up above-mentioned shallow channel;

Handle above-mentioned semiconductor deposition laminar surface with sputter etching, wherein, with this semiconductor deposition laminar surface of nitrous oxide plasma sputtering; And

Make above-mentioned semiconductor deposition surfacing with chemical mechanical milling method.

6. method as claimed in claim 5, wherein above-mentioned semiconductor deposition comprises a silicon dioxide layer.

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