CN1112777C - Signal processing method and device - Google Patents

Abstract

The invention relates to digital signal processing and specificly to level control of a pulse density modulated (PDM) signal generated by a sigma-delta modulator. A single-bit pulse density modulated PDM signal is generated by a first sigma-delta modulator (2) being an analog modulator, for instance. Level control is performed by multiplying the single-bit pulse density modulated PDM signal by a multibit multiplier (300) to obtain a multibit number stream, which is reconverted into a single-bit PDM signal by a second digital sigma-delta modulator (4). In accordance with the invention, the performance of the second sigma-delta modulator (4) is better than that of the first sigma-delta modulator (2), as to the signal-to-noise ratio. Thus, the most significant factor in the total signal-to-noise ratio (SNR) is the noise level of the first sigma-delta modulator (2), by which the PDM signal was originally generated. In the subsequent second sigma-delta modulator (4), the PDM signal can then be attenuated as much as is the difference between the SNR performances of the modulators without any decrease in the total signal-to-noise ratio. A relative amplification of the PDM signal is provided in this manner.

Description

Signal processing method and device

Background of the invention

This invention relates to digital signal processing and, in particular, to controlling the level of a pulse density modulated (PDM) signal produced by a sigma-delta modulator.

Background of the invention

The basic operations of signal processing, multiplication and addition, can be performed by an analog signal processing block by known methods, or by converting analog signals into digital signals by using an A/D converter and performing required signal processing operations digitally. The result can be converted back into an analog signal by using a D/A converter. A/D and D/A conversions are performed at a predetermined sampling frequency and a predetermined resolution.

Recently, A/D and D/A converters based on sigma-delta modulators have become common. In a sigma-delta A/D converter, conversion of an analog signal to a baseband digital signal occurs in two stages. In the first stage, the input signal is converted into an oversampled one or more bit signal by a sigma-delta converter. In the second stage, this oversampled one or more bit signal is decimated to baseband by applying digital filtering. For example, sigma-delta technology and converters are described in the following papers.

[1] "An Introduction to Sigma-Delta Converters", P.M.Aziz et al., IEEE Signal Processing Magazine, January 1996, pp. 61-84.

[2] "Oversampling sigma-delta data converters: Principles, design, and simulation", J.C.Candy et al., IEEE Press NJ 1992, pp. 1-25.

[3] "Design Methodology for Sigma-Delta Modulation", B.P. Agrawal et al., IEEE Transactions on Communications, Vol. COM-31, March 1983, pp. 360-370.

The oversampled output signal of the sigma-delta modulator is a pulse density modulated (PDM) representation of the input signal. In a sigma-delta A/D converter, a modulator converts the analog signal into pulse density modulation (PDM) format. PDM signals include oversampled one or more bits (eg, 2 to 4 bits) signals. The relative pulse density of the PDM signal determines the amplitude representation of the input signal. In the frequency domain, the baseband portion of the spectrum of the DPM signal is the useful signal band, and at the higher frequencies of the spectrum there is quantization noise generated by the noise processing function of the sigma-delta modulator. Thus, the resolution at the signal frequency for the oversampling rate can be changed. It is well known that the noise handling performance of a sigma-delta modulator depends on the order of the modulator, and that higher order modulators can more effectively remove quantization noise from the signal band. By increasing the oversampling ratio, the signal frequency band is proportionally narrowed, and the amount of noise falling within the signal frequency band becomes smaller. Furthermore, the amount of noise within the signal band in a sigma-delta modulator can be controlled by the transfer function of the modulator, eg, by inserting zeros into the transfer function of the modulator at appropriate frequencies.

Recently, methods for performing a limited number of signal processing operations using PDM signals have been described in literature. Thus, the known advantages of digital signal processing, such as precision, repeatability, insensitivity to disturbances, etc. are obtained. When processing a signal directly in an oversampled PDM format, it is not necessary to convert it to a pulse code modulated (PCM) signal at the Nyquist frequency for signal processing. Thus, at the point of signal processing, the decimation and insertion filters for generating the baseband PCM signal from the PDM signal can be omitted. This is a significant advantage, because the circuit size of the sigma-delta modulator that generates the PDM signal is generally small and simple, while the decimation and insertion filter is generally large and the circuit structure is complex, it is implemented in the integrated circuit A large circuit area is required, which leads to additional costs. For example, the paper [4], "Design and Analysis Based on IIR Filter Delta-Sigma", D.A.John et al., IEEE Transactins on Circuits and Systems-II: Analog and Digital Signal Processing, Vol.40, No.4, No. 233 To page 240, an A/D converter with multiple inputs is described, each input is filtered separately and summed before a common decimation filter. For example, an audio mixing board can be implemented this way.

An important form of signal processing is controlling signal levels: amplification and/or attenuation. This performance is particularly useful for audio applications, such as the audio mixing boards described above. Therefore, it would be preferable if the PDM signal level could also be controlled. Figure 1 of the above paper [4] shows a sigma-delta attenuator in which an oversampled 1-bit signal (PDM) is multiplied by a multi-bit coefficient a1, and the resulting multi-bit signal is used to output a digital sigma-delta of the 1-bit PDM signal. Delta modulator. A multiplier for a 1-bit PDM signal is implemented as a 2-input multiplexer (selector) that selects a1 or -a1 as an output according to the state of the input PDM signal. The paper also describes a digital sigma-delta filter suitable for this purpose. When the multi-bit coefficient is below 1, an attenuator is achievable. When the feedback value of the sigma-delta modulator is b and the coefficient is a, an attenuation rate a/b is obtained.

The problem with this known method is that only attenuation of the PDM signal is feasible and all multiplications with coefficients below 1 need to be performed. It is not considered feasible to amplify the PDM signal because the input value of the modulator cannot exceed or even approach the feedback value of the modulator due to the structure of the sigma-delta modulator. The sigma-delta modulator is a conditionally stable structure, once the input exceeds a predetermined value, the output signal of the synthesizer escapes. In an analog sigma-delta modulator, the allowable input value is normal, depending on the order and structure of the modulator, typically 0.3 to 0.7 times the feedback value, see paper [3]. Amplification of the PDM signal in such a circuit requires multiplying the incoming signal by a number higher than the feedback value. Even if the input level of the A/D modulator is very low, and in principle by setting the input signal value (a) higher than the feedback value (b), it can be amplified a lot, the resulting PDM signal can only have +1 and - 1 value (one-bit case). By multiplying, the modulator temporarily acquires a very high value. The density and energy of the PDM signal are low on average, but the instantaneous values will make the modulator very unstable.

Brief description of the invention

The object of the present invention is a signal processing method and device which are able to relatively amplify a PDM signal without significantly increasing the noise level.

The object of the present invention is achieved by a signal processing method, wherein said method comprises the following steps: generating an N-bit pulse density modulation signal by a first Σ-Δ modulator, wherein N=1, 2, ...; controlling said pulse density modulation signal The level of a) by multiplying the N-bit pulse density modulation signal with a multi-bit multiplier, its output is an M-bit signal, where M>N, b) by multiplying the M by a digital Σ-Δ modulator The bit signal is converted into an N-bit pulse density modulated signal. The method is characterized in that the M-bit signal is converted into the N-bit pulse density modulated signal modulated by the digital sigma-delta modulator, wherein the modulator has a characteristic superior to that of the first sigma-delta The signal-to-noise ratio performance of the modulator.

Yet another object of the present invention is a signal processing system, comprising: a first sigma-delta modulator generating N-bit pulse density modulation signals, where N=1, 2, ...; Level device, said device comprises a) multi-bit multiplier (300), its input is said N-bit pulse density modulation signal and said output is M-bit signal, wherein M>N, b) said A digital sigma-delta modulator that converts the M-bit signal into the N-bit pulse density modulated signal. The arrangement is characterized in that the digital sigma-delta modulator has better signal-to-noise ratio performance than the first sigma-delta modulator.

For example, a one-bit pulse density modulated PDM signal is generated by a first sigma-delta modulator which is an analog modulator. A multi-bit digital stream is obtained by multiplying a one-bit PDM signal with a multi-bit coefficient to perform level control. The digital stream is converted back into a one-bit PDM signal by a second sigma-delta modulator, preferably a digital modulator.

According to the basic principle of the present invention, the signal-to-noise ratio performance of the second Σ-Δ modulator is better than that of the first Σ-Δ modulator, wherein the multi-bit digital The stream is re-converted into a PDM signal. Therefore, the most important factor for the overall signal-to-noise ratio (SNR) is the noise level of the first sigma-delta modulator from which the PDM signal is initially generated. In the latter second sigma-delta modulator described above, the PDM signal can be attenuated over a range equal to the difference in the SNR performance of the modulators without reducing the overall signal-to-noise ratio. For example, if the SNR of the first sigma-delta modulator is 90dB at maximum excitation and the SNR of the second sigma-delta modulator is 110dB, then the PDM signal can be attenuated by approximately 20dB in the second modulator without attenuating Small signal-to-noise ratio. This is possible because in the latter modulator the noise of the first modulator on the signal band is generally attenuated in addition to the signal and reaches the noise floor set by the second modulator structure.

Thus, the PDM signal is scaled to a slightly lower level without degrading performance. Although the second sigma-delta modulator also attenuates the signal, the attenuation can be less than the performance difference (20dB in the example above), so that relative amplification is obtained. When the attenuated PDM signal is less than the difference in the SNR performance of the two modulators, the same overall signal-to-noise ratio as attenuated by the preceding analog modulator is obtained. In the case of this example, the nominal level of the signal can be fixed at the point where the first modulator gives an unattenuated signal and the second modulator attenuates the signal by 20dB. The second order decay can be C. In the case of this example, the overall SNR will be 90dB, the signal is between +20-0dB and 90+20-(c), c is between 20dB and 110dB, and the attenuation of the system is between 0 and 90dB between.

Description of drawings

With reference to accompanying drawing, describe the present invention in detail by preferred embodiment, wherein:

1 is a block diagram showing a PDM level controller connected after an analog sigma-delta A/D modulator according to the present invention;

Figure 2 is a graph showing the noise and signal levels of an analog sigma-delta modulator and a digital sigma-delta modulator and the control regions arranged as a function of frequency;

Fig. 3 is a block diagram showing a multi-channel PDM level controller.

Detailed description of the invention

Referring to FIG. 1, an analog sigma-delta modulator 2 performs A/D conversion of an analog input signal at an input 1 into a 1-bit pulse density modulation (PDM) format. For example, modulator 2 can be any of the sigma-delta A/D modulator structures described in the paper [1]. Let us assume that modulator 2 is a 3rd order sigma-delta modulator, which has a signal-to-noise ratio of about 100dB. The PDM level controller 3 is supplied with a one-bit PDM signal which can obtain values +1 and -1.

According to a preferred embodiment of the present invention, the PDM level controller 3 includes a digital modulator 4 and a preceding multiplier 300 . Level control is performed by multiplying a one-bit pulse density modulated (PDM) signal with a multi-bit coefficient a to obtain a multi-bit digital stream in a multiplier 300, wherein the digital stream is reconverted by a digital sigma-delta modulator 4 into a PDM signal.

In the case of a one-bit PDM signal, the multiplier 300 is implemented by a simple multiplexer or selector, which produces an output +a or -a, depending on whether the input value is +1 or -1. Thus, the output of multiplier 300 is a multi-bit stream which includes the numbers +a and -a. The multiplier 300 may have a structure similar to that disclosed in the paper [4]. The multiplier can have a fixed coefficient or the coefficient value can be adjustable. In the preferred embodiment of the invention as shown in Fig. 1, the selection signal SELECT selects one of several coefficients a1...an, whereby the desired attenuation or amplification can be set. For example, the coefficients can be according to Table 1. This represents 32 values of the coefficient a, giving a level control range of +12dB...-34.5dB (in steps of 1.5dB).

Table 1 Coefficient a Amplification (dB) 872 +12.0 734 10.5 617 9.0 519 7.5 437 6.0 368 4.5 309 3.0 260 1.5 219 0 184 -1.5 155 -3.0 130 -4.5 110 -6.0 92 -7.5 78 -9.0 65 -10.5 55 -12.0 46 -13.5 39 -15.0 33 -16.5 28 -18.0 twenty three -19.5 20 -21.0 16 -22.5 14 -24.0 12 -25.5 10 -27.0 8 -28.5 7 -30.0 6 -31.5 5 -33.0 4 -34.5

The digital modulator 4 is a fourth-order modulator, which includes adders 400 to 403, integrators 404 to 407, quantizers 408, and feedbacks 409 to 412, which have feedback coefficients r1 to r4, respectively. Note that the detailed implementation and structure of the modulator is of no significance to the invention. Only the performance of modulator 4 being better than that of modulator 2 is meaningful for the invention, as described below. The input to the modulator 4 is the digital stream, which includes the numbers +a and -a. The output 5 of the modulator 4 is a 1-bit oversampled PDM signal. In the level controller 3, the level of the PDM signal is controlled at a rate a/r1. Due to the instability of the sigma-delta modulator, the input value of the modulator 4 cannot be close to the internal reference voltage value of the modulator, which means that the coefficient a should be lower than the feedback coefficient r1. Therefore, in the multiplier 300, only the PDM signal can be attenuated.

At system level, ie, between input 1 and output 5, amplification can be provided, however, with respect to noise handling performance, when the performance of the digital sigma-delta modulator is higher than that of modulator 2. For example, the noise handling performance of modulator 4 can be higher due to higher order, multi-bit quantization and feedback or higher oversampling ratio or some combination of these. In the embodiment of Fig. 1, modulator 4 is a fourth-order modulator and modulator 2 is a third-order modulator. When higher-order modulators (or modulators with better noise-handling performance) follow lower-order modulators in the processing path of a PDM signal, the noise level of the lower-level modulator contributes significantly to the overall SNR of the system ratio (SNR) is most decisive. In the case of FIG. 1 , the signal-to-noise ratio at the output 5 is mainly determined from the signal-to-noise ratio of the modulator 2 . The performance of modulator 4 should be at least the required amplification and preferably also have a better signal-to-noise ratio than modulator 2 and an appropriate stability margin of the incoming PDM signal. Since the signal-to-noise ratio of the modulator 4 of the level controller 3 is much better than that of the incoming PDM signal, the level controller can be lower than the level of the entire PDM signal without actually reducing the signal-to-noise ratio at all. This is possible since the PDM signal is attenuated in addition to the noise of the payload signal. Thus, the signal is scaled to a slightly lower level without degrading performance. Although the PDM signal is also attenuated in modulator 4, the signal can be attenuated in level controller 3 to be less than the difference in performance at modulators 2 and 4, and relative amplification can be obtained.

Let us examine the operation of the level controller by way of example with reference to FIG. 3 according to the invention. Assuming that the analog modulator 2 is a third-order modulator, its signal-to-noise ratio is about 100dB. Modulator 4 is a fourth-order digital modulator with a signal-to-noise ratio of about 120 dB, ie better than that of modulator 2 by about 20 dB. The desired control range is +12dB...-34.5dB (in 1.5dB steps). In order to guarantee the stability of the modulator 4, the ratio a/r1 is 0.5, ie -6dB. The reference value r1 can be calculated as a function of the maximum attenuation (-34.5dB) and the required accuracy (<0.3dB). Therefore, assume that the reference value is 1744. Now, by multiplying the incoming PDM signal by 872, corresponds to amplification +12dB, and by multiplying the PDM signal by 4, corresponds to maximum attenuation. In the above Table 1, when the reference value r1 is a constant 1744, all differences of the coefficient a are listed, and this corresponds to the enlargement. When the performance difference between modulators 2 and 4 is 20dB, and the stability margin is set at 6dB, the amplification range of the arrangement is about 14dB.

In this example, the signal-to-noise ratio after modulator 2 remains approximately the same in the range +12...-1.5 dB. At higher attenuation, the signal noise just input is attenuated below the noise floor 22 of the modulator 4 while attenuating the payload signal 25 and noise floor 22 determines the signal-to-noise ratio at the output 5 .

The invention is described in connection with a 1-bit PDM signal. However, the present invention can be directly applied to multi-bit, eg, 2-bit to 4-bit, and PDM signals.

The preferred embodiment of the invention shown in FIG. 1 shows an analog modulator 2, a multiplier 300 and a digital modulator 4 connected in sequence. Indeed, these units may be separated from each other in a signal processing system in such a way that there may be other signal processing stages between them. An example of such a signal processing system is shown in Figure 3.

FIG. 3 shows three analog input signals 31 , 32 and 33 which are applied to respective analog sigma-delta modulators 34 , 35 and 36 . Modulators 34, 35 and 36 generate PDM signals 37, 38 and 39, respectively, which are applied to multipliers 40, 41 and 42, respectively. The multipliers 40, 41 and 42 each produce a multi-bit digital stream which is summed to a multi-bit digital stream 47 in an adder. The signal 47 is converted into a PDM signal 49 by a digital sigma-delta modulator. Modulators 34 to 36 may have a similar structure to modulator 2 in FIG. 1 . The structure of the multipliers 40 to 42 may be similar to the structure of the multiplier 300 in FIG. 1 . Modulator 48 may have a similar structure to multiplier 4 in FIG. 1 . An application of a signal processing device of the type shown in Figure 3 is an audio mixing board.

The invention can be used for level control of PDM signals in all sigma-delta configurations. Typical targets for applications are, besides audio applications, IIR and FIR filter structures.

It will be apparent to those skilled in the art that, as technology advances, the basic principles of the invention may be employed in many different applications. Accordingly, the invention and its embodiments are not limited to the examples described above, but are within the scope of the claims.

Claims (10)

1. A signal processing method, comprising the following steps: N-bit pulse density modulation signals are generated by the first Σ-Δ modulator, where N=1, 2, ...; control the level of the pulse density modulated signal a) by multiplying said N-bit pulse density modulated signal with a multi-bit multiplier, its output is an M-bit signal, where M>N, b) converting the M-bit signal into an N-bit pulse density modulated signal by a digital sigma-delta modulator, characterized in that, converting said M-bit signal into said N-bit pulse density modulated signal modulated by said digital sigma-delta modulator, wherein said digital sigma-delta modulator has a better performance than said first sigma-delta modulator SNR performance. 2. The method according to claim 1, wherein said level control step further comprises the following steps: Relative amplification of the pulse density modulated signal is provided by multiplying the N-bit pulse density modulated signal by a coefficient corresponding to an attenuation less than the difference in performance. 3. A method as claimed in claim 1 or 2, characterized in that a digital sigma-delta modulator is used whose noise handling performance is superior to that of said first modulator according to one or several of the following factors: higher order , Multi-bit quantization, multi-bit feedback, higher oversampling ratio. 4. A signal processing system comprising: The first Σ-Δ modulator (2) generates an N-bit pulse density modulated signal, where N=1, 2, ...; means (3) for controlling the level of said pulse density modulated signal, said means (3) comprising a) a multi-bit multiplier (300) whose input is said N-bit pulse density modulated signal and said output is an M-bit signal, where M>N, b) a digital sigma-delta modulator (4) for converting said M-bit signal into said N-bit pulse density modulated signal, characterized in that, The digital sigma-delta modulator (4) has better signal-to-noise performance than the first sigma-delta modulator (2). 5. The system as claimed in claim 4, characterized in that, when the coefficient of the multi-bit multiplier (300) corresponds to an attenuation lower than the performance difference, the level control device (3) has a relative enlarge. 6. The system according to claim 4 or 5, characterized in that the noise handling performance of the digital sigma-delta modulator (4) is better than that of the first modulator according to one or more of the following factors (2) performance: higher order, multi-bit quantization, multi-bit feedback, higher oversampling ratio. 7. A system according to claim 4, characterized in that the first modulator (2) is an analog sigma-delta modulator. 8. A system according to claim 4, characterized in that the system is a digital filter for pulse density modulated signals, such as an IIR or FIR filter. 9. The system of claim 4, wherein the system is an audio system. 10. The system according to claim 4, characterized in that the coefficient value of the multiplier (300) is stepwise adjustable.

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