HK1025695B - Signal processing method and device - Google Patents

Description

Signal processing method and device

Background

The present invention relates to digital signal processing, and more particularly, to controlling the level of a Pulse Density Modulated (PDM) signal generated by a sigma-delta modulator.

Background

The basic operations of signal processing, multiplication and addition, can be performed by known methods by an analog signal processing block, or by converting an analog signal into a digital signal using an a/D converter and performing the required signal processing operations digitally. By using a D/a converter, the result can be converted back into an analog signal. A/D and D/A conversion is performed at a predetermined sampling frequency and a predetermined resolution.

Recently, a/D and D/a converters according to sigma-delta modulators have become common. In sigma delta a/D converters the conversion of an analog signal into a baseband digital signal takes place in two stages. In a first phase, the input signal is converted by a sigma-delta converter into an oversampled one or more bit signal. In a second stage, the oversampled one or more bit signal is decimated to baseband by applying digital filtering. Sigma-delta techniques and converters are described, for example, in the following papers.

[1] "overview of sigma-delta converters", p.m. aziz et al, IEEE Signal processing magazine, 1996, 1 month, pages 61 to 84.

[2] "oversampling sigma-delta data converter: principles, design and simulation ", j.c. candy et al, ieee press NJ 1992, pages 1 to 25.

[3] "design methodology for sigma-delta modulation", b.p. agrawal et al, IEEE transactions on Communications, vol.com-31, 3 months 1983, pages 360 to 370.

The oversampled output signal of the sigma-delta modulator is a Pulse Density Modulated (PDM) representation of the input signal. In a sigma-delta a/D converter, a modulator converts an analog signal to a Pulse Density Modulation (PDM) format. The PDM signal comprises an oversampled one or more bit (e.g., 2 to 4 bit) signal. The relative pulse density of the PDM signal determines the amplitude representative of the input signal. In the frequency domain, the baseband part of the spectrum of the DPM signal is the useful signal band, and at higher frequencies of the spectrum, there is quantization noise generated by the noise processing function of the sigma-delta modulator. Thus, the resolution at the signal frequency for the oversampling rate can be changed. It is well known that the noise handling performance of a sigma-delta modulator depends on the order of the modulator, and that higher order modulators are more efficient at removing quantization noise from the signal band. By increasing the oversampling ratio, the signal band can be narrowed proportionally, and the amount of noise falling within the signal band becomes small. Furthermore, the amount of noise within the signal band in the sigma-delta modulator can be controlled by the transfer function of the modulator, for example, by inserting zeros into the transfer function of the modulator at the appropriate frequency.

Recently, methods for performing a limited number of signal processing operations using PDM signals have been described in academic texts. Thus, known advantages of digital signal processing are obtained, such as accuracy, repeatability, insensitivity to interference, and so on. When a signal is processed directly in the oversampled PDM format, it need not be converted to a Pulse Code Modulation (PCM) signal at the Nyquist frequency for signal processing. Thus, in the signal processing point, decimation and insertion filters that generate a baseband PCM signal from the PDM signal can be omitted. This is a significant advantage because the circuit size of the sigma-delta modulator generating the PDM signal is typically small and simple, while the decimation and insertion filters are typically large and the circuit structure is complex, which requires a large circuit area in the integrated circuit implementation, which results in additional costs. For example, paper [4], "IIR filter delta-sigma based design and analysis", D.A. John et al, IEEE transactions on circuits and Systems-II: analog and digital signal processing, vol.40, No.4, pages 233 to 240, describe a/D converters with multiple inputs, each filtered separately and summed before a common decimation filter. For example, an audio mixing circuit board may be implemented by this method.

An important form of signal processing is the control of signal levels: amplification and/or attenuation. This capability is particularly useful for audio applications, such as the audio mixer board described above. Therefore, it is preferable if the PDM signal level can also be controlled. Figure 1 of the above paper [4] shows a sigma-delta attenuator in which an oversampled 1-bit signal (PDM) is multiplied by a multi-bit coefficient a1 and the resulting multi-bit signal is used in a digital sigma-delta modulator which outputs a 1-bit PDM signal. The multiplier of the 1-bit PDM signal is implemented as a 2-input multiplexer (selector) that selects either a1 or-a 1 as an output depending on the state of the input PDM signal. The paper also describes a digital sigma delta filter suitable for this purpose. When the multi-bit coefficient is below 1, an attenuator is achievable. When the feedback value of the sigma-delta modulator is b and said coefficient is a, the attenuation ratio a/b is obtained.

A problem with this known method is that only attenuating the PDM signal is feasible and that all multiplications with coefficients below 1 need to be performed. Amplifying the PDM signal is not considered feasible because the input value of the modulator cannot exceed or even approach the feedback value of the modulator due to the structure of the sigma-delta modulator. Sigma-delta modulators are conditionally stable structures, and the output signal of the synthesizer escapes as soon as the input exceeds a predetermined value. In an analog sigma-delta modulator the input value is allowed to be normal, depending on the order and structure of the modulator, typically 0.3 to 0.7 times the feedback value, see paper [3 ]. Amplification of the PDM signal in such a circuit requires multiplication of the incoming signal by a number higher than the feedback value. Even if the input level of the a/D modulator is low and in principle it can be amplified considerably by setting the input signal value (a) higher than the feedback value (b), the resulting PDM signal can have only +1 and-1 values (one bit case). By multiplication, the modulator temporarily acquires a very high value. The density and energy average of the PDM signal is low, but the instantaneous values will make the modulator very unstable.

Brief description of the invention

The present invention is directed to a signal processing method and apparatus that is capable of relatively amplifying a PDM signal without significantly increasing the noise level.

The object of the invention is achieved by a signal processing method, wherein the method comprises the steps of: generating an N-bit pulse density modulated signal by a first sigma-delta modulator, wherein N is 1, 2, …; controlling the level of said pulse density modulated signal a) by multiplying said N-bit pulse density modulated signal with a multi-bit multiplier, the output of which is an M-bit signal, where M > N, b) by converting said M-bit signal into an N-bit pulse density modulated signal by a digital sigma-delta modulator. The method is characterized by converting the M-bit signal to the N-bit pulse density modulated signal modulated by the digital sigma-delta modulator, wherein the modulator has a signal-to-noise ratio performance that is better than the first sigma-delta modulator.

Still another object of the present invention is a signal processing system comprising: a first sigma-delta modulator generating an N-bit pulse density modulated signal, where N is 1, 2, …; means for controlling the level of said pulse density modulated signal, said means comprising a) a multi-bit multiplier (300) whose input is said N-bit pulse density modulated signal and whose output is an M-bit signal, where M > N, b) a digital sigma-delta modulator converting said M-bit signal into said N-bit pulse density modulated signal. The apparatus is characterized in that the digital sigma-delta modulator has a signal-to-noise ratio performance that is superior to the first sigma-delta modulator.

For example, a one-bit pulse density modulated PDM signal is generated by a first sigma-delta modulator that is an analog modulator. Level control is performed by multiplying a one-bit PDM signal by a multi-bit coefficient, thereby obtaining a multi-bit digital stream. The digital stream is reconverted to a one-bit PDM signal by a second sigma-delta modulator, preferably a digital modulator.

According to the basic principle of the invention, the signal-to-noise ratio performance of the second sigma-delta modulator, by which the multi-bit digital stream is re-converted into a PDM signal, is better than the performance of the first sigma-delta modulator. Thus, the most important factor for the overall signal-to-noise ratio (SNR) is the noise level of the first sigma-delta modulator from which the PDM signal was originally generated. In the latter second sigma-delta modulator described above, the PDM signal may be attenuated over a range equal to the difference in SNR performance of the modulator without reducing the overall signal-to-noise ratio. For example, if the SNR of the first sigma-delta modulator is 90dB and the SNR of the second sigma-delta modulator is 110dB at maximum excitation, the PDM signal may be attenuated by approximately 20dB in the second modulator without reducing the signal-to-noise ratio. This is possible because in the latter modulator, in addition to the signal, the noise of the first modulator on the signal band is generally attenuated and reaches the noise floor set by the second modulator structure.

Thus, the PDM signal is scaled to a slightly lower level without reducing performance. Although the second sigma-delta modulator also attenuates the signal, the attenuation may be less than the performance difference (20 dB in the above example) so that relative amplification is obtained. When the attenuated PDM signal is less than the difference between the SNR performance of the two modulators, the same overall signal-to-noise ratio as attenuated by the previous analog modulator is obtained. In the case of this example, the nominal level (nominal level) of the signal may be fixed at the point where the first modulator gives an unattenuated signal and the second modulator attenuates the signal by 20 dB. The second order attenuation may be C. In the case of this example, the overall signal-to-noise ratio would be 90dB, the signal would be between +20-0dB and 90+20- (c), c would be between 20dB and 110dB, and the attenuation of the system would be between 0 and 90 dB.

Drawings

The invention will be described in detail by way of preferred embodiments with reference to the accompanying drawings, in which:

FIG. 1 is a block diagram showing a PDM level controller connected after an analog sigma delta A/D modulator according to the present invention;

FIG. 2 is a diagram showing noise and signal levels of an analog sigma-delta modulator and a digital sigma-delta modulator and control regions arranged as a function of frequency;

fig. 3 is a block diagram illustrating a multi-channel PDM level controller.

Detailed description of the invention

Referring to fig. 1, an analog sigma-delta modulator 2 performs a/D conversion of an analog input signal at an input 1 into a 1-bit Pulse Density Modulation (PDM) format. For example, modulator 2 may be any sigma-delta A/D modulator structure described in article [1 ]. Let us assume that modulator 2 is a 3 rd order sigma-delta modulator with a signal-to-noise ratio of about 100 dB. A one-bit PDM signal, from which the values +1 and-1 are obtained, is applied to the PDM level controller 3.

The PDM level controller 3 according to the preferred embodiment of the present invention comprises a digital modulator 4 and a preceding multiplier 300. Level control is performed by multiplying a one-bit Pulse Density Modulated (PDM) signal by a multi-bit coefficient a in a multiplier 300 to obtain a multi-bit digital stream, wherein the digital stream is reconverted to a one-bit PDM signal using a digital sigma-delta modulator 4.

In the case of a one-bit PDM signal, the multiplier 300 is implemented by a simple multiplexer or selector, which produces an output of either + a or-a, depending on whether the input value is +1 or-1. The output of multiplier 300 is then a multi-bit stream, which includes the numbers + a and-a. The multiplier 300 may have a similar structure as disclosed in paper [4 ]. The multiplier may have a fixed coefficient or the coefficient value may be adjustable. In the preferred embodiment of the present invention as shown in fig. 1, the SELECT signal SELECT SELECTs one of several coefficients a1 … an, and thus, the desired attenuation or amplification can be set. For example, the coefficients may be according to table 1. This represents 32 values of the coefficient a, giving a range of class control of +12dB … -34.5dB (in the order of 1.5 dB).

Table 1

Coefficient a	Amplification (dB)
		872	+12.0
734	10.5
		617	9.0
519	7.5
		437	6.0
368	4.5
		309	3.0
260	1.5
		219	0
184	-1.5
		155	-3.0
130	-4.5
		110	-6.0
92	-7.5
		78	-9.0
65	-10.5

55	-12.0
		46	-13.5
39	-15.0
		33	-16.5
28	-18.0
		23	-19.5
20	-21.0
		16	-22.5
14	-24.0
		12	-25.5
10	-27.0
		8	-28.5
7	-30.0
		6	-31.5
5	-33.0
		4	-34.5

The digital modulator 4 is a fourth order modulator comprising adders 400 to 403, integrators 404 to 407, a quantizer 408 and feedbacks 409 to 412 having feedback coefficients r1 to r4, respectively. Note that the detailed implementation and structure of the modulator is of no significance to the present invention. It is of interest to the invention that only the performance of modulator 4 is better than the performance of modulator 2, as described below. The input to the modulator 4 is the digital stream, which comprises the numbers + a and-a. The output 5 of the modulator 4 is a 1-bit oversampled PDM signal. In the level controller 3, the level of the PDM signal is controlled at a rate a/r 1. Due to the instability of the sigma-delta modulator the input value of the modulator 4 cannot approach the internal reference voltage value of the modulator, which means that the coefficient a should be lower than the feedback coefficient r 1. Therefore, in the multiplier 300, only the PDM signal can be attenuated.

At the system level, i.e. between input 1 and output 5, amplification may be provided, however, with respect to noise handling performance, the performance of the digital sigma-delta modulator is higher than the performance of the modulator 2. For example, the noise handling performance of modulator 4 may be higher due to higher orders, multi-bit quantization and feedback, or higher oversampling ratios, or some combination of these. In the embodiment of fig. 1, modulator 4 is a fourth order modulator and modulator 2 is a third order modulator. When a higher order modulator (or a modulator with better noise processing performance) is behind a lower order modulator in the processing path of the PDM signal, the noise level of the lower order modulator is most critical to the overall signal-to-noise ratio (SNR) of the system. In the case of fig. 1, the signal-to-noise ratio at the output 5 is primarily determined in dependence on the signal-to-noise ratio of the modulator 2. The performance of modulator 4 should be at least the required amplification and preferably also have a stability margin (stability margin) that is better than the signal-to-noise ratio of modulator 2 and the incoming PDM signal. Since the signal-to-noise ratio of the modulator 4 of the level controller 3 is much better than that of the incoming PDM signal, the level controller can be lower than the level of the entire PDM signal without actually reducing the signal-to-noise ratio at all. This is possible because the PDM signal is attenuated in addition to the noise of the payload signal. The signal is then scaled to a slightly lower level without degrading performance. Although the PDM signal is also attenuated in the modulator 4, the signal can be attenuated in the level controller 3 to be smaller than the difference in performance between the modulators 2 and 4, and relative amplification can be obtained.

According to the invention, with reference to fig. 3, let us examine the operation of the level controller by way of example. Assuming that the analog modulator 2 is a third order modulator, its signal-to-noise ratio is about 100 dB. Modulator 4 is a fourth order digital modulator with a signal-to-noise ratio of about 120dB, i.e. about 20dB better than the signal-to-noise ratio of modulator 2. The desired control range is +12dB … -34.5dB (on the order of 1.5 dB). To ensure stability of the modulator 4, the ratio a/r1 is 0.5, i.e., -6 dB. The reference value r1 can be calculated as a function of the maximum attenuation (-34.5dB) and the required accuracy (< 0.3 dB). Therefore, assume that the reference value is 1744. Now, by multiplying the incoming PDM signal by 872, corresponds to an amplification of +12dB, and by multiplying the PDM signal by 4, corresponds to a maximum attenuation. In the above table 1, when the reference value r1 is a constant 1744, all differences of the coefficient a are listed, and this corresponds to the amplification. When the modulators 2 and 4 have a performance difference of 20dB and the stability limit is set to 6dB, the amplification range of the arrangement is about 14 dB.

In this example, the signal-to-noise ratio remains approximately the same after modulator 2 in the range +12 … -1.5 dB. At higher attenuation, the just-input signal noise is attenuated below the noise floor (floor)22 of the modulator 4, while the attenuation of the payload signal 25 and the noise floor 22 determines the signal-to-noise ratio at the output 5.

The present invention is described in connection with a 1-bit PDM signal. However, the present invention can be directly applied to a plurality of bits, for example, 2 bits to 4 bits, and a PDM signal.

The preferred embodiment of the present invention as shown in fig. 1 shows an analog modulator 2, a multiplier 300 and a digital modulator 4 connected in series. In practice, these units may be in a signal processing system, with the units being spaced apart from each other in such a way that there may be other signal processing stages between them. An example of such a signal processing system is shown in fig. 3.

Fig. 3 shows three analog input signals 31, 32 and 33, which are applied to respective analog sigma-a modulators 34, 35 and 36. Modulators 34, 35 and 36 generate PDM signals 37, 38 and 39, respectively, which are applied to multipliers 40, 41 and 42, respectively. Multipliers 40, 41 and 42 each produce a multi-bit digital stream and add them in an adder to multi-bit digital stream 47. The signal 47 is converted to a PDM signal 49 by a digital sigma-delta modulator. Modulators 34-36 may have a similar structure as modulator 2 in fig. 1. The structure of multipliers 40 through 42 may be similar to the structure of multiplier 300 in fig. 1. The modulator 48 may have a similar structure to the multiplier 4 in fig. 1. An application of a signal processing device of the type shown in fig. 3 is an audio mixer board.

The invention can be used for level control of the PDM signal in all sigma-delta configurations. Typical purposes of application are IIR and FIR filter structures in addition to audio applications.

It is obvious to a person skilled in the art that with the advancement of technology, the basic idea of the invention may be applied in many different applications. The invention and its embodiments are thus not limited to the examples described above, but fall within the scope of the claims.

Claims (10)

1. A signal processing method comprising the steps of:

generating an N-bit pulse density modulated signal by a first sigma-delta modulator, wherein N is 1, 2, …;

controlling the level of the pulse density modulated signal

a) By multiplying the N-bit pulse density modulated signal with a multi-bit multiplier, its output is an M-bit signal, where M > N,

b) -converting said M-bit signal into an N-bit pulse density modulated signal by a digital sigma-delta modulator,

converting the M-bit signal to the N-bit pulse density modulated signal modulated by the digital sigma-delta modulator, wherein the digital sigma-delta modulator has a signal-to-noise ratio performance that is better than the first sigma-delta modulator.

2. The method of claim 1, wherein said level controlling step further comprises the steps of:

providing relative amplification of the pulse density modulated signal by multiplying the N-bit pulse density modulated signal by a coefficient corresponding to an attenuation less than the difference in performance.

3. A method according to claim 1 or 2, characterized in that a digital sigma-delta modulator is used, the noise handling performance of which is better than that of the first modulator, according to one or several of the following factors: higher order, multi-bit quantization, multi-bit feedback, higher oversampling ratio.

4. A signal processing system comprising:

a first sigma-delta modulator (2) generates an N-bit pulse density modulated signal, where N is 1, 2, …;

-means (3) for controlling the level of said pulse density modulated signal, said means (3) comprising

a) A multi-bit multiplier (300) whose input is said N-bit pulse density modulated signal and whose output is an M-bit signal, where M > N,

b) a digital sigma-delta modulator (4) for converting said M-bit signal into said N-bit pulse density modulated signal,

the digital sigma-delta modulator (4) has a signal-to-noise ratio performance that is superior to the first sigma-delta modulator (2).

5. A system according to claim 4, characterized in that said level control means (3) has a relative amplification when the coefficients of said multi-bit multiplier (300) correspond to a decay below the difference in performance.

6. A system according to claim 4 or 5, characterized in that the noise handling performance of the digital sigma-delta modulator (4) is better than the performance of the first modulator (2) according to one or more of the following factors: higher order, multi-bit quantization, multi-bit feedback, higher oversampling ratio.

7. A system according to claim 4, characterized in that the first modulator (2) is an analog sigma-delta modulator.

8. A system according to claim 4, characterized in that the system is a digital filter of pulse density modulated signals, such as an IIR or FIR filter.

9. The system of claim 4, wherein the system is an audio system.

10. The system according to claim 4, wherein the coefficient value of the multiplier (300) is stepwise adjustable.