CN102403256B - 赝埋层及制造方法、深孔接触及三极管 - Google Patents
赝埋层及制造方法、深孔接触及三极管 Download PDFInfo
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- CN102403256B CN102403256B CN201010275532.8A CN201010275532A CN102403256B CN 102403256 B CN102403256 B CN 102403256B CN 201010275532 A CN201010275532 A CN 201010275532A CN 102403256 B CN102403256 B CN 102403256B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/137—Collector regions of BJTs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/021—Manufacture or treatment of heterojunction BJTs [HBT]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/80—Heterojunction BJTs
- H10D10/821—Vertical heterojunction BJTs
- H10D10/891—Vertical heterojunction BJTs comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
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- H10D64/0113—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/231—Emitter or collector electrodes for bipolar transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/62—Electrodes ohmically coupled to a semiconductor
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- H10W20/062—
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Abstract
Description
Claims (11)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010275532.8A CN102403256B (zh) | 2010-09-08 | 2010-09-08 | 赝埋层及制造方法、深孔接触及三极管 |
| US13/227,387 US8592870B2 (en) | 2010-09-08 | 2011-09-07 | Pseudo buried layer and manufacturing method of the same, deep hole contact and bipolar transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010275532.8A CN102403256B (zh) | 2010-09-08 | 2010-09-08 | 赝埋层及制造方法、深孔接触及三极管 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102403256A CN102403256A (zh) | 2012-04-04 |
| CN102403256B true CN102403256B (zh) | 2014-02-26 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010275532.8A Active CN102403256B (zh) | 2010-09-08 | 2010-09-08 | 赝埋层及制造方法、深孔接触及三极管 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8592870B2 (zh) |
| CN (1) | CN102403256B (zh) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103035560A (zh) * | 2012-01-31 | 2013-04-10 | 上海华虹Nec电子有限公司 | 抑制p型赝埋层中的硼杂质外扩的方法 |
| CN103050521B (zh) * | 2012-05-23 | 2015-02-04 | 上海华虹宏力半导体制造有限公司 | 锗硅hbt器件的集电区引出结构及其制造方法 |
| US20150061010A1 (en) * | 2013-08-27 | 2015-03-05 | International Business Machines Corporation | Structure for improved contact resistance and extension diffusion control |
| RU2688866C1 (ru) * | 2018-03-12 | 2019-05-22 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) | Способ изготовления полупроводникового прибора |
Citations (1)
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| US6770952B2 (en) * | 2001-04-30 | 2004-08-03 | Texas Instruments Incorporated | Integrated process for high voltage and high performance silicon-on-insulator bipolar devices |
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2010
- 2010-09-08 CN CN201010275532.8A patent/CN102403256B/zh active Active
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2011
- 2011-09-07 US US13/227,387 patent/US8592870B2/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6770952B2 (en) * | 2001-04-30 | 2004-08-03 | Texas Instruments Incorporated | Integrated process for high voltage and high performance silicon-on-insulator bipolar devices |
Also Published As
| Publication number | Publication date |
|---|---|
| US20120056247A1 (en) | 2012-03-08 |
| US8592870B2 (en) | 2013-11-26 |
| CN102403256A (zh) | 2012-04-04 |
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