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BR9814661A - Elemento de construção semicondutor - Google Patents

Elemento de construção semicondutor

Info

Publication number
BR9814661A
BR9814661A BR9814661-0A BR9814661A BR9814661A BR 9814661 A BR9814661 A BR 9814661A BR 9814661 A BR9814661 A BR 9814661A BR 9814661 A BR9814661 A BR 9814661A
Authority
BR
Brazil
Prior art keywords
construction element
building element
semiconductor
semiconductor construction
semiconductor building
Prior art date
Application number
BR9814661-0A
Other languages
English (en)
Inventor
Wolfgang Feiler
Original Assignee
Bosch Gmbh Robert
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosch Gmbh Robert filed Critical Bosch Gmbh Robert
Publication of BR9814661A publication Critical patent/BR9814661A/pt

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/415—Insulated-gate bipolar transistors [IGBT] having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thyristors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)

Abstract

Patente de Invenção: <B>"ELEMENTO DE CONSTRUçãO SEMICONDUTOR"<D>. é sugerido um elemento de construção semicondutor para a ligação de grandes correntes. O elemento de construção semicondutor abrange um arranjo de LIGBT com cubas de p 9, 10 em forma de ilha, as quais apresentam zonas catódicas (12, 21, 20 e 23) construídas de forma especial. Por meio desse arranjo especial é aperfeiçoada a resistência de "Latch-up" do elemento de construção.
BR9814661-0A 1997-11-18 1998-11-16 Elemento de construção semicondutor BR9814661A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19750992A DE19750992A1 (de) 1997-11-18 1997-11-18 Halbleiterbauelement
PCT/DE1998/003363 WO1999026295A1 (de) 1997-11-18 1998-11-16 Hochspannungs-halbleiterbauelement

Publications (1)

Publication Number Publication Date
BR9814661A true BR9814661A (pt) 2000-10-03

Family

ID=7849035

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9814661-0A BR9814661A (pt) 1997-11-18 1998-11-16 Elemento de construção semicondutor

Country Status (8)

Country Link
US (1) US6794689B1 (pt)
EP (1) EP1038321A1 (pt)
JP (1) JP4718004B2 (pt)
KR (1) KR100585030B1 (pt)
BR (1) BR9814661A (pt)
DE (1) DE19750992A1 (pt)
HU (1) HUP0004504A3 (pt)
WO (1) WO1999026295A1 (pt)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10221082A1 (de) * 2002-05-11 2003-11-20 Bosch Gmbh Robert Halbleiterbauelement
JP2005109163A (ja) * 2003-09-30 2005-04-21 Nec Electronics Corp 半導体素子
CN109244068B (zh) * 2018-08-29 2020-11-03 南京邮电大学 一种ligbt型高压esd保护器件
CN111816699B (zh) * 2020-08-31 2021-05-14 电子科技大学 一种具有自适应性的soi ligbt器件

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4672407A (en) * 1984-05-30 1987-06-09 Kabushiki Kaisha Toshiba Conductivity modulated MOSFET
GB2173037A (en) * 1985-03-29 1986-10-01 Philips Electronic Associated Semiconductor devices employing conductivity modulation
JPH0716009B2 (ja) * 1988-12-02 1995-02-22 株式会社日立製作所 横型絶縁ゲートバイポーラトランジスタ
JPH02275675A (ja) * 1988-12-29 1990-11-09 Fuji Electric Co Ltd Ｍｏｓ型半導体装置
DE4020478C2 (de) 1989-07-04 2001-03-29 Fuji Electric Co Ltd Mos Halbleitervorrichtung
EP0434234B1 (en) * 1989-12-22 1995-05-24 AT&T Corp. MOS devices having improved electrical match
JP3099917B2 (ja) * 1992-03-09 2000-10-16 日本電気株式会社 電界効果トランジスタ
US5395776A (en) 1993-05-12 1995-03-07 At&T Corp. Method of making a rugged DMOS device
JP3085037B2 (ja) * 1993-08-18 2000-09-04 富士電機株式会社 絶縁ゲートバイポーラトランジスタ
JP3243902B2 (ja) 1993-09-17 2002-01-07 株式会社日立製作所 半導体装置
JP3106844B2 (ja) * 1994-03-24 2000-11-06 富士電機株式会社 横型絶縁ゲート型バイポーラトランジスタ
JPH0823091A (ja) * 1994-07-06 1996-01-23 Nec Kansai Ltd 電界効果トランジスタ及びその製造方法
US5569982A (en) * 1995-05-17 1996-10-29 International Rectifier Corporation Clamping circuit for IGBT in spark plug ignition system
JP3519173B2 (ja) * 1995-06-14 2004-04-12 富士電機デバイステクノロジー株式会社 横型半導体装置およびその製造方法
US5592124A (en) * 1995-06-26 1997-01-07 Burr-Brown Corporation Integrated photodiode/transimpedance amplifier
JP3522983B2 (ja) * 1995-08-24 2004-04-26 株式会社東芝 横型ｉｇｂｔ

Also Published As

Publication number Publication date
US6794689B1 (en) 2004-09-21
KR100585030B1 (ko) 2006-06-01
EP1038321A1 (de) 2000-09-27
JP4718004B2 (ja) 2011-07-06
HUP0004504A2 (hu) 2001-04-28
WO1999026295A1 (de) 1999-05-27
HUP0004504A3 (en) 2002-11-28
DE19750992A1 (de) 1999-06-02
KR20010032187A (ko) 2001-04-16
JP2001523894A (ja) 2001-11-27

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Legal Events

Date Code Title Description
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B11D Dismissal acc. art. 38, par 2 of ipl - failure to pay fee after grant in time