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AU2002211190A1 - Integration of high voltage self-aligned mos components - Google Patents

Integration of high voltage self-aligned mos components

Info

Publication number
AU2002211190A1
AU2002211190A1 AU2002211190A AU1119002A AU2002211190A1 AU 2002211190 A1 AU2002211190 A1 AU 2002211190A1 AU 2002211190 A AU2002211190 A AU 2002211190A AU 1119002 A AU1119002 A AU 1119002A AU 2002211190 A1 AU2002211190 A1 AU 2002211190A1
Authority
AU
Australia
Prior art keywords
integration
high voltage
voltage self
mos components
aligned mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002211190A
Inventor
Andrej Litwin
Peter Olofsson
Anders Soderbarg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of AU2002211190A1 publication Critical patent/AU2002211190A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0281Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65Lateral DMOS [LDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
    • H10P30/222
AU2002211190A 2000-11-03 2001-11-01 Integration of high voltage self-aligned mos components Abandoned AU2002211190A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SE0004027 2000-11-03
SE0004027A SE519382C2 (en) 2000-11-03 2000-11-03 Integration of self-oriented MOS high voltage components and semiconductor structure including such
PCT/SE2001/002405 WO2002037547A1 (en) 2000-11-03 2001-11-01 Integration of high voltage self-aligned mos components

Publications (1)

Publication Number Publication Date
AU2002211190A1 true AU2002211190A1 (en) 2002-05-15

Family

ID=20281691

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002211190A Abandoned AU2002211190A1 (en) 2000-11-03 2001-11-01 Integration of high voltage self-aligned mos components

Country Status (7)

Country Link
US (1) US6686233B2 (en)
EP (1) EP1330837A1 (en)
CN (1) CN1228816C (en)
AU (1) AU2002211190A1 (en)
SE (1) SE519382C2 (en)
TW (1) TW486751B (en)
WO (1) WO2002037547A1 (en)

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SE0302594D0 (en) * 2003-09-30 2003-09-30 Infineon Technologies Ag Vertical DMOS transistor device, integrated circuit, and fabrication method thereof
SE0303099D0 (en) * 2003-11-21 2003-11-21 Infineon Technologies Ag Method in the fabrication of a monolithically integrated high frequency circuit
SE0303106D0 (en) * 2003-11-21 2003-11-21 Infineon Technologies Ag Ldmos transistor device, integrated circuit, and fabrication method thereof
KR100670401B1 (en) * 2003-12-27 2007-01-16 동부일렉트로닉스 주식회사 Gate oxide film formation method of a semiconductor device
DE102004009521B4 (en) * 2004-02-27 2020-06-10 Austriamicrosystems Ag High-voltage PMOS transistor, mask for manufacturing a tub and method for manufacturing a high-voltage PMOS transistor
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US7329618B2 (en) * 2005-06-28 2008-02-12 Micron Technology, Inc. Ion implanting methods
EP1804285B1 (en) * 2005-12-27 2018-10-24 Semiconductor Components Industries, LLC Method for manufacturing a transistor with self-aligned channel
KR100741882B1 (en) * 2005-12-29 2007-07-23 동부일렉트로닉스 주식회사 High voltage device and manufacturing method
US7465623B2 (en) * 2006-08-28 2008-12-16 Advanced Micro Devices, Inc. Methods for fabricating a semiconductor device on an SOI substrate
KR100865548B1 (en) * 2006-12-28 2008-10-28 주식회사 하이닉스반도체 Manufacturing Method of Semiconductor Memory Device
US7781843B1 (en) * 2007-01-11 2010-08-24 Hewlett-Packard Development Company, L.P. Integrating high-voltage CMOS devices with low-voltage CMOS
KR100836766B1 (en) * 2007-01-22 2008-06-10 삼성전자주식회사 Manufacturing method of high voltage semiconductor device and high voltage semiconductor device using same
KR100917813B1 (en) 2007-10-05 2009-09-18 주식회사 동부하이텍 Semiconductor device and manufacturing method thereof
KR100903483B1 (en) 2007-11-26 2009-06-18 주식회사 동부하이텍 Manufacturing method of semiconductor device
JP5283916B2 (en) * 2008-02-01 2013-09-04 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー Manufacturing method of semiconductor device
US20100117153A1 (en) * 2008-11-07 2010-05-13 Honeywell International Inc. High voltage soi cmos device and method of manufacture
CN101752254B (en) * 2008-12-22 2012-12-19 中芯国际集成电路制造(上海)有限公司 Ion implantation zone forming method, MOS transistor and manufacture method thereof
SG183751A1 (en) * 2009-07-10 2012-09-27 Globalfoundries Sg Pte Ltd High voltage device
CN101789432B (en) * 2010-01-27 2011-11-16 崇贸科技股份有限公司 High side semiconductor structure
US9209098B2 (en) 2011-05-19 2015-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. HVMOS reliability evaluation using bulk resistances as indices
CN102683186A (en) * 2012-05-09 2012-09-19 上海宏力半导体制造有限公司 Method for inhibiting hot carrier injection and manufacture method of BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) device
US20140167142A1 (en) * 2012-12-14 2014-06-19 Spansion Llc Use Disposable Gate Cap to Form Transistors, and Split Gate Charge Trapping Memory Cells
DE102015004235B4 (en) 2014-04-14 2019-01-03 Elmos Semiconductor Ag Method of protecting a CMOS circuit on an N-substrate from reverse polarity
DE102014017146A1 (en) 2014-04-14 2015-10-15 Elmos Semiconductor Aktiengesellschaft Rail-to-rail reverse polarity protection for the combined input / output of an integrated CMOS circuit on a P-substrate
US9412736B2 (en) 2014-06-05 2016-08-09 Globalfoundries Inc. Embedding semiconductor devices in silicon-on-insulator wafers connected using through silicon vias
US10038063B2 (en) 2014-06-10 2018-07-31 International Business Machines Corporation Tunable breakdown voltage RF FET devices
CN105789267B (en) * 2014-12-22 2019-04-26 旺宏电子股份有限公司 Semiconductor device with a plurality of semiconductor chips
CN105810583B (en) 2014-12-30 2019-03-15 无锡华润上华科技有限公司 Manufacturing method of lateral insulated gate bipolar transistor
US9780250B2 (en) * 2016-01-14 2017-10-03 Varian Semiconductor Equipment Associates, Inc. Self-aligned mask for ion implantation
KR101822016B1 (en) 2016-09-13 2018-01-26 매그나칩반도체 유한회사 Method of Fabricating a DMOS Transistor and a CMOS Transistor
CN107785324A (en) * 2017-09-19 2018-03-09 上海华虹宏力半导体制造有限公司 High-pressure process integrated circuit method
CN109786328A (en) * 2017-11-10 2019-05-21 中芯国际集成电路制造(上海)有限公司 Semiconductor devices and its manufacturing method
CN109950151B (en) * 2017-12-20 2022-02-15 中芯国际集成电路制造(上海)有限公司 PMOS transistor and forming method thereof
US11228174B1 (en) 2019-05-30 2022-01-18 Silicet, LLC Source and drain enabled conduction triggers and immunity tolerance for integrated circuits
US10892362B1 (en) 2019-11-06 2021-01-12 Silicet, LLC Devices for LDMOS and other MOS transistors with hybrid contact
EP4200911A4 (en) 2020-12-04 2025-01-08 Amplexia, LLC Ldmos with self-aligned body and hybrid source
TWI768654B (en) * 2021-01-14 2022-06-21 世界先進積體電路股份有限公司 Semiconductor structure and method for forming the same
US11742389B2 (en) 2021-05-18 2023-08-29 Vanguard International Semiconductor Corporation Semiconductor structure and method for forming the same
TWI796237B (en) * 2021-12-03 2023-03-11 立錡科技股份有限公司 Integration manufacturing method of depletion high voltage nmos device and depletion low voltage nmos device
CN116190319B (en) * 2022-12-28 2025-02-28 深圳市创芯微微电子有限公司 A MOS device based on HVCMOS platform and its manufacturing method

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Also Published As

Publication number Publication date
SE0004027D0 (en) 2000-11-03
EP1330837A1 (en) 2003-07-30
TW486751B (en) 2002-05-11
CN1228816C (en) 2005-11-23
SE519382C2 (en) 2003-02-25
WO2002037547A1 (en) 2002-05-10
US20020055220A1 (en) 2002-05-09
CN1471724A (en) 2004-01-28
US6686233B2 (en) 2004-02-03
SE0004027L (en) 2002-05-04

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